1 /* Disassembly routines for TMS320C54X architecture
2 Copyright 1999, 2000, 2001, 2005, 2007, 2009, 2012
3 Free Software Foundation, Inc.
4 Contributed by Timothy Wall (twall@cygnus.com)
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
28 #include "opcode/tic54x.h"
29 #include "coff/tic54x.h"
31 static int has_lkaddr (unsigned short, const insn_template *);
32 static int get_insn_size (unsigned short, const insn_template *);
33 static int print_instruction (disassemble_info *, bfd_vma,
34 unsigned short, const char *,
35 const enum optype [], int, int);
36 static int print_parallel_instruction (disassemble_info *, bfd_vma,
38 const insn_template *, int);
39 static int sprint_dual_address (disassemble_info *,char [],
41 static int sprint_indirect_address (disassemble_info *,char [],
43 static int sprint_direct_address (disassemble_info *,char [],
45 static int sprint_mmr (disassemble_info *,char [],int);
46 static int sprint_condition (disassemble_info *,char *,unsigned short);
47 static int sprint_cc2 (disassemble_info *,char *,unsigned short);
50 print_insn_tic54x (bfd_vma memaddr, disassemble_info *info)
53 unsigned short opcode;
55 const insn_template* tm;
57 status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
60 (*info->memory_error_func) (status, memaddr, info);
64 opcode = bfd_getl16 (opbuf);
65 tm = tic54x_get_insn (info, memaddr, opcode, &size);
67 info->bytes_per_line = 2;
68 info->bytes_per_chunk = 2;
69 info->octets_per_byte = 2;
70 info->display_endian = BFD_ENDIAN_LITTLE;
72 if (tm->flags & FL_PAR)
74 if (!print_parallel_instruction (info, memaddr, opcode, tm, size))
79 if (!print_instruction (info, memaddr, opcode,
82 size, (tm->flags & FL_EXT)))
90 has_lkaddr (unsigned short memdata, const insn_template *tm)
92 return (IS_LKADDR (memdata)
93 && (OPTYPE (tm->operand_types[0]) == OP_Smem
94 || OPTYPE (tm->operand_types[1]) == OP_Smem
95 || OPTYPE (tm->operand_types[2]) == OP_Smem
96 || OPTYPE (tm->operand_types[1]) == OP_Sind
97 || OPTYPE (tm->operand_types[0]) == OP_Lmem
98 || OPTYPE (tm->operand_types[1]) == OP_Lmem));
101 /* always returns 1 (whether an insn template was found) since we provide an
102 "unknown instruction" template */
104 tic54x_get_insn (disassemble_info *info, bfd_vma addr,
105 unsigned short memdata, int *size)
107 const insn_template *tm = NULL;
109 for (tm = tic54x_optab; tm->name; tm++)
111 if (tm->opcode == (memdata & tm->mask))
113 /* a few opcodes span two words */
114 if (tm->flags & FL_EXT)
116 /* if lk addressing is used, the second half of the opcode gets
117 pushed one word later */
119 bfd_vma addr2 = addr + 1 + has_lkaddr (memdata, tm);
120 int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
121 // FIXME handle errors
124 unsigned short data2 = bfd_getl16 (opbuf);
125 if (tm->opcode2 == (data2 & tm->mask2))
127 if (size) *size = get_insn_size (memdata, tm);
134 if (size) *size = get_insn_size (memdata, tm);
139 for (tm = (insn_template *) tic54x_paroptab; tm->name; tm++)
141 if (tm->opcode == (memdata & tm->mask))
143 if (size) *size = get_insn_size (memdata, tm);
149 return &tic54x_unknown_opcode;
153 get_insn_size (unsigned short memdata, const insn_template *insn)
157 if (insn->flags & FL_PAR)
159 /* only non-parallel instructions support lk addressing */
164 size = insn->words + has_lkaddr (memdata, insn);
171 print_instruction (disassemble_info *info,
173 unsigned short opcode,
175 const enum optype tm_operands[],
180 /* string storage for multiple operands */
181 char operand[4][64] = { {0},{0},{0},{0}, };
183 unsigned long opcode2 = 0;
184 unsigned long lkaddr = 0;
185 enum optype src = OP_None;
186 enum optype dst = OP_None;
190 info->fprintf_func (info->stream, "%-7s", tm_name);
194 int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
197 lkaddr = opcode2 = bfd_getl16 (buf);
200 status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
203 opcode2 = bfd_getl16 (buf);
207 for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
209 char *next_comma = ",";
210 int optional = (tm_operands[i] & OPT) != 0;
212 switch (OPTYPE (tm_operands[i]))
215 sprint_dual_address (info, operand[i], XMEM (opcode));
216 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
219 sprint_dual_address (info, operand[i], YMEM (opcode));
220 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
225 info->fprintf_func (info->stream, "%s", comma);
226 if (INDIRECT (opcode))
228 if (MOD (opcode) >= 12)
230 bfd_vma addr = lkaddr;
231 int arf = ARF (opcode);
232 int mod = MOD (opcode);
234 info->fprintf_func (info->stream, "*(");
236 info->fprintf_func (info->stream, "*%sar%d(",
237 (mod == 13 || mod == 14 ? "+" : ""),
239 (*(info->print_address_func)) ((bfd_vma) addr, info);
240 info->fprintf_func (info->stream, ")%s",
241 mod == 14 ? "%" : "");
245 sprint_indirect_address (info, operand[i], opcode);
246 info->fprintf_func (info->stream, "%s", operand[i]);
251 /* FIXME -- use labels (print_address_func) */
252 /* in order to do this, we need to guess what DP is */
253 sprint_direct_address (info, operand[i], opcode);
254 info->fprintf_func (info->stream, "%s", operand[i]);
258 info->fprintf_func (info->stream, "%s", comma);
259 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
262 /* upper 7 bits of address are in the opcode */
263 opcode2 += ((unsigned long) opcode & 0x7F) << 16;
266 info->fprintf_func (info->stream, "%s", comma);
267 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
270 sprint_mmr (info, operand[i], MMRX (opcode));
271 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
274 sprint_mmr (info, operand[i], MMRY (opcode));
275 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
278 sprint_mmr (info, operand[i], MMR (opcode));
279 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
282 sprintf (operand[i], "pa%d", (unsigned) opcode2);
283 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
286 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
287 sprintf (operand[i], (src == OP_B) ? "b" : "a");
288 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
291 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
292 sprintf (operand[i], (src == OP_B) ? "b" : "a");
293 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
296 dst = DST (opcode) ? OP_B : OP_A;
297 sprintf (operand[i], (dst == OP_B) ? "a" : "b");
298 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
301 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
302 if (!optional || dst != src)
304 sprintf (operand[i], (dst == OP_B) ? "b" : "a");
305 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
311 sprintf (operand[i], "b");
312 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
315 sprintf (operand[i], "a");
316 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
319 sprintf (operand[i], "ar%d", (int) ARX (opcode));
320 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
323 shift = SHIFT (ext ? opcode2 : opcode);
324 if (!optional || shift != 0)
326 sprintf (operand[i], "%d", shift);
327 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
333 shift = SHFT (opcode);
334 if (!optional || shift != 0)
336 sprintf (operand[i], "%d", (unsigned) shift);
337 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
343 sprintf (operand[i], "#%d", (int) (short) opcode2);
344 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
347 sprintf (operand[i], "t");
348 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
351 sprintf (operand[i], "ts");
352 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
355 sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
356 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
359 sprintf (operand[i], "16");
360 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
363 sprintf (operand[i], "asm");
364 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
367 sprintf (operand[i], "%d", (int) (opcode & 0xF));
368 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
371 /* put all CC operands in the same operand */
372 sprint_condition (info, operand[i], opcode);
373 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
377 sprint_cc2 (info, operand[i], opcode);
378 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
382 const char *code[] = { "eq", "lt", "gt", "neq" };
384 /* Do not use sprintf with only two parameters as a
385 compiler warning could be generated in such conditions. */
386 sprintf (operand[i], "%s", code[CC3 (opcode)]);
387 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
392 int code = (opcode >> 8) & 0x3;
393 sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
394 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
398 sprintf (operand[i], "#%d",
399 (int) (((signed char) opcode & 0x1F) << 3) >> 3);
400 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
403 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
404 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
407 sprintf (operand[i], "#%d", (int) (opcode & 0x7));
408 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
411 sprintf (operand[i], "#%d", (unsigned) opcode2);
412 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
415 n = (opcode >> 9) & 0x1;
416 sprintf (operand[i], "st%d", n);
417 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
421 const char *status0[] = {
422 "0", "1", "2", "3", "4", "5", "6", "7", "8",
423 "ovb", "ova", "c", "tc", "13", "14", "15"
425 const char *status1[] = {
426 "0", "1", "2", "3", "4",
427 "cmpt", "frct", "c16", "sxm", "ovm", "10",
428 "intm", "hm", "xf", "cpl", "braf"
430 sprintf (operand[i], "%s",
431 n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
432 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
436 sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
437 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
440 sprintf (operand[i], "trn");
441 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
444 sprintf (operand[i], "dp");
445 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
448 /* FIXME-- this is DP, print the original address? */
449 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
450 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
453 sprintf (operand[i], "arp");
454 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
457 sprintf (operand[i], "%d", (int) (opcode & 0x1F));
458 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
461 sprintf (operand[i], "??? (0x%x)", tm_operands[i]);
462 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
471 print_parallel_instruction (disassemble_info *info,
473 unsigned short opcode,
474 const insn_template *ptm,
477 print_instruction (info, memaddr, opcode,
478 ptm->name, ptm->operand_types, size, 0);
479 info->fprintf_func (info->stream, " || ");
480 return print_instruction (info, memaddr, opcode,
481 ptm->parname, ptm->paroperand_types, size, 0);
485 sprint_dual_address (disassemble_info *info ATTRIBUTE_UNUSED,
489 const char *formats[] = {
495 return sprintf (buf, formats[XMOD (code)], XARX (code));
499 sprint_indirect_address (disassemble_info *info ATTRIBUTE_UNUSED,
501 unsigned short opcode)
503 const char *formats[] = {
517 return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
521 sprint_direct_address (disassemble_info *info ATTRIBUTE_UNUSED,
523 unsigned short opcode)
525 /* FIXME -- look up relocation if available */
526 return sprintf (buf, "DP+0x%02x", (int) (opcode & 0x7F));
530 sprint_mmr (disassemble_info *info ATTRIBUTE_UNUSED,
534 symbol *reg = (symbol *) mmregs;
535 while (reg->name != NULL)
537 if (mmr == reg->value)
539 sprintf (buf, "%s", (reg + 1)->name);
544 sprintf (buf, "MMR(%d)", mmr); /* FIXME -- different targets. */
549 sprint_cc2 (disassemble_info *info ATTRIBUTE_UNUSED,
551 unsigned short opcode)
553 const char *cc2[] = {
554 "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq",
555 "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq",
557 return sprintf (buf, "%s", cc2[opcode & 0xF]);
561 sprint_condition (disassemble_info *info ATTRIBUTE_UNUSED,
563 unsigned short opcode)
566 const char *cmp[] = {
567 "??", "??", "geq", "lt", "neq", "eq", "gt", "leq"
571 char acc = (opcode & 0x8) ? 'b' : 'a';
573 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
574 (opcode & 0x20) ? ", " : "");
576 buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
578 else if (opcode & 0x3F)
581 buf += sprintf (buf, "%s%s",
582 ((opcode & 0x30) == 0x30) ? "tc" : "ntc",
583 (opcode & 0x0F) ? ", " : "");
585 buf += sprintf (buf, "%s%s",
586 ((opcode & 0x0C) == 0x0C) ? "c" : "nc",
587 (opcode & 0x03) ? ", " : "");
589 buf += sprintf (buf, "%s",
590 ((opcode & 0x03) == 0x03) ? "bio" : "nbio");
593 buf += sprintf (buf, "unc");