opcodes/rl78-decode.c

   1 #line 1 "rl78-decode.opc"
   2 /* -*- c -*- */
   3 #include "sysdep.h"
   4 #include <stdio.h>
   5 #include <stdlib.h>
   6 #include <string.h>
   7 #include "ansidecl.h"
   8 #include "opcode/rl78.h"
   9
  10 static int trace = 0;
  11
  12 typedef struct
  13 {
  14   RL78_Opcode_Decoded * rl78;
  15   int (* getbyte)(void *);
  16   void * ptr;
  17   unsigned char * op;
  18 } LocalData;
  19
  20 #define ID(x) rl78->id = RLO_##x, rl78->lineno = __LINE__
  21 #define OP(n,t,r,a) (rl78->op[n].type = t, \
  22                      rl78->op[n].reg = r,            \
  23                      rl78->op[n].addend = a )
  24 #define OPX(n,t,r1,r2,a) \
  25         (rl78->op[n].type = t, \
  26         rl78->op[n].reg = r1, \
  27         rl78->op[n].reg2 = r2, \
  28         rl78->op[n].addend = a )
  29
  30 #define W() rl78->size = RL78_Word
  31
  32 #define AU ATTRIBUTE_UNUSED
  33 #define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr))
  34 #define B ((unsigned long) GETBYTE())
  35
  36 #define SYNTAX(x) rl78->syntax = x
  37
  38 #define UNSUPPORTED() \
  39   rl78->syntax = "*unknown*"
  40
  41 #define RB(x) ((x)+RL78_Reg_X)
  42 #define RW(x) ((x)+RL78_Reg_AX)
  43
  44 #define Fz      rl78->flags = RL78_PSW_Z
  45 #define Fza     rl78->flags = RL78_PSW_Z | RL78_PSW_AC
  46 #define Fzc     rl78->flags = RL78_PSW_Z | RL78_PSW_CY
  47 #define Fzac    rl78->flags = RL78_PSW_Z | RL78_PSW_AC | RL78_PSW_CY
  48 #define Fa      rl78->flags = RL78_PSW_AC
  49 #define Fc      rl78->flags = RL78_PSW_CY
  50 #define Fac     rl78->flags = RL78_PSW_AC | RL78_PSW_CY
  51
  52 #define IMMU(bytes)   immediate (bytes, 0, ld)
  53 #define IMMS(bytes)   immediate (bytes, 1, ld)
  54
  55 static int
  56 immediate (int bytes, int sign_extend, LocalData * ld)
  57 {
  58   unsigned long i = 0;
  59
  60   switch (bytes)
  61     {
  62     case 1:
  63       i |= B;
  64       if (sign_extend && (i & 0x80))
  65         i -= 0x100;
  66       break;
  67     case 2:
  68       i |= B;
  69       i |= B << 8;
  70       if (sign_extend && (i & 0x8000))
  71         i -= 0x10000;
  72       break;
  73     case 3:
  74       i |= B;
  75       i |= B << 8;
  76       i |= B << 16;
  77       if (sign_extend && (i & 0x800000))
  78         i -= 0x1000000;
  79       break;
  80     default:
  81       fprintf (stderr, "Programmer error: immediate() called with invalid byte count %d\n", bytes);
  82       abort();
  83     }
  84   return i;
  85 }
  86
  87 #define DC(c)           OP (0, RL78_Operand_Immediate, 0, c)
  88 #define DR(r)           OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
  89 #define DRB(r)          OP (0, RL78_Operand_Register, RB(r), 0)
  90 #define DRW(r)          OP (0, RL78_Operand_Register, RW(r), 0)
  91 #define DM(r,a)         OP (0, RL78_Operand_Indirect, RL78_Reg_##r, a)
  92 #define DM2(r1,r2,a)    OPX (0, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
  93 #define DE()            rl78->op[0].use_es = 1
  94 #define DB(b)           set_bit (rl78->op, b)
  95 #define DCY()           DR(PSW); DB(0)
  96 #define DPUSH()         OP (0, RL78_Operand_PreDec, RL78_Reg_SP, 0);
  97
  98 #define SC(c)           OP (1, RL78_Operand_Immediate, 0, c)
  99 #define SR(r)           OP (1, RL78_Operand_Register, RL78_Reg_##r, 0)
 100 #define SRB(r)          OP (1, RL78_Operand_Register, RB(r), 0)
 101 #define SRW(r)          OP (1, RL78_Operand_Register, RW(r), 0)
 102 #define SM(r,a)         OP (1, RL78_Operand_Indirect, RL78_Reg_##r, a)
 103 #define SM2(r1,r2,a)    OPX (1, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
 104 #define SE()            rl78->op[1].use_es = 1
 105 #define SB(b)           set_bit (rl78->op+1, b)
 106 #define SCY()           SR(PSW); SB(0)
 107 #define COND(c)         rl78->op[1].condition = RL78_Condition_##c
 108 #define SPOP()          OP (1, RL78_Operand_PostInc, RL78_Reg_SP, 0);
 109
 110 static void
 111 set_bit (RL78_Opcode_Operand *op, int bit)
 112 {
 113   op->bit_number = bit;
 114   switch (op->type) {
 115   case RL78_Operand_Register:
 116     op->type = RL78_Operand_Bit;
 117     break;
 118   case RL78_Operand_Indirect:
 119     op->type = RL78_Operand_BitIndirect;
 120     break;
 121   default:
 122     break;
 123   }
 124 }
 125
 126 static int
 127 saddr (int x)
 128 {
 129   if (x < 0x20)
 130     return 0xfff00 + x;
 131   return 0xffe00 + x;
 132 }
 133
 134 static int
 135 sfr (int x)
 136 {
 137   return 0xfff00 + x;
 138 }
 139
 140 #define SADDR saddr (IMMU (1))
 141 #define SFR sfr (IMMU (1))
 142
 143 int
 144 rl78_decode_opcode (unsigned long pc AU,
 145                   RL78_Opcode_Decoded * rl78,
 146                   int (* getbyte)(void *),
 147                   void * ptr)
 148 {
 149   LocalData lds, * ld = &lds;
 150   unsigned char op_buf[20] = {0};
 151   unsigned char *op = op_buf;
 152   int op0, op1;
 153
 154   lds.rl78 = rl78;
 155   lds.getbyte = getbyte;
 156   lds.ptr = ptr;
 157   lds.op = op;
 158
 159   memset (rl78, 0, sizeof (*rl78));
 160
 161  start_again:
 162
 163 /* Byte registers, not including A.  */
 164 /* Word registers, not including AX.  */
 165
 166 /*----------------------------------------------------------------------*/
 167 /* ES: prefix                                                           */
 168
 169   GETBYTE ();
 170   switch (op[0] & 0xff)
 171   {
 172     case 0x00:
 173         {
 174           /** 0000 0000                 nop                                     */
 175           if (trace)
 176             {
 177               printf ("\033[33m%s\033[0m  %02x\n",
 178                      "/** 0000 0000                     nop                                     */",
 179                      op[0]);
 180             }
 181           SYNTAX("nop");
 182 #line 887 "rl78-decode.opc"
 183           ID(nop);
 184
 185         /*----------------------------------------------------------------------*/
 186
 187         }
 188       break;
 189     case 0x01:
 190     case 0x03:
 191     case 0x05:
 192     case 0x07:
 193         {
 194           /** 0000 0rw1                 addw    %0, %1                          */
 195 #line 253 "rl78-decode.opc"
 196           int rw AU = (op[0] >> 1) & 0x03;
 197           if (trace)
 198             {
 199               printf ("\033[33m%s\033[0m  %02x\n",
 200                      "/** 0000 0rw1                     addw    %0, %1                          */",
 201                      op[0]);
 202               printf ("  rw = 0x%x\n", rw);
 203             }
 204           SYNTAX("addw  %0, %1");
 205 #line 253 "rl78-decode.opc"
 206           ID(add); W(); DR(AX); SRW(rw); Fzac;
 207
 208         }
 209       break;
 210     case 0x02:
 211         {
 212           /** 0000 0010                 addw    %0, %e1%!1                      */
 213           if (trace)
 214             {
 215               printf ("\033[33m%s\033[0m  %02x\n",
 216                      "/** 0000 0010                     addw    %0, %e1%!1                      */",
 217                      op[0]);
 218             }
 219           SYNTAX("addw  %0, %e1%!1");
 220 #line 244 "rl78-decode.opc"
 221           ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 222
 223         }
 224       break;
 225     case 0x04:
 226         {
 227           /** 0000 0100                 addw    %0, #%1                         */
 228           if (trace)
 229             {
 230               printf ("\033[33m%s\033[0m  %02x\n",
 231                      "/** 0000 0100                     addw    %0, #%1                         */",
 232                      op[0]);
 233             }
 234           SYNTAX("addw  %0, #%1");
 235 #line 250 "rl78-decode.opc"
 236           ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
 237
 238         }
 239       break;
 240     case 0x06:
 241         {
 242           /** 0000 0110                 addw    %0, %1                          */
 243           if (trace)
 244             {
 245               printf ("\033[33m%s\033[0m  %02x\n",
 246                      "/** 0000 0110                     addw    %0, %1                          */",
 247                      op[0]);
 248             }
 249           SYNTAX("addw  %0, %1");
 250 #line 256 "rl78-decode.opc"
 251           ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
 252
 253         }
 254       break;
 255     case 0x08:
 256         {
 257           /** 0000 1000                 xch     a, x                            */
 258           if (trace)
 259             {
 260               printf ("\033[33m%s\033[0m  %02x\n",
 261                      "/** 0000 1000                     xch     a, x                            */",
 262                      op[0]);
 263             }
 264           SYNTAX("xch   a, x");
 265 #line 1210 "rl78-decode.opc"
 266           ID(xch); DR(A); SR(X);
 267
 268         /*----------------------------------------------------------------------*/
 269
 270         }
 271       break;
 272     case 0x09:
 273         {
 274           /** 0000 1001                 mov     %0, %e1%1                       */
 275           if (trace)
 276             {
 277               printf ("\033[33m%s\033[0m  %02x\n",
 278                      "/** 0000 1001                     mov     %0, %e1%1                       */",
 279                      op[0]);
 280             }
 281           SYNTAX("mov   %0, %e1%1");
 282 #line 657 "rl78-decode.opc"
 283           ID(mov); DR(A); SM(B, IMMU(2));
 284
 285         }
 286       break;
 287     case 0x0a:
 288         {
 289           /** 0000 1010                 add     %0, #%1                         */
 290           if (trace)
 291             {
 292               printf ("\033[33m%s\033[0m  %02x\n",
 293                      "/** 0000 1010                     add     %0, #%1                         */",
 294                      op[0]);
 295             }
 296           SYNTAX("add   %0, #%1");
 297 #line 207 "rl78-decode.opc"
 298           ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
 299
 300         /*----------------------------------------------------------------------*/
 301
 302         }
 303       break;
 304     case 0x0b:
 305         {
 306           /** 0000 1011                 add     %0, %1                          */
 307           if (trace)
 308             {
 309               printf ("\033[33m%s\033[0m  %02x\n",
 310                      "/** 0000 1011                     add     %0, %1                          */",
 311                      op[0]);
 312             }
 313           SYNTAX("add   %0, %1");
 314 #line 201 "rl78-decode.opc"
 315           ID(add); DR(A); SM(None, SADDR); Fzac;
 316
 317         }
 318       break;
 319     case 0x0c:
 320         {
 321           /** 0000 1100                 add     %0, #%1                         */
 322           if (trace)
 323             {
 324               printf ("\033[33m%s\033[0m  %02x\n",
 325                      "/** 0000 1100                     add     %0, #%1                         */",
 326                      op[0]);
 327             }
 328           SYNTAX("add   %0, #%1");
 329 #line 195 "rl78-decode.opc"
 330           ID(add); DR(A); SC(IMMU(1)); Fzac;
 331
 332         }
 333       break;
 334     case 0x0d:
 335         {
 336           /** 0000 1101                 add     %0, %e1%1                       */
 337           if (trace)
 338             {
 339               printf ("\033[33m%s\033[0m  %02x\n",
 340                      "/** 0000 1101                     add     %0, %e1%1                       */",
 341                      op[0]);
 342             }
 343           SYNTAX("add   %0, %e1%1");
 344 #line 183 "rl78-decode.opc"
 345           ID(add); DR(A); SM(HL, 0); Fzac;
 346
 347         }
 348       break;
 349     case 0x0e:
 350         {
 351           /** 0000 1110                 add     %0, %e1%1                       */
 352           if (trace)
 353             {
 354               printf ("\033[33m%s\033[0m  %02x\n",
 355                      "/** 0000 1110                     add     %0, %e1%1                       */",
 356                      op[0]);
 357             }
 358           SYNTAX("add   %0, %e1%1");
 359 #line 189 "rl78-decode.opc"
 360           ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
 361
 362         }
 363       break;
 364     case 0x0f:
 365         {
 366           /** 0000 1111                 add     %0, %e1%!1                      */
 367           if (trace)
 368             {
 369               printf ("\033[33m%s\033[0m  %02x\n",
 370                      "/** 0000 1111                     add     %0, %e1%!1                      */",
 371                      op[0]);
 372             }
 373           SYNTAX("add   %0, %e1%!1");
 374 #line 180 "rl78-decode.opc"
 375           ID(add); DR(A); SM(None, IMMU(2)); Fzac;
 376
 377         }
 378       break;
 379     case 0x10:
 380         {
 381           /** 0001 0000                 addw    %0, #%1                         */
 382           if (trace)
 383             {
 384               printf ("\033[33m%s\033[0m  %02x\n",
 385                      "/** 0001 0000                     addw    %0, #%1                         */",
 386                      op[0]);
 387             }
 388           SYNTAX("addw  %0, #%1");
 389 #line 259 "rl78-decode.opc"
 390           ID(add); W(); DR(SP); SC(IMMU(1)); Fzac;
 391
 392         /*----------------------------------------------------------------------*/
 393
 394         }
 395       break;
 396     case 0x11:
 397         {
 398           /** 0001 0001                 es:                                     */
 399           if (trace)
 400             {
 401               printf ("\033[33m%s\033[0m  %02x\n",
 402                      "/** 0001 0001                     es:                                     */",
 403                      op[0]);
 404             }
 405           SYNTAX("es:");
 406 #line 172 "rl78-decode.opc"
 407           DE(); SE();
 408           op ++;
 409           pc ++;
 410           goto start_again;
 411
 412         /*----------------------------------------------------------------------*/
 413
 414         }
 415       break;
 416     case 0x12:
 417     case 0x14:
 418     case 0x16:
 419         {
 420           /** 0001 0ra0                 movw    %0, %1                          */
 421 #line 835 "rl78-decode.opc"
 422           int ra AU = (op[0] >> 1) & 0x03;
 423           if (trace)
 424             {
 425               printf ("\033[33m%s\033[0m  %02x\n",
 426                      "/** 0001 0ra0                     movw    %0, %1                          */",
 427                      op[0]);
 428               printf ("  ra = 0x%x\n", ra);
 429             }
 430           SYNTAX("movw  %0, %1");
 431 #line 835 "rl78-decode.opc"
 432           ID(mov); W(); DRW(ra); SR(AX);
 433
 434         }
 435       break;
 436     case 0x13:
 437     case 0x15:
 438     case 0x17:
 439         {
 440           /** 0001 0ra1                 movw    %0, %1                          */
 441 #line 832 "rl78-decode.opc"
 442           int ra AU = (op[0] >> 1) & 0x03;
 443           if (trace)
 444             {
 445               printf ("\033[33m%s\033[0m  %02x\n",
 446                      "/** 0001 0ra1                     movw    %0, %1                          */",
 447                      op[0]);
 448               printf ("  ra = 0x%x\n", ra);
 449             }
 450           SYNTAX("movw  %0, %1");
 451 #line 832 "rl78-decode.opc"
 452           ID(mov); W(); DR(AX); SRW(ra);
 453
 454         }
 455       break;
 456     case 0x18:
 457         {
 458           /** 0001 1000                 mov     %e0%0, %1                       */
 459           if (trace)
 460             {
 461               printf ("\033[33m%s\033[0m  %02x\n",
 462                      "/** 0001 1000                     mov     %e0%0, %1                       */",
 463                      op[0]);
 464             }
 465           SYNTAX("mov   %e0%0, %1");
 466 #line 708 "rl78-decode.opc"
 467           ID(mov); DM(B, IMMU(2)); SR(A);
 468
 469         }
 470       break;
 471     case 0x19:
 472         {
 473           /** 0001 1001                 mov     %e0%0, #%1                      */
 474           if (trace)
 475             {
 476               printf ("\033[33m%s\033[0m  %02x\n",
 477                      "/** 0001 1001                     mov     %e0%0, #%1                      */",
 478                      op[0]);
 479             }
 480           SYNTAX("mov   %e0%0, #%1");
 481 #line 705 "rl78-decode.opc"
 482           ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
 483
 484         }
 485       break;
 486     case 0x1a:
 487         {
 488           /** 0001 1010                 addc    %0, #%1                         */
 489           if (trace)
 490             {
 491               printf ("\033[33m%s\033[0m  %02x\n",
 492                      "/** 0001 1010                     addc    %0, #%1                         */",
 493                      op[0]);
 494             }
 495           SYNTAX("addc  %0, #%1");
 496 #line 239 "rl78-decode.opc"
 497           ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
 498
 499         /*----------------------------------------------------------------------*/
 500
 501         }
 502       break;
 503     case 0x1b:
 504         {
 505           /** 0001 1011                 addc    %0, %1                          */
 506           if (trace)
 507             {
 508               printf ("\033[33m%s\033[0m  %02x\n",
 509                      "/** 0001 1011                     addc    %0, %1                          */",
 510                      op[0]);
 511             }
 512           SYNTAX("addc  %0, %1");
 513 #line 236 "rl78-decode.opc"
 514           ID(addc); DR(A); SM(None, SADDR); Fzac;
 515
 516         }
 517       break;
 518     case 0x1c:
 519         {
 520           /** 0001 1100                 addc    %0, #%1                         */
 521           if (trace)
 522             {
 523               printf ("\033[33m%s\033[0m  %02x\n",
 524                      "/** 0001 1100                     addc    %0, #%1                         */",
 525                      op[0]);
 526             }
 527           SYNTAX("addc  %0, #%1");
 528 #line 227 "rl78-decode.opc"
 529           ID(addc); DR(A); SC(IMMU(1)); Fzac;
 530
 531         }
 532       break;
 533     case 0x1d:
 534         {
 535           /** 0001 1101                 addc    %0, %e1%1                       */
 536           if (trace)
 537             {
 538               printf ("\033[33m%s\033[0m  %02x\n",
 539                      "/** 0001 1101                     addc    %0, %e1%1                       */",
 540                      op[0]);
 541             }
 542           SYNTAX("addc  %0, %e1%1");
 543 #line 215 "rl78-decode.opc"
 544           ID(addc); DR(A); SM(HL, 0); Fzac;
 545
 546         }
 547       break;
 548     case 0x1e:
 549         {
 550           /** 0001 1110                 addc    %0, %e1%1                       */
 551           if (trace)
 552             {
 553               printf ("\033[33m%s\033[0m  %02x\n",
 554                      "/** 0001 1110                     addc    %0, %e1%1                       */",
 555                      op[0]);
 556             }
 557           SYNTAX("addc  %0, %e1%1");
 558 #line 224 "rl78-decode.opc"
 559           ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
 560
 561         }
 562       break;
 563     case 0x1f:
 564         {
 565           /** 0001 1111                 addc    %0, %e1%!1                      */
 566           if (trace)
 567             {
 568               printf ("\033[33m%s\033[0m  %02x\n",
 569                      "/** 0001 1111                     addc    %0, %e1%!1                      */",
 570                      op[0]);
 571             }
 572           SYNTAX("addc  %0, %e1%!1");
 573 #line 212 "rl78-decode.opc"
 574           ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
 575
 576         }
 577       break;
 578     case 0x20:
 579         {
 580           /** 0010 0000                 subw    %0, #%1                         */
 581           if (trace)
 582             {
 583               printf ("\033[33m%s\033[0m  %02x\n",
 584                      "/** 0010 0000                     subw    %0, #%1                         */",
 585                      op[0]);
 586             }
 587           SYNTAX("subw  %0, #%1");
 588 #line 1174 "rl78-decode.opc"
 589           ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac;
 590
 591         /*----------------------------------------------------------------------*/
 592
 593         }
 594       break;
 595     case 0x21:
 596     case 0x23:
 597     case 0x25:
 598     case 0x27:
 599         {
 600           /** 0010 0rw1                 subw    %0, %1                          */
 601 #line 1168 "rl78-decode.opc"
 602           int rw AU = (op[0] >> 1) & 0x03;
 603           if (trace)
 604             {
 605               printf ("\033[33m%s\033[0m  %02x\n",
 606                      "/** 0010 0rw1                     subw    %0, %1                          */",
 607                      op[0]);
 608               printf ("  rw = 0x%x\n", rw);
 609             }
 610           SYNTAX("subw  %0, %1");
 611 #line 1168 "rl78-decode.opc"
 612           ID(sub); W(); DR(AX); SRW(rw); Fzac;
 613
 614         }
 615       break;
 616     case 0x22:
 617         {
 618           /** 0010 0010                 subw    %0, %e1%!1                      */
 619           if (trace)
 620             {
 621               printf ("\033[33m%s\033[0m  %02x\n",
 622                      "/** 0010 0010                     subw    %0, %e1%!1                      */",
 623                      op[0]);
 624             }
 625           SYNTAX("subw  %0, %e1%!1");
 626 #line 1159 "rl78-decode.opc"
 627           ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 628
 629         }
 630       break;
 631     case 0x24:
 632         {
 633           /** 0010 0100                 subw    %0, #%1                         */
 634           if (trace)
 635             {
 636               printf ("\033[33m%s\033[0m  %02x\n",
 637                      "/** 0010 0100                     subw    %0, #%1                         */",
 638                      op[0]);
 639             }
 640           SYNTAX("subw  %0, #%1");
 641 #line 1165 "rl78-decode.opc"
 642           ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac;
 643
 644         }
 645       break;
 646     case 0x26:
 647         {
 648           /** 0010 0110                 subw    %0, %1                          */
 649           if (trace)
 650             {
 651               printf ("\033[33m%s\033[0m  %02x\n",
 652                      "/** 0010 0110                     subw    %0, %1                          */",
 653                      op[0]);
 654             }
 655           SYNTAX("subw  %0, %1");
 656 #line 1171 "rl78-decode.opc"
 657           ID(sub); W(); DR(AX); SM(None, SADDR); Fzac;
 658
 659         }
 660       break;
 661     case 0x28:
 662         {
 663           /** 0010 1000                 mov     %e0%0, %1                       */
 664           if (trace)
 665             {
 666               printf ("\033[33m%s\033[0m  %02x\n",
 667                      "/** 0010 1000                     mov     %e0%0, %1                       */",
 668                      op[0]);
 669             }
 670           SYNTAX("mov   %e0%0, %1");
 671 #line 720 "rl78-decode.opc"
 672           ID(mov); DM(C, IMMU(2)); SR(A);
 673
 674         }
 675       break;
 676     case 0x29:
 677         {
 678           /** 0010 1001                 mov     %0, %e1%1                       */
 679           if (trace)
 680             {
 681               printf ("\033[33m%s\033[0m  %02x\n",
 682                      "/** 0010 1001                     mov     %0, %e1%1                       */",
 683                      op[0]);
 684             }
 685           SYNTAX("mov   %0, %e1%1");
 686 #line 663 "rl78-decode.opc"
 687           ID(mov); DR(A); SM(C, IMMU(2));
 688
 689         }
 690       break;
 691     case 0x2a:
 692         {
 693           /** 0010 1010                 sub     %0, #%1                         */
 694           if (trace)
 695             {
 696               printf ("\033[33m%s\033[0m  %02x\n",
 697                      "/** 0010 1010                     sub     %0, #%1                         */",
 698                      op[0]);
 699             }
 700           SYNTAX("sub   %0, #%1");
 701 #line 1122 "rl78-decode.opc"
 702           ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac;
 703
 704         /*----------------------------------------------------------------------*/
 705
 706         }
 707       break;
 708     case 0x2b:
 709         {
 710           /** 0010 1011                 sub     %0, %1                          */
 711           if (trace)
 712             {
 713               printf ("\033[33m%s\033[0m  %02x\n",
 714                      "/** 0010 1011                     sub     %0, %1                          */",
 715                      op[0]);
 716             }
 717           SYNTAX("sub   %0, %1");
 718 #line 1116 "rl78-decode.opc"
 719           ID(sub); DR(A); SM(None, SADDR); Fzac;
 720
 721         }
 722       break;
 723     case 0x2c:
 724         {
 725           /** 0010 1100                 sub     %0, #%1                         */
 726           if (trace)
 727             {
 728               printf ("\033[33m%s\033[0m  %02x\n",
 729                      "/** 0010 1100                     sub     %0, #%1                         */",
 730                      op[0]);
 731             }
 732           SYNTAX("sub   %0, #%1");
 733 #line 1110 "rl78-decode.opc"
 734           ID(sub); DR(A); SC(IMMU(1)); Fzac;
 735
 736         }
 737       break;
 738     case 0x2d:
 739         {
 740           /** 0010 1101                 sub     %0, %e1%1                       */
 741           if (trace)
 742             {
 743               printf ("\033[33m%s\033[0m  %02x\n",
 744                      "/** 0010 1101                     sub     %0, %e1%1                       */",
 745                      op[0]);
 746             }
 747           SYNTAX("sub   %0, %e1%1");
 748 #line 1098 "rl78-decode.opc"
 749           ID(sub); DR(A); SM(HL, 0); Fzac;
 750
 751         }
 752       break;
 753     case 0x2e:
 754         {
 755           /** 0010 1110                 sub     %0, %e1%1                       */
 756           if (trace)
 757             {
 758               printf ("\033[33m%s\033[0m  %02x\n",
 759                      "/** 0010 1110                     sub     %0, %e1%1                       */",
 760                      op[0]);
 761             }
 762           SYNTAX("sub   %0, %e1%1");
 763 #line 1104 "rl78-decode.opc"
 764           ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
 765
 766         }
 767       break;
 768     case 0x2f:
 769         {
 770           /** 0010 1111                 sub     %0, %e1%!1                      */
 771           if (trace)
 772             {
 773               printf ("\033[33m%s\033[0m  %02x\n",
 774                      "/** 0010 1111                     sub     %0, %e1%!1                      */",
 775                      op[0]);
 776             }
 777           SYNTAX("sub   %0, %e1%!1");
 778 #line 1095 "rl78-decode.opc"
 779           ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
 780
 781         }
 782       break;
 783     case 0x30:
 784     case 0x32:
 785     case 0x34:
 786     case 0x36:
 787         {
 788           /** 0011 0rg0                 movw    %0, #%1                         */
 789 #line 829 "rl78-decode.opc"
 790           int rg AU = (op[0] >> 1) & 0x03;
 791           if (trace)
 792             {
 793               printf ("\033[33m%s\033[0m  %02x\n",
 794                      "/** 0011 0rg0                     movw    %0, #%1                         */",
 795                      op[0]);
 796               printf ("  rg = 0x%x\n", rg);
 797             }
 798           SYNTAX("movw  %0, #%1");
 799 #line 829 "rl78-decode.opc"
 800           ID(mov); W(); DRW(rg); SC(IMMU(2));
 801
 802         }
 803       break;
 804     case 0x31:
 805         GETBYTE ();
 806         switch (op[1] & 0x8f)
 807         {
 808           case 0x00:
 809               {
 810                 /** 0011 0001 0bit 0000         btclr   %s1, $%a0                       */
 811 #line 395 "rl78-decode.opc"
 812                 int bit AU = (op[1] >> 4) & 0x07;
 813                 if (trace)
 814                   {
 815                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 816                            "/** 0011 0001 0bit 0000             btclr   %s1, $%a0                       */",
 817                            op[0], op[1]);
 818                     printf ("  bit = 0x%x\n", bit);
 819                   }
 820                 SYNTAX("btclr   %s1, $%a0");
 821 #line 395 "rl78-decode.opc"
 822                 ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
 823
 824               /*----------------------------------------------------------------------*/
 825
 826               }
 827             break;
 828           case 0x01:
 829               {
 830                 /** 0011 0001 0bit 0001         btclr   %1, $%a0                        */
 831 #line 389 "rl78-decode.opc"
 832                 int bit AU = (op[1] >> 4) & 0x07;
 833                 if (trace)
 834                   {
 835                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 836                            "/** 0011 0001 0bit 0001             btclr   %1, $%a0                        */",
 837                            op[0], op[1]);
 838                     printf ("  bit = 0x%x\n", bit);
 839                   }
 840                 SYNTAX("btclr   %1, $%a0");
 841 #line 389 "rl78-decode.opc"
 842                 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
 843
 844               }
 845             break;
 846           case 0x02:
 847               {
 848                 /** 0011 0001 0bit 0010         bt      %s1, $%a0                       */
 849 #line 381 "rl78-decode.opc"
 850                 int bit AU = (op[1] >> 4) & 0x07;
 851                 if (trace)
 852                   {
 853                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 854                            "/** 0011 0001 0bit 0010             bt      %s1, $%a0                       */",
 855                            op[0], op[1]);
 856                     printf ("  bit = 0x%x\n", bit);
 857                   }
 858                 SYNTAX("bt      %s1, $%a0");
 859 #line 381 "rl78-decode.opc"
 860                 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
 861
 862               /*----------------------------------------------------------------------*/
 863
 864               }
 865             break;
 866           case 0x03:
 867               {
 868                 /** 0011 0001 0bit 0011         bt      %1, $%a0                        */
 869 #line 375 "rl78-decode.opc"
 870                 int bit AU = (op[1] >> 4) & 0x07;
 871                 if (trace)
 872                   {
 873                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 874                            "/** 0011 0001 0bit 0011             bt      %1, $%a0                        */",
 875                            op[0], op[1]);
 876                     printf ("  bit = 0x%x\n", bit);
 877                   }
 878                 SYNTAX("bt      %1, $%a0");
 879 #line 375 "rl78-decode.opc"
 880                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
 881
 882               }
 883             break;
 884           case 0x04:
 885               {
 886                 /** 0011 0001 0bit 0100         bf      %s1, $%a0                       */
 887 #line 342 "rl78-decode.opc"
 888                 int bit AU = (op[1] >> 4) & 0x07;
 889                 if (trace)
 890                   {
 891                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 892                            "/** 0011 0001 0bit 0100             bf      %s1, $%a0                       */",
 893                            op[0], op[1]);
 894                     printf ("  bit = 0x%x\n", bit);
 895                   }
 896                 SYNTAX("bf      %s1, $%a0");
 897 #line 342 "rl78-decode.opc"
 898                 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
 899
 900               /*----------------------------------------------------------------------*/
 901
 902               }
 903             break;
 904           case 0x05:
 905               {
 906                 /** 0011 0001 0bit 0101         bf      %1, $%a0                        */
 907 #line 336 "rl78-decode.opc"
 908                 int bit AU = (op[1] >> 4) & 0x07;
 909                 if (trace)
 910                   {
 911                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 912                            "/** 0011 0001 0bit 0101             bf      %1, $%a0                        */",
 913                            op[0], op[1]);
 914                     printf ("  bit = 0x%x\n", bit);
 915                   }
 916                 SYNTAX("bf      %1, $%a0");
 917 #line 336 "rl78-decode.opc"
 918                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F);
 919
 920               }
 921             break;
 922           case 0x07:
 923               {
 924                 /** 0011 0001 0cnt 0111         shl     %0, %1                          */
 925 #line 1051 "rl78-decode.opc"
 926                 int cnt AU = (op[1] >> 4) & 0x07;
 927                 if (trace)
 928                   {
 929                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 930                            "/** 0011 0001 0cnt 0111             shl     %0, %1                          */",
 931                            op[0], op[1]);
 932                     printf ("  cnt = 0x%x\n", cnt);
 933                   }
 934                 SYNTAX("shl     %0, %1");
 935 #line 1051 "rl78-decode.opc"
 936                 ID(shl); DR(C); SC(cnt);
 937
 938               }
 939             break;
 940           case 0x08:
 941               {
 942                 /** 0011 0001 0cnt 1000         shl     %0, %1                          */
 943 #line 1048 "rl78-decode.opc"
 944                 int cnt AU = (op[1] >> 4) & 0x07;
 945                 if (trace)
 946                   {
 947                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 948                            "/** 0011 0001 0cnt 1000             shl     %0, %1                          */",
 949                            op[0], op[1]);
 950                     printf ("  cnt = 0x%x\n", cnt);
 951                   }
 952                 SYNTAX("shl     %0, %1");
 953 #line 1048 "rl78-decode.opc"
 954                 ID(shl); DR(B); SC(cnt);
 955
 956               }
 957             break;
 958           case 0x09:
 959               {
 960                 /** 0011 0001 0cnt 1001         shl     %0, %1                          */
 961 #line 1045 "rl78-decode.opc"
 962                 int cnt AU = (op[1] >> 4) & 0x07;
 963                 if (trace)
 964                   {
 965                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 966                            "/** 0011 0001 0cnt 1001             shl     %0, %1                          */",
 967                            op[0], op[1]);
 968                     printf ("  cnt = 0x%x\n", cnt);
 969                   }
 970                 SYNTAX("shl     %0, %1");
 971 #line 1045 "rl78-decode.opc"
 972                 ID(shl); DR(A); SC(cnt);
 973
 974               }
 975             break;
 976           case 0x0a:
 977               {
 978                 /** 0011 0001 0cnt 1010         shr     %0, %1                          */
 979 #line 1062 "rl78-decode.opc"
 980                 int cnt AU = (op[1] >> 4) & 0x07;
 981                 if (trace)
 982                   {
 983                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 984                            "/** 0011 0001 0cnt 1010             shr     %0, %1                          */",
 985                            op[0], op[1]);
 986                     printf ("  cnt = 0x%x\n", cnt);
 987                   }
 988                 SYNTAX("shr     %0, %1");
 989 #line 1062 "rl78-decode.opc"
 990                 ID(shr); DR(A); SC(cnt);
 991
 992               }
 993             break;
 994           case 0x0b:
 995               {
 996                 /** 0011 0001 0cnt 1011         sar     %0, %1                          */
 997 #line 1009 "rl78-decode.opc"
 998                 int cnt AU = (op[1] >> 4) & 0x07;
 999                 if (trace)
1000                   {
1001                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1002                            "/** 0011 0001 0cnt 1011             sar     %0, %1                          */",
1003                            op[0], op[1]);
1004                     printf ("  cnt = 0x%x\n", cnt);
1005                   }
1006                 SYNTAX("sar     %0, %1");
1007 #line 1009 "rl78-decode.opc"
1008                 ID(sar); DR(A); SC(cnt);
1009
1010               }
1011             break;
1012           case 0x0c:
1013           case 0x8c:
1014               {
1015                 /** 0011 0001 wcnt 1100         shlw    %0, %1                          */
1016 #line 1057 "rl78-decode.opc"
1017                 int wcnt AU = (op[1] >> 4) & 0x0f;
1018                 if (trace)
1019                   {
1020                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1021                            "/** 0011 0001 wcnt 1100             shlw    %0, %1                          */",
1022                            op[0], op[1]);
1023                     printf ("  wcnt = 0x%x\n", wcnt);
1024                   }
1025                 SYNTAX("shlw    %0, %1");
1026 #line 1057 "rl78-decode.opc"
1027                 ID(shl); W(); DR(BC); SC(wcnt);
1028
1029               /*----------------------------------------------------------------------*/
1030
1031               }
1032             break;
1033           case 0x0d:
1034           case 0x8d:
1035               {
1036                 /** 0011 0001 wcnt 1101         shlw    %0, %1                          */
1037 #line 1054 "rl78-decode.opc"
1038                 int wcnt AU = (op[1] >> 4) & 0x0f;
1039                 if (trace)
1040                   {
1041                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1042                            "/** 0011 0001 wcnt 1101             shlw    %0, %1                          */",
1043                            op[0], op[1]);
1044                     printf ("  wcnt = 0x%x\n", wcnt);
1045                   }
1046                 SYNTAX("shlw    %0, %1");
1047 #line 1054 "rl78-decode.opc"
1048                 ID(shl); W(); DR(AX); SC(wcnt);
1049
1050               }
1051             break;
1052           case 0x0e:
1053           case 0x8e:
1054               {
1055                 /** 0011 0001 wcnt 1110         shrw    %0, %1                          */
1056 #line 1065 "rl78-decode.opc"
1057                 int wcnt AU = (op[1] >> 4) & 0x0f;
1058                 if (trace)
1059                   {
1060                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1061                            "/** 0011 0001 wcnt 1110             shrw    %0, %1                          */",
1062                            op[0], op[1]);
1063                     printf ("  wcnt = 0x%x\n", wcnt);
1064                   }
1065                 SYNTAX("shrw    %0, %1");
1066 #line 1065 "rl78-decode.opc"
1067                 ID(shr); W(); DR(AX); SC(wcnt);
1068
1069               /*----------------------------------------------------------------------*/
1070
1071               }
1072             break;
1073           case 0x0f:
1074           case 0x8f:
1075               {
1076                 /** 0011 0001 wcnt 1111         sarw    %0, %1                          */
1077 #line 1012 "rl78-decode.opc"
1078                 int wcnt AU = (op[1] >> 4) & 0x0f;
1079                 if (trace)
1080                   {
1081                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1082                            "/** 0011 0001 wcnt 1111             sarw    %0, %1                          */",
1083                            op[0], op[1]);
1084                     printf ("  wcnt = 0x%x\n", wcnt);
1085                   }
1086                 SYNTAX("sarw    %0, %1");
1087 #line 1012 "rl78-decode.opc"
1088                 ID(sar); W(); DR(AX); SC(wcnt);
1089
1090               /*----------------------------------------------------------------------*/
1091
1092               }
1093             break;
1094           case 0x80:
1095               {
1096                 /** 0011 0001 1bit 0000         btclr   %s1, $%a0                       */
1097 #line 392 "rl78-decode.opc"
1098                 int bit AU = (op[1] >> 4) & 0x07;
1099                 if (trace)
1100                   {
1101                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1102                            "/** 0011 0001 1bit 0000             btclr   %s1, $%a0                       */",
1103                            op[0], op[1]);
1104                     printf ("  bit = 0x%x\n", bit);
1105                   }
1106                 SYNTAX("btclr   %s1, $%a0");
1107 #line 392 "rl78-decode.opc"
1108                 ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1109
1110               }
1111             break;
1112           case 0x81:
1113               {
1114                 /** 0011 0001 1bit 0001         btclr   %e1%1, $%a0                     */
1115 #line 386 "rl78-decode.opc"
1116                 int bit AU = (op[1] >> 4) & 0x07;
1117                 if (trace)
1118                   {
1119                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1120                            "/** 0011 0001 1bit 0001             btclr   %e1%1, $%a0                     */",
1121                            op[0], op[1]);
1122                     printf ("  bit = 0x%x\n", bit);
1123                   }
1124                 SYNTAX("btclr   %e1%1, $%a0");
1125 #line 386 "rl78-decode.opc"
1126                 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1127
1128               }
1129             break;
1130           case 0x82:
1131               {
1132                 /** 0011 0001 1bit 0010         bt      %s1, $%a0                       */
1133 #line 378 "rl78-decode.opc"
1134                 int bit AU = (op[1] >> 4) & 0x07;
1135                 if (trace)
1136                   {
1137                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1138                            "/** 0011 0001 1bit 0010             bt      %s1, $%a0                       */",
1139                            op[0], op[1]);
1140                     printf ("  bit = 0x%x\n", bit);
1141                   }
1142                 SYNTAX("bt      %s1, $%a0");
1143 #line 378 "rl78-decode.opc"
1144                 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1145
1146               }
1147             break;
1148           case 0x83:
1149               {
1150                 /** 0011 0001 1bit 0011         bt      %e1%1, $%a0                     */
1151 #line 372 "rl78-decode.opc"
1152                 int bit AU = (op[1] >> 4) & 0x07;
1153                 if (trace)
1154                   {
1155                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1156                            "/** 0011 0001 1bit 0011             bt      %e1%1, $%a0                     */",
1157                            op[0], op[1]);
1158                     printf ("  bit = 0x%x\n", bit);
1159                   }
1160                 SYNTAX("bt      %e1%1, $%a0");
1161 #line 372 "rl78-decode.opc"
1162                 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1163
1164               }
1165             break;
1166           case 0x84:
1167               {
1168                 /** 0011 0001 1bit 0100         bf      %s1, $%a0                       */
1169 #line 339 "rl78-decode.opc"
1170                 int bit AU = (op[1] >> 4) & 0x07;
1171                 if (trace)
1172                   {
1173                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1174                            "/** 0011 0001 1bit 0100             bf      %s1, $%a0                       */",
1175                            op[0], op[1]);
1176                     printf ("  bit = 0x%x\n", bit);
1177                   }
1178                 SYNTAX("bf      %s1, $%a0");
1179 #line 339 "rl78-decode.opc"
1180                 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
1181
1182               }
1183             break;
1184           case 0x85:
1185               {
1186                 /** 0011 0001 1bit 0101         bf      %e1%1, $%a0                     */
1187 #line 333 "rl78-decode.opc"
1188                 int bit AU = (op[1] >> 4) & 0x07;
1189                 if (trace)
1190                   {
1191                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1192                            "/** 0011 0001 1bit 0101             bf      %e1%1, $%a0                     */",
1193                            op[0], op[1]);
1194                     printf ("  bit = 0x%x\n", bit);
1195                   }
1196                 SYNTAX("bf      %e1%1, $%a0");
1197 #line 333 "rl78-decode.opc"
1198                 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
1199
1200               }
1201             break;
1202           default: UNSUPPORTED(); break;
1203         }
1204       break;
1205     case 0x33:
1206     case 0x35:
1207     case 0x37:
1208         {
1209           /** 0011 0ra1                 xchw    %0, %1                          */
1210 #line 1215 "rl78-decode.opc"
1211           int ra AU = (op[0] >> 1) & 0x03;
1212           if (trace)
1213             {
1214               printf ("\033[33m%s\033[0m  %02x\n",
1215                      "/** 0011 0ra1                     xchw    %0, %1                          */",
1216                      op[0]);
1217               printf ("  ra = 0x%x\n", ra);
1218             }
1219           SYNTAX("xchw  %0, %1");
1220 #line 1215 "rl78-decode.opc"
1221           ID(xch); W(); DR(AX); SRW(ra);
1222
1223         /*----------------------------------------------------------------------*/
1224
1225         }
1226       break;
1227     case 0x38:
1228         {
1229           /** 0011 1000                 mov     %e0%0, #%1                      */
1230           if (trace)
1231             {
1232               printf ("\033[33m%s\033[0m  %02x\n",
1233                      "/** 0011 1000                     mov     %e0%0, #%1                      */",
1234                      op[0]);
1235             }
1236           SYNTAX("mov   %e0%0, #%1");
1237 #line 717 "rl78-decode.opc"
1238           ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
1239
1240         }
1241       break;
1242     case 0x39:
1243         {
1244           /** 0011 1001                 mov     %e0%0, #%1                      */
1245           if (trace)
1246             {
1247               printf ("\033[33m%s\033[0m  %02x\n",
1248                      "/** 0011 1001                     mov     %e0%0, #%1                      */",
1249                      op[0]);
1250             }
1251           SYNTAX("mov   %e0%0, #%1");
1252 #line 711 "rl78-decode.opc"
1253           ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
1254
1255         }
1256       break;
1257     case 0x3a:
1258         {
1259           /** 0011 1010                 subc    %0, #%1                         */
1260           if (trace)
1261             {
1262               printf ("\033[33m%s\033[0m  %02x\n",
1263                      "/** 0011 1010                     subc    %0, #%1                         */",
1264                      op[0]);
1265             }
1266           SYNTAX("subc  %0, #%1");
1267 #line 1154 "rl78-decode.opc"
1268           ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac;
1269
1270         /*----------------------------------------------------------------------*/
1271
1272         }
1273       break;
1274     case 0x3b:
1275         {
1276           /** 0011 1011                 subc    %0, %1                          */
1277           if (trace)
1278             {
1279               printf ("\033[33m%s\033[0m  %02x\n",
1280                      "/** 0011 1011                     subc    %0, %1                          */",
1281                      op[0]);
1282             }
1283           SYNTAX("subc  %0, %1");
1284 #line 1151 "rl78-decode.opc"
1285           ID(subc); DR(A); SM(None, SADDR); Fzac;
1286
1287         }
1288       break;
1289     case 0x3c:
1290         {
1291           /** 0011 1100                 subc    %0, #%1                         */
1292           if (trace)
1293             {
1294               printf ("\033[33m%s\033[0m  %02x\n",
1295                      "/** 0011 1100                     subc    %0, #%1                         */",
1296                      op[0]);
1297             }
1298           SYNTAX("subc  %0, #%1");
1299 #line 1142 "rl78-decode.opc"
1300           ID(subc); DR(A); SC(IMMU(1)); Fzac;
1301
1302         }
1303       break;
1304     case 0x3d:
1305         {
1306           /** 0011 1101                 subc    %0, %e1%1                       */
1307           if (trace)
1308             {
1309               printf ("\033[33m%s\033[0m  %02x\n",
1310                      "/** 0011 1101                     subc    %0, %e1%1                       */",
1311                      op[0]);
1312             }
1313           SYNTAX("subc  %0, %e1%1");
1314 #line 1130 "rl78-decode.opc"
1315           ID(subc); DR(A); SM(HL, 0); Fzac;
1316
1317         }
1318       break;
1319     case 0x3e:
1320         {
1321           /** 0011 1110                 subc    %0, %e1%1                       */
1322           if (trace)
1323             {
1324               printf ("\033[33m%s\033[0m  %02x\n",
1325                      "/** 0011 1110                     subc    %0, %e1%1                       */",
1326                      op[0]);
1327             }
1328           SYNTAX("subc  %0, %e1%1");
1329 #line 1139 "rl78-decode.opc"
1330           ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
1331
1332         }
1333       break;
1334     case 0x3f:
1335         {
1336           /** 0011 1111                 subc    %0, %e1%!1                      */
1337           if (trace)
1338             {
1339               printf ("\033[33m%s\033[0m  %02x\n",
1340                      "/** 0011 1111                     subc    %0, %e1%!1                      */",
1341                      op[0]);
1342             }
1343           SYNTAX("subc  %0, %e1%!1");
1344 #line 1127 "rl78-decode.opc"
1345           ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
1346
1347         }
1348       break;
1349     case 0x40:
1350         {
1351           /** 0100 0000                 cmp     %e0%!0, #%1                     */
1352           if (trace)
1353             {
1354               printf ("\033[33m%s\033[0m  %02x\n",
1355                      "/** 0100 0000                     cmp     %e0%!0, #%1                     */",
1356                      op[0]);
1357             }
1358           SYNTAX("cmp   %e0%!0, #%1");
1359 #line 459 "rl78-decode.opc"
1360           ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
1361
1362         }
1363       break;
1364     case 0x41:
1365         {
1366           /** 0100 0001                 mov     %0, #%1                         */
1367           if (trace)
1368             {
1369               printf ("\033[33m%s\033[0m  %02x\n",
1370                      "/** 0100 0001                     mov     %0, #%1                         */",
1371                      op[0]);
1372             }
1373           SYNTAX("mov   %0, #%1");
1374 #line 696 "rl78-decode.opc"
1375           ID(mov); DR(ES); SC(IMMU(1));
1376
1377         }
1378       break;
1379     case 0x42:
1380         {
1381           /** 0100 0010                 cmpw    %0, %e1%!1                      */
1382           if (trace)
1383             {
1384               printf ("\033[33m%s\033[0m  %02x\n",
1385                      "/** 0100 0010                     cmpw    %0, %e1%!1                      */",
1386                      op[0]);
1387             }
1388           SYNTAX("cmpw  %0, %e1%!1");
1389 #line 510 "rl78-decode.opc"
1390           ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
1391
1392         }
1393       break;
1394     case 0x43:
1395     case 0x45:
1396     case 0x47:
1397         {
1398           /** 0100 0ra1                 cmpw    %0, %1                          */
1399 #line 519 "rl78-decode.opc"
1400           int ra AU = (op[0] >> 1) & 0x03;
1401           if (trace)
1402             {
1403               printf ("\033[33m%s\033[0m  %02x\n",
1404                      "/** 0100 0ra1                     cmpw    %0, %1                          */",
1405                      op[0]);
1406               printf ("  ra = 0x%x\n", ra);
1407             }
1408           SYNTAX("cmpw  %0, %1");
1409 #line 519 "rl78-decode.opc"
1410           ID(cmp); W(); DR(AX); SRW(ra); Fzac;
1411
1412         }
1413       break;
1414     case 0x44:
1415         {
1416           /** 0100 0100                 cmpw    %0, #%1                         */
1417           if (trace)
1418             {
1419               printf ("\033[33m%s\033[0m  %02x\n",
1420                      "/** 0100 0100                     cmpw    %0, #%1                         */",
1421                      op[0]);
1422             }
1423           SYNTAX("cmpw  %0, #%1");
1424 #line 516 "rl78-decode.opc"
1425           ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac;
1426
1427         }
1428       break;
1429     case 0x46:
1430         {
1431           /** 0100 0110                 cmpw    %0, %1                          */
1432           if (trace)
1433             {
1434               printf ("\033[33m%s\033[0m  %02x\n",
1435                      "/** 0100 0110                     cmpw    %0, %1                          */",
1436                      op[0]);
1437             }
1438           SYNTAX("cmpw  %0, %1");
1439 #line 522 "rl78-decode.opc"
1440           ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac;
1441
1442         /*----------------------------------------------------------------------*/
1443
1444         }
1445       break;
1446     case 0x48:
1447         {
1448           /** 0100 1000                 mov     %e0%0, %1                       */
1449           if (trace)
1450             {
1451               printf ("\033[33m%s\033[0m  %02x\n",
1452                      "/** 0100 1000                     mov     %e0%0, %1                       */",
1453                      op[0]);
1454             }
1455           SYNTAX("mov   %e0%0, %1");
1456 #line 714 "rl78-decode.opc"
1457           ID(mov); DM(BC, IMMU(2)); SR(A);
1458
1459         }
1460       break;
1461     case 0x49:
1462         {
1463           /** 0100 1001                 mov     %0, %e1%1                       */
1464           if (trace)
1465             {
1466               printf ("\033[33m%s\033[0m  %02x\n",
1467                      "/** 0100 1001                     mov     %0, %e1%1                       */",
1468                      op[0]);
1469             }
1470           SYNTAX("mov   %0, %e1%1");
1471 #line 660 "rl78-decode.opc"
1472           ID(mov); DR(A); SM(BC, IMMU(2));
1473
1474         }
1475       break;
1476     case 0x4a:
1477         {
1478           /** 0100 1010                 cmp     %0, #%1                         */
1479           if (trace)
1480             {
1481               printf ("\033[33m%s\033[0m  %02x\n",
1482                      "/** 0100 1010                     cmp     %0, #%1                         */",
1483                      op[0]);
1484             }
1485           SYNTAX("cmp   %0, #%1");
1486 #line 462 "rl78-decode.opc"
1487           ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
1488
1489         }
1490       break;
1491     case 0x4b:
1492         {
1493           /** 0100 1011                 cmp     %0, %1                          */
1494           if (trace)
1495             {
1496               printf ("\033[33m%s\033[0m  %02x\n",
1497                      "/** 0100 1011                     cmp     %0, %1                          */",
1498                      op[0]);
1499             }
1500           SYNTAX("cmp   %0, %1");
1501 #line 489 "rl78-decode.opc"
1502           ID(cmp); DR(A); SM(None, SADDR); Fzac;
1503
1504         /*----------------------------------------------------------------------*/
1505
1506         }
1507       break;
1508     case 0x4c:
1509         {
1510           /** 0100 1100                 cmp     %0, #%1                         */
1511           if (trace)
1512             {
1513               printf ("\033[33m%s\033[0m  %02x\n",
1514                      "/** 0100 1100                     cmp     %0, #%1                         */",
1515                      op[0]);
1516             }
1517           SYNTAX("cmp   %0, #%1");
1518 #line 480 "rl78-decode.opc"
1519           ID(cmp); DR(A); SC(IMMU(1)); Fzac;
1520
1521         }
1522       break;
1523     case 0x4d:
1524         {
1525           /** 0100 1101                 cmp     %0, %e1%1                       */
1526           if (trace)
1527             {
1528               printf ("\033[33m%s\033[0m  %02x\n",
1529                      "/** 0100 1101                     cmp     %0, %e1%1                       */",
1530                      op[0]);
1531             }
1532           SYNTAX("cmp   %0, %e1%1");
1533 #line 468 "rl78-decode.opc"
1534           ID(cmp); DR(A); SM(HL, 0); Fzac;
1535
1536         }
1537       break;
1538     case 0x4e:
1539         {
1540           /** 0100 1110                 cmp     %0, %e1%1                       */
1541           if (trace)
1542             {
1543               printf ("\033[33m%s\033[0m  %02x\n",
1544                      "/** 0100 1110                     cmp     %0, %e1%1                       */",
1545                      op[0]);
1546             }
1547           SYNTAX("cmp   %0, %e1%1");
1548 #line 477 "rl78-decode.opc"
1549           ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
1550
1551         }
1552       break;
1553     case 0x4f:
1554         {
1555           /** 0100 1111                 cmp     %0, %e1%!1                      */
1556           if (trace)
1557             {
1558               printf ("\033[33m%s\033[0m  %02x\n",
1559                      "/** 0100 1111                     cmp     %0, %e1%!1                      */",
1560                      op[0]);
1561             }
1562           SYNTAX("cmp   %0, %e1%!1");
1563 #line 465 "rl78-decode.opc"
1564           ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
1565
1566         }
1567       break;
1568     case 0x50:
1569     case 0x51:
1570     case 0x52:
1571     case 0x53:
1572     case 0x54:
1573     case 0x55:
1574     case 0x56:
1575     case 0x57:
1576         {
1577           /** 0101 0reg                 mov     %0, #%1                         */
1578 #line 648 "rl78-decode.opc"
1579           int reg AU = op[0] & 0x07;
1580           if (trace)
1581             {
1582               printf ("\033[33m%s\033[0m  %02x\n",
1583                      "/** 0101 0reg                     mov     %0, #%1                         */",
1584                      op[0]);
1585               printf ("  reg = 0x%x\n", reg);
1586             }
1587           SYNTAX("mov   %0, #%1");
1588 #line 648 "rl78-decode.opc"
1589           ID(mov); DRB(reg); SC(IMMU(1));
1590
1591         }
1592       break;
1593     case 0x58:
1594         {
1595           /** 0101 1000                 movw    %e0%0, %1                       */
1596           if (trace)
1597             {
1598               printf ("\033[33m%s\033[0m  %02x\n",
1599                      "/** 0101 1000                     movw    %e0%0, %1                       */",
1600                      op[0]);
1601             }
1602           SYNTAX("movw  %e0%0, %1");
1603 #line 847 "rl78-decode.opc"
1604           ID(mov); W(); DM(B, IMMU(2)); SR(AX);
1605
1606         }
1607       break;
1608     case 0x59:
1609         {
1610           /** 0101 1001                 movw    %0, %e1%1                       */
1611           if (trace)
1612             {
1613               printf ("\033[33m%s\033[0m  %02x\n",
1614                      "/** 0101 1001                     movw    %0, %e1%1                       */",
1615                      op[0]);
1616             }
1617           SYNTAX("movw  %0, %e1%1");
1618 #line 838 "rl78-decode.opc"
1619           ID(mov); W(); DR(AX); SM(B, IMMU(2));
1620
1621         }
1622       break;
1623     case 0x5a:
1624         {
1625           /** 0101 1010                 and     %0, #%1                         */
1626           if (trace)
1627             {
1628               printf ("\033[33m%s\033[0m  %02x\n",
1629                      "/** 0101 1010                     and     %0, #%1                         */",
1630                      op[0]);
1631             }
1632           SYNTAX("and   %0, #%1");
1633 #line 291 "rl78-decode.opc"
1634           ID(and); DM(None, SADDR); SC(IMMU(1)); Fz;
1635
1636         /*----------------------------------------------------------------------*/
1637
1638         }
1639       break;
1640     case 0x5b:
1641         {
1642           /** 0101 1011                 and     %0, %1                          */
1643           if (trace)
1644             {
1645               printf ("\033[33m%s\033[0m  %02x\n",
1646                      "/** 0101 1011                     and     %0, %1                          */",
1647                      op[0]);
1648             }
1649           SYNTAX("and   %0, %1");
1650 #line 288 "rl78-decode.opc"
1651           ID(and); DR(A); SM(None, SADDR); Fz;
1652
1653         }
1654       break;
1655     case 0x5c:
1656         {
1657           /** 0101 1100                 and     %0, #%1                         */
1658           if (trace)
1659             {
1660               printf ("\033[33m%s\033[0m  %02x\n",
1661                      "/** 0101 1100                     and     %0, #%1                         */",
1662                      op[0]);
1663             }
1664           SYNTAX("and   %0, #%1");
1665 #line 279 "rl78-decode.opc"
1666           ID(and); DR(A); SC(IMMU(1)); Fz;
1667
1668         }
1669       break;
1670     case 0x5d:
1671         {
1672           /** 0101 1101                 and     %0, %e1%1                       */
1673           if (trace)
1674             {
1675               printf ("\033[33m%s\033[0m  %02x\n",
1676                      "/** 0101 1101                     and     %0, %e1%1                       */",
1677                      op[0]);
1678             }
1679           SYNTAX("and   %0, %e1%1");
1680 #line 267 "rl78-decode.opc"
1681           ID(and); DR(A); SM(HL, 0); Fz;
1682
1683         }
1684       break;
1685     case 0x5e:
1686         {
1687           /** 0101 1110                 and     %0, %e1%1                       */
1688           if (trace)
1689             {
1690               printf ("\033[33m%s\033[0m  %02x\n",
1691                      "/** 0101 1110                     and     %0, %e1%1                       */",
1692                      op[0]);
1693             }
1694           SYNTAX("and   %0, %e1%1");
1695 #line 273 "rl78-decode.opc"
1696           ID(and); DR(A); SM(HL, IMMU(1)); Fz;
1697
1698         }
1699       break;
1700     case 0x5f:
1701         {
1702           /** 0101 1111                 and     %0, %e1%!1                      */
1703           if (trace)
1704             {
1705               printf ("\033[33m%s\033[0m  %02x\n",
1706                      "/** 0101 1111                     and     %0, %e1%!1                      */",
1707                      op[0]);
1708             }
1709           SYNTAX("and   %0, %e1%!1");
1710 #line 264 "rl78-decode.opc"
1711           ID(and); DR(A); SM(None, IMMU(2)); Fz;
1712
1713         }
1714       break;
1715     case 0x60:
1716     case 0x62:
1717     case 0x63:
1718     case 0x64:
1719     case 0x65:
1720     case 0x66:
1721     case 0x67:
1722         {
1723           /** 0110 0rba                 mov     %0, %1                          */
1724 #line 651 "rl78-decode.opc"
1725           int rba AU = op[0] & 0x07;
1726           if (trace)
1727             {
1728               printf ("\033[33m%s\033[0m  %02x\n",
1729                      "/** 0110 0rba                     mov     %0, %1                          */",
1730                      op[0]);
1731               printf ("  rba = 0x%x\n", rba);
1732             }
1733           SYNTAX("mov   %0, %1");
1734 #line 651 "rl78-decode.opc"
1735           ID(mov); DR(A); SRB(rba);
1736
1737         }
1738       break;
1739     case 0x61:
1740         GETBYTE ();
1741         switch (op[1] & 0xff)
1742         {
1743           case 0x00:
1744           case 0x01:
1745           case 0x02:
1746           case 0x03:
1747           case 0x04:
1748           case 0x05:
1749           case 0x06:
1750           case 0x07:
1751               {
1752                 /** 0110 0001 0000 0reg         add     %0, %1                          */
1753 #line 204 "rl78-decode.opc"
1754                 int reg AU = op[1] & 0x07;
1755                 if (trace)
1756                   {
1757                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1758                            "/** 0110 0001 0000 0reg             add     %0, %1                          */",
1759                            op[0], op[1]);
1760                     printf ("  reg = 0x%x\n", reg);
1761                   }
1762                 SYNTAX("add     %0, %1");
1763 #line 204 "rl78-decode.opc"
1764                 ID(add); DRB(reg); SR(A); Fzac;
1765
1766               }
1767             break;
1768           case 0x08:
1769           case 0x0a:
1770           case 0x0b:
1771           case 0x0c:
1772           case 0x0d:
1773           case 0x0e:
1774           case 0x0f:
1775               {
1776                 /** 0110 0001 0000 1rba         add     %0, %1                          */
1777 #line 198 "rl78-decode.opc"
1778                 int rba AU = op[1] & 0x07;
1779                 if (trace)
1780                   {
1781                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1782                            "/** 0110 0001 0000 1rba             add     %0, %1                          */",
1783                            op[0], op[1]);
1784                     printf ("  rba = 0x%x\n", rba);
1785                   }
1786                 SYNTAX("add     %0, %1");
1787 #line 198 "rl78-decode.opc"
1788                 ID(add); DR(A); SRB(rba); Fzac;
1789
1790               }
1791             break;
1792           case 0x09:
1793               {
1794                 /** 0110 0001 0000 1001         addw    %0, %e1%1                       */
1795                 if (trace)
1796                   {
1797                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1798                            "/** 0110 0001 0000 1001             addw    %0, %e1%1                       */",
1799                            op[0], op[1]);
1800                   }
1801                 SYNTAX("addw    %0, %e1%1");
1802 #line 247 "rl78-decode.opc"
1803                 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1804
1805               }
1806             break;
1807           case 0x10:
1808           case 0x11:
1809           case 0x12:
1810           case 0x13:
1811           case 0x14:
1812           case 0x15:
1813           case 0x16:
1814           case 0x17:
1815               {
1816                 /** 0110 0001 0001 0reg         addc    %0, %1                          */
1817 #line 233 "rl78-decode.opc"
1818                 int reg AU = op[1] & 0x07;
1819                 if (trace)
1820                   {
1821                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1822                            "/** 0110 0001 0001 0reg             addc    %0, %1                          */",
1823                            op[0], op[1]);
1824                     printf ("  reg = 0x%x\n", reg);
1825                   }
1826                 SYNTAX("addc    %0, %1");
1827 #line 233 "rl78-decode.opc"
1828                 ID(addc); DRB(reg); SR(A); Fzac;
1829
1830               }
1831             break;
1832           case 0x18:
1833           case 0x1a:
1834           case 0x1b:
1835           case 0x1c:
1836           case 0x1d:
1837           case 0x1e:
1838           case 0x1f:
1839               {
1840                 /** 0110 0001 0001 1rba         addc    %0, %1                          */
1841 #line 230 "rl78-decode.opc"
1842                 int rba AU = op[1] & 0x07;
1843                 if (trace)
1844                   {
1845                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1846                            "/** 0110 0001 0001 1rba             addc    %0, %1                          */",
1847                            op[0], op[1]);
1848                     printf ("  rba = 0x%x\n", rba);
1849                   }
1850                 SYNTAX("addc    %0, %1");
1851 #line 230 "rl78-decode.opc"
1852                 ID(addc); DR(A); SRB(rba); Fzac;
1853
1854               }
1855             break;
1856           case 0x20:
1857           case 0x21:
1858           case 0x22:
1859           case 0x23:
1860           case 0x24:
1861           case 0x25:
1862           case 0x26:
1863           case 0x27:
1864               {
1865                 /** 0110 0001 0010 0reg         sub     %0, %1                          */
1866 #line 1119 "rl78-decode.opc"
1867                 int reg AU = op[1] & 0x07;
1868                 if (trace)
1869                   {
1870                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1871                            "/** 0110 0001 0010 0reg             sub     %0, %1                          */",
1872                            op[0], op[1]);
1873                     printf ("  reg = 0x%x\n", reg);
1874                   }
1875                 SYNTAX("sub     %0, %1");
1876 #line 1119 "rl78-decode.opc"
1877                 ID(sub); DRB(reg); SR(A); Fzac;
1878
1879               }
1880             break;
1881           case 0x28:
1882           case 0x2a:
1883           case 0x2b:
1884           case 0x2c:
1885           case 0x2d:
1886           case 0x2e:
1887           case 0x2f:
1888               {
1889                 /** 0110 0001 0010 1rba         sub     %0, %1                          */
1890 #line 1113 "rl78-decode.opc"
1891                 int rba AU = op[1] & 0x07;
1892                 if (trace)
1893                   {
1894                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1895                            "/** 0110 0001 0010 1rba             sub     %0, %1                          */",
1896                            op[0], op[1]);
1897                     printf ("  rba = 0x%x\n", rba);
1898                   }
1899                 SYNTAX("sub     %0, %1");
1900 #line 1113 "rl78-decode.opc"
1901                 ID(sub); DR(A); SRB(rba); Fzac;
1902
1903               }
1904             break;
1905           case 0x29:
1906               {
1907                 /** 0110 0001 0010 1001         subw    %0, %e1%1                       */
1908                 if (trace)
1909                   {
1910                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1911                            "/** 0110 0001 0010 1001             subw    %0, %e1%1                       */",
1912                            op[0], op[1]);
1913                   }
1914                 SYNTAX("subw    %0, %e1%1");
1915 #line 1162 "rl78-decode.opc"
1916                 ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1917
1918               }
1919             break;
1920           case 0x30:
1921           case 0x31:
1922           case 0x32:
1923           case 0x33:
1924           case 0x34:
1925           case 0x35:
1926           case 0x36:
1927           case 0x37:
1928               {
1929                 /** 0110 0001 0011 0reg         subc    %0, %1                          */
1930 #line 1148 "rl78-decode.opc"
1931                 int reg AU = op[1] & 0x07;
1932                 if (trace)
1933                   {
1934                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1935                            "/** 0110 0001 0011 0reg             subc    %0, %1                          */",
1936                            op[0], op[1]);
1937                     printf ("  reg = 0x%x\n", reg);
1938                   }
1939                 SYNTAX("subc    %0, %1");
1940 #line 1148 "rl78-decode.opc"
1941                 ID(subc); DRB(reg); SR(A); Fzac;
1942
1943               }
1944             break;
1945           case 0x38:
1946           case 0x3a:
1947           case 0x3b:
1948           case 0x3c:
1949           case 0x3d:
1950           case 0x3e:
1951           case 0x3f:
1952               {
1953                 /** 0110 0001 0011 1rba         subc    %0, %1                          */
1954 #line 1145 "rl78-decode.opc"
1955                 int rba AU = op[1] & 0x07;
1956                 if (trace)
1957                   {
1958                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1959                            "/** 0110 0001 0011 1rba             subc    %0, %1                          */",
1960                            op[0], op[1]);
1961                     printf ("  rba = 0x%x\n", rba);
1962                   }
1963                 SYNTAX("subc    %0, %1");
1964 #line 1145 "rl78-decode.opc"
1965                 ID(subc); DR(A); SRB(rba); Fzac;
1966
1967               }
1968             break;
1969           case 0x40:
1970           case 0x41:
1971           case 0x42:
1972           case 0x43:
1973           case 0x44:
1974           case 0x45:
1975           case 0x46:
1976           case 0x47:
1977               {
1978                 /** 0110 0001 0100 0reg         cmp     %0, %1                          */
1979 #line 486 "rl78-decode.opc"
1980                 int reg AU = op[1] & 0x07;
1981                 if (trace)
1982                   {
1983                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1984                            "/** 0110 0001 0100 0reg             cmp     %0, %1                          */",
1985                            op[0], op[1]);
1986                     printf ("  reg = 0x%x\n", reg);
1987                   }
1988                 SYNTAX("cmp     %0, %1");
1989 #line 486 "rl78-decode.opc"
1990                 ID(cmp); DRB(reg); SR(A); Fzac;
1991
1992               }
1993             break;
1994           case 0x48:
1995           case 0x4a:
1996           case 0x4b:
1997           case 0x4c:
1998           case 0x4d:
1999           case 0x4e:
2000           case 0x4f:
2001               {
2002                 /** 0110 0001 0100 1rba         cmp     %0, %1                          */
2003 #line 483 "rl78-decode.opc"
2004                 int rba AU = op[1] & 0x07;
2005                 if (trace)
2006                   {
2007                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2008                            "/** 0110 0001 0100 1rba             cmp     %0, %1                          */",
2009                            op[0], op[1]);
2010                     printf ("  rba = 0x%x\n", rba);
2011                   }
2012                 SYNTAX("cmp     %0, %1");
2013 #line 483 "rl78-decode.opc"
2014                 ID(cmp); DR(A); SRB(rba); Fzac;
2015
2016               }
2017             break;
2018           case 0x49:
2019               {
2020                 /** 0110 0001 0100 1001         cmpw    %0, %e1%1                       */
2021                 if (trace)
2022                   {
2023                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2024                            "/** 0110 0001 0100 1001             cmpw    %0, %e1%1                       */",
2025                            op[0], op[1]);
2026                   }
2027                 SYNTAX("cmpw    %0, %e1%1");
2028 #line 513 "rl78-decode.opc"
2029                 ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
2030
2031               }
2032             break;
2033           case 0x50:
2034           case 0x51:
2035           case 0x52:
2036           case 0x53:
2037           case 0x54:
2038           case 0x55:
2039           case 0x56:
2040           case 0x57:
2041               {
2042                 /** 0110 0001 0101 0reg         and     %0, %1                          */
2043 #line 285 "rl78-decode.opc"
2044                 int reg AU = op[1] & 0x07;
2045                 if (trace)
2046                   {
2047                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2048                            "/** 0110 0001 0101 0reg             and     %0, %1                          */",
2049                            op[0], op[1]);
2050                     printf ("  reg = 0x%x\n", reg);
2051                   }
2052                 SYNTAX("and     %0, %1");
2053 #line 285 "rl78-decode.opc"
2054                 ID(and); DRB(reg); SR(A); Fz;
2055
2056               }
2057             break;
2058           case 0x58:
2059           case 0x5a:
2060           case 0x5b:
2061           case 0x5c:
2062           case 0x5d:
2063           case 0x5e:
2064           case 0x5f:
2065               {
2066                 /** 0110 0001 0101 1rba         and     %0, %1                          */
2067 #line 282 "rl78-decode.opc"
2068                 int rba AU = op[1] & 0x07;
2069                 if (trace)
2070                   {
2071                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2072                            "/** 0110 0001 0101 1rba             and     %0, %1                          */",
2073                            op[0], op[1]);
2074                     printf ("  rba = 0x%x\n", rba);
2075                   }
2076                 SYNTAX("and     %0, %1");
2077 #line 282 "rl78-decode.opc"
2078                 ID(and); DR(A); SRB(rba); Fz;
2079
2080               }
2081             break;
2082           case 0x59:
2083               {
2084                 /** 0110 0001 0101 1001         inc     %e0%0                           */
2085                 if (trace)
2086                   {
2087                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2088                            "/** 0110 0001 0101 1001             inc     %e0%0                           */",
2089                            op[0], op[1]);
2090                   }
2091                 SYNTAX("inc     %e0%0");
2092 #line 563 "rl78-decode.opc"
2093                 ID(add); DM(HL, IMMU(1)); SC(1); Fza;
2094
2095               }
2096             break;
2097           case 0x60:
2098           case 0x61:
2099           case 0x62:
2100           case 0x63:
2101           case 0x64:
2102           case 0x65:
2103           case 0x66:
2104           case 0x67:
2105               {
2106                 /** 0110 0001 0110 0reg         or      %0, %1                          */
2107 #line 937 "rl78-decode.opc"
2108                 int reg AU = op[1] & 0x07;
2109                 if (trace)
2110                   {
2111                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2112                            "/** 0110 0001 0110 0reg             or      %0, %1                          */",
2113                            op[0], op[1]);
2114                     printf ("  reg = 0x%x\n", reg);
2115                   }
2116                 SYNTAX("or      %0, %1");
2117 #line 937 "rl78-decode.opc"
2118                 ID(or); DRB(reg); SR(A); Fz;
2119
2120               }
2121             break;
2122           case 0x68:
2123           case 0x6a:
2124           case 0x6b:
2125           case 0x6c:
2126           case 0x6d:
2127           case 0x6e:
2128           case 0x6f:
2129               {
2130                 /** 0110 0001 0110 1rba         or      %0, %1                          */
2131 #line 934 "rl78-decode.opc"
2132                 int rba AU = op[1] & 0x07;
2133                 if (trace)
2134                   {
2135                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2136                            "/** 0110 0001 0110 1rba             or      %0, %1                          */",
2137                            op[0], op[1]);
2138                     printf ("  rba = 0x%x\n", rba);
2139                   }
2140                 SYNTAX("or      %0, %1");
2141 #line 934 "rl78-decode.opc"
2142                 ID(or); DR(A); SRB(rba); Fz;
2143
2144               }
2145             break;
2146           case 0x69:
2147               {
2148                 /** 0110 0001 0110 1001         dec     %e0%0                           */
2149                 if (trace)
2150                   {
2151                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2152                            "/** 0110 0001 0110 1001             dec     %e0%0                           */",
2153                            op[0], op[1]);
2154                   }
2155                 SYNTAX("dec     %e0%0");
2156 #line 530 "rl78-decode.opc"
2157                 ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
2158
2159               }
2160             break;
2161           case 0x70:
2162           case 0x71:
2163           case 0x72:
2164           case 0x73:
2165           case 0x74:
2166           case 0x75:
2167           case 0x76:
2168           case 0x77:
2169               {
2170                 /** 0110 0001 0111 0reg         xor     %0, %1                          */
2171 #line 1241 "rl78-decode.opc"
2172                 int reg AU = op[1] & 0x07;
2173                 if (trace)
2174                   {
2175                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2176                            "/** 0110 0001 0111 0reg             xor     %0, %1                          */",
2177                            op[0], op[1]);
2178                     printf ("  reg = 0x%x\n", reg);
2179                   }
2180                 SYNTAX("xor     %0, %1");
2181 #line 1241 "rl78-decode.opc"
2182                 ID(xor); DRB(reg); SR(A); Fz;
2183
2184               }
2185             break;
2186           case 0x78:
2187           case 0x7a:
2188           case 0x7b:
2189           case 0x7c:
2190           case 0x7d:
2191           case 0x7e:
2192           case 0x7f:
2193               {
2194                 /** 0110 0001 0111 1rba         xor     %0, %1                          */
2195 #line 1238 "rl78-decode.opc"
2196                 int rba AU = op[1] & 0x07;
2197                 if (trace)
2198                   {
2199                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2200                            "/** 0110 0001 0111 1rba             xor     %0, %1                          */",
2201                            op[0], op[1]);
2202                     printf ("  rba = 0x%x\n", rba);
2203                   }
2204                 SYNTAX("xor     %0, %1");
2205 #line 1238 "rl78-decode.opc"
2206                 ID(xor); DR(A); SRB(rba); Fz;
2207
2208               }
2209             break;
2210           case 0x79:
2211               {
2212                 /** 0110 0001 0111 1001         incw    %e0%0                           */
2213                 if (trace)
2214                   {
2215                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2216                            "/** 0110 0001 0111 1001             incw    %e0%0                           */",
2217                            op[0], op[1]);
2218                   }
2219                 SYNTAX("incw    %e0%0");
2220 #line 577 "rl78-decode.opc"
2221                 ID(add); W(); DM(HL, IMMU(1)); SC(1);
2222
2223               }
2224             break;
2225           case 0x80:
2226           case 0x81:
2227               {
2228                 /** 0110 0001 1000 000          add     %0, %e1%1                       */
2229                 if (trace)
2230                   {
2231                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2232                            "/** 0110 0001 1000 000              add     %0, %e1%1                       */",
2233                            op[0], op[1]);
2234                   }
2235                 SYNTAX("add     %0, %e1%1");
2236 #line 186 "rl78-decode.opc"
2237                 ID(add); DR(A); SM2(HL, B, 0); Fzac;
2238
2239               }
2240             break;
2241           case 0x82:
2242               {
2243                 /** 0110 0001 1000 0010         add     %0, %e1%1                       */
2244                 if (trace)
2245                   {
2246                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2247                            "/** 0110 0001 1000 0010             add     %0, %e1%1                       */",
2248                            op[0], op[1]);
2249                   }
2250                 SYNTAX("add     %0, %e1%1");
2251 #line 192 "rl78-decode.opc"
2252                 ID(add); DR(A); SM2(HL, C, 0); Fzac;
2253
2254               }
2255             break;
2256           case 0x84:
2257           case 0x85:
2258           case 0x86:
2259           case 0x87:
2260           case 0x94:
2261           case 0x95:
2262           case 0x96:
2263           case 0x97:
2264           case 0xa4:
2265           case 0xa5:
2266           case 0xa6:
2267           case 0xa7:
2268           case 0xb4:
2269           case 0xb5:
2270           case 0xb6:
2271           case 0xb7:
2272           case 0xc4:
2273           case 0xc5:
2274           case 0xc6:
2275           case 0xc7:
2276           case 0xd4:
2277           case 0xd5:
2278           case 0xd6:
2279           case 0xd7:
2280           case 0xe4:
2281           case 0xe5:
2282           case 0xe6:
2283           case 0xe7:
2284           case 0xf4:
2285           case 0xf5:
2286           case 0xf6:
2287           case 0xf7:
2288               {
2289                 /** 0110 0001 1nnn 01mm         callt   [%x0]                           */
2290 #line 412 "rl78-decode.opc"
2291                 int nnn AU = (op[1] >> 4) & 0x07;
2292 #line 412 "rl78-decode.opc"
2293                 int mm AU = op[1] & 0x03;
2294                 if (trace)
2295                   {
2296                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2297                            "/** 0110 0001 1nnn 01mm             callt   [%x0]                           */",
2298                            op[0], op[1]);
2299                     printf ("  nnn = 0x%x,", nnn);
2300                     printf ("  mm = 0x%x\n", mm);
2301                   }
2302                 SYNTAX("callt   [%x0]");
2303 #line 412 "rl78-decode.opc"
2304                 ID(call); DM(None, 0x80 + mm*16 + nnn*2);
2305
2306               /*----------------------------------------------------------------------*/
2307
2308               }
2309             break;
2310           case 0x88:
2311           case 0x8a:
2312           case 0x8b:
2313           case 0x8c:
2314           case 0x8d:
2315           case 0x8e:
2316           case 0x8f:
2317               {
2318                 /** 0110 0001 1000 1reg         xch     %0, %1                          */
2319 #line 1200 "rl78-decode.opc"
2320                 int reg AU = op[1] & 0x07;
2321                 if (trace)
2322                   {
2323                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2324                            "/** 0110 0001 1000 1reg             xch     %0, %1                          */",
2325                            op[0], op[1]);
2326                     printf ("  reg = 0x%x\n", reg);
2327                   }
2328                 SYNTAX("xch     %0, %1");
2329 #line 1200 "rl78-decode.opc"
2330                 /* Note: DECW uses reg == X, so this must follow DECW */
2331                 ID(xch); DR(A); SRB(reg);
2332
2333               }
2334             break;
2335           case 0x89:
2336               {
2337                 /** 0110 0001 1000 1001         decw    %e0%0                           */
2338                 if (trace)
2339                   {
2340                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2341                            "/** 0110 0001 1000 1001             decw    %e0%0                           */",
2342                            op[0], op[1]);
2343                   }
2344                 SYNTAX("decw    %e0%0");
2345 #line 544 "rl78-decode.opc"
2346                 ID(sub); W(); DM(HL, IMMU(1)); SC(1);
2347
2348               }
2349             break;
2350           case 0x90:
2351               {
2352                 /** 0110 0001 1001 0000         addc    %0, %e1%1                       */
2353                 if (trace)
2354                   {
2355                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2356                            "/** 0110 0001 1001 0000             addc    %0, %e1%1                       */",
2357                            op[0], op[1]);
2358                   }
2359                 SYNTAX("addc    %0, %e1%1");
2360 #line 218 "rl78-decode.opc"
2361                 ID(addc); DR(A); SM2(HL, B, 0); Fzac;
2362
2363               }
2364             break;
2365           case 0x92:
2366               {
2367                 /** 0110 0001 1001 0010         addc    %0, %e1%1                       */
2368                 if (trace)
2369                   {
2370                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2371                            "/** 0110 0001 1001 0010             addc    %0, %e1%1                       */",
2372                            op[0], op[1]);
2373                   }
2374                 SYNTAX("addc    %0, %e1%1");
2375 #line 221 "rl78-decode.opc"
2376                 ID(addc); DR(A); SM2(HL, C, 0); Fzac;
2377
2378               }
2379             break;
2380           case 0xa0:
2381           case 0xa1:
2382               {
2383                 /** 0110 0001 1010 000          sub     %0, %e1%1                       */
2384                 if (trace)
2385                   {
2386                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2387                            "/** 0110 0001 1010 000              sub     %0, %e1%1                       */",
2388                            op[0], op[1]);
2389                   }
2390                 SYNTAX("sub     %0, %e1%1");
2391 #line 1101 "rl78-decode.opc"
2392                 ID(sub); DR(A); SM2(HL, B, 0); Fzac;
2393
2394               }
2395             break;
2396           case 0xa2:
2397               {
2398                 /** 0110 0001 1010 0010         sub     %0, %e1%1                       */
2399                 if (trace)
2400                   {
2401                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2402                            "/** 0110 0001 1010 0010             sub     %0, %e1%1                       */",
2403                            op[0], op[1]);
2404                   }
2405                 SYNTAX("sub     %0, %e1%1");
2406 #line 1107 "rl78-decode.opc"
2407                 ID(sub); DR(A); SM2(HL, C, 0); Fzac;
2408
2409               }
2410             break;
2411           case 0xa8:
2412               {
2413                 /** 0110 0001 1010 1000         xch     %0, %1                          */
2414                 if (trace)
2415                   {
2416                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2417                            "/** 0110 0001 1010 1000             xch     %0, %1                          */",
2418                            op[0], op[1]);
2419                   }
2420                 SYNTAX("xch     %0, %1");
2421 #line 1204 "rl78-decode.opc"
2422                 ID(xch); DR(A); SM(None, SADDR);
2423
2424               }
2425             break;
2426           case 0xa9:
2427               {
2428                 /** 0110 0001 1010 1001         xch     %0, %e1%1                       */
2429                 if (trace)
2430                   {
2431                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2432                            "/** 0110 0001 1010 1001             xch     %0, %e1%1                       */",
2433                            op[0], op[1]);
2434                   }
2435                 SYNTAX("xch     %0, %e1%1");
2436 #line 1197 "rl78-decode.opc"
2437                 ID(xch); DR(A); SM2(HL, C, 0);
2438
2439               }
2440             break;
2441           case 0xaa:
2442               {
2443                 /** 0110 0001 1010 1010         xch     %0, %e1%!1                      */
2444                 if (trace)
2445                   {
2446                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2447                            "/** 0110 0001 1010 1010             xch     %0, %e1%!1                      */",
2448                            op[0], op[1]);
2449                   }
2450                 SYNTAX("xch     %0, %e1%!1");
2451 #line 1179 "rl78-decode.opc"
2452                 ID(xch); DR(A); SM(None, IMMU(2));
2453
2454               }
2455             break;
2456           case 0xab:
2457               {
2458                 /** 0110 0001 1010 1011         xch     %0, %1                          */
2459                 if (trace)
2460                   {
2461                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2462                            "/** 0110 0001 1010 1011             xch     %0, %1                          */",
2463                            op[0], op[1]);
2464                   }
2465                 SYNTAX("xch     %0, %1");
2466 #line 1207 "rl78-decode.opc"
2467                 ID(xch); DR(A); SM(None, SFR);
2468
2469               }
2470             break;
2471           case 0xac:
2472               {
2473                 /** 0110 0001 1010 1100         xch     %0, %e1%1                       */
2474                 if (trace)
2475                   {
2476                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2477                            "/** 0110 0001 1010 1100             xch     %0, %e1%1                       */",
2478                            op[0], op[1]);
2479                   }
2480                 SYNTAX("xch     %0, %e1%1");
2481 #line 1188 "rl78-decode.opc"
2482                 ID(xch); DR(A); SM(HL, 0);
2483
2484               }
2485             break;
2486           case 0xad:
2487               {
2488                 /** 0110 0001 1010 1101         xch     %0, %e1%1                       */
2489                 if (trace)
2490                   {
2491                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2492                            "/** 0110 0001 1010 1101             xch     %0, %e1%1                       */",
2493                            op[0], op[1]);
2494                   }
2495                 SYNTAX("xch     %0, %e1%1");
2496 #line 1194 "rl78-decode.opc"
2497                 ID(xch); DR(A); SM(HL, IMMU(1));
2498
2499               }
2500             break;
2501           case 0xae:
2502               {
2503                 /** 0110 0001 1010 1110         xch     %0, %e1%1                       */
2504                 if (trace)
2505                   {
2506                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2507                            "/** 0110 0001 1010 1110             xch     %0, %e1%1                       */",
2508                            op[0], op[1]);
2509                   }
2510                 SYNTAX("xch     %0, %e1%1");
2511 #line 1182 "rl78-decode.opc"
2512                 ID(xch); DR(A); SM(DE, 0);
2513
2514               }
2515             break;
2516           case 0xaf:
2517               {
2518                 /** 0110 0001 1010 1111         xch     %0, %e1%1                       */
2519                 if (trace)
2520                   {
2521                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2522                            "/** 0110 0001 1010 1111             xch     %0, %e1%1                       */",
2523                            op[0], op[1]);
2524                   }
2525                 SYNTAX("xch     %0, %e1%1");
2526 #line 1185 "rl78-decode.opc"
2527                 ID(xch); DR(A); SM(DE, IMMU(1));
2528
2529               }
2530             break;
2531           case 0xb0:
2532               {
2533                 /** 0110 0001 1011 0000         subc    %0, %e1%1                       */
2534                 if (trace)
2535                   {
2536                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2537                            "/** 0110 0001 1011 0000             subc    %0, %e1%1                       */",
2538                            op[0], op[1]);
2539                   }
2540                 SYNTAX("subc    %0, %e1%1");
2541 #line 1133 "rl78-decode.opc"
2542                 ID(subc); DR(A); SM2(HL, B, 0); Fzac;
2543
2544               }
2545             break;
2546           case 0xb2:
2547               {
2548                 /** 0110 0001 1011 0010         subc    %0, %e1%1                       */
2549                 if (trace)
2550                   {
2551                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2552                            "/** 0110 0001 1011 0010             subc    %0, %e1%1                       */",
2553                            op[0], op[1]);
2554                   }
2555                 SYNTAX("subc    %0, %e1%1");
2556 #line 1136 "rl78-decode.opc"
2557                 ID(subc); DR(A); SM2(HL, C, 0); Fzac;
2558
2559               }
2560             break;
2561           case 0xb8:
2562               {
2563                 /** 0110 0001 1011 1000         mov     %0, %1                          */
2564                 if (trace)
2565                   {
2566                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2567                            "/** 0110 0001 1011 1000             mov     %0, %1                          */",
2568                            op[0], op[1]);
2569                   }
2570                 SYNTAX("mov     %0, %1");
2571 #line 702 "rl78-decode.opc"
2572                 ID(mov); DR(ES); SM(None, SADDR);
2573
2574               }
2575             break;
2576           case 0xb9:
2577               {
2578                 /** 0110 0001 1011 1001         xch     %0, %e1%1                       */
2579                 if (trace)
2580                   {
2581                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2582                            "/** 0110 0001 1011 1001             xch     %0, %e1%1                       */",
2583                            op[0], op[1]);
2584                   }
2585                 SYNTAX("xch     %0, %e1%1");
2586 #line 1191 "rl78-decode.opc"
2587                 ID(xch); DR(A); SM2(HL, B, 0);
2588
2589               }
2590             break;
2591           case 0xc0:
2592               {
2593                 /** 0110 0001 1100 0000         cmp     %0, %e1%1                       */
2594                 if (trace)
2595                   {
2596                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2597                            "/** 0110 0001 1100 0000             cmp     %0, %e1%1                       */",
2598                            op[0], op[1]);
2599                   }
2600                 SYNTAX("cmp     %0, %e1%1");
2601 #line 471 "rl78-decode.opc"
2602                 ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
2603
2604               }
2605             break;
2606           case 0xc2:
2607               {
2608                 /** 0110 0001 1100 0010         cmp     %0, %e1%1                       */
2609                 if (trace)
2610                   {
2611                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2612                            "/** 0110 0001 1100 0010             cmp     %0, %e1%1                       */",
2613                            op[0], op[1]);
2614                   }
2615                 SYNTAX("cmp     %0, %e1%1");
2616 #line 474 "rl78-decode.opc"
2617                 ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
2618
2619               }
2620             break;
2621           case 0xc3:
2622               {
2623                 /** 0110 0001 1100 0011         bh      $%a0                            */
2624                 if (trace)
2625                   {
2626                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2627                            "/** 0110 0001 1100 0011             bh      $%a0                            */",
2628                            op[0], op[1]);
2629                   }
2630                 SYNTAX("bh      $%a0");
2631 #line 319 "rl78-decode.opc"
2632                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H);
2633
2634               }
2635             break;
2636           case 0xc8:
2637               {
2638                 /** 0110 0001 1100 1000         sk%c1                                   */
2639                 if (trace)
2640                   {
2641                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2642                            "/** 0110 0001 1100 1000             sk%c1                                   */",
2643                            op[0], op[1]);
2644                   }
2645                 SYNTAX("sk%c1");
2646 #line 1070 "rl78-decode.opc"
2647                 ID(skip); COND(C);
2648
2649               }
2650             break;
2651           case 0xc9:
2652               {
2653                 /** 0110 0001 1100 1001         mov     %0, %e1%1                       */
2654                 if (trace)
2655                   {
2656                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2657                            "/** 0110 0001 1100 1001             mov     %0, %e1%1                       */",
2658                            op[0], op[1]);
2659                   }
2660                 SYNTAX("mov     %0, %e1%1");
2661 #line 639 "rl78-decode.opc"
2662                 ID(mov); DR(A); SM2(HL, B, 0);
2663
2664               }
2665             break;
2666           case 0xca:
2667           case 0xda:
2668           case 0xea:
2669           case 0xfa:
2670               {
2671                 /** 0110 0001 11rg 1010         call    %0                              */
2672 #line 409 "rl78-decode.opc"
2673                 int rg AU = (op[1] >> 4) & 0x03;
2674                 if (trace)
2675                   {
2676                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2677                            "/** 0110 0001 11rg 1010             call    %0                              */",
2678                            op[0], op[1]);
2679                     printf ("  rg = 0x%x\n", rg);
2680                   }
2681                 SYNTAX("call    %0");
2682 #line 409 "rl78-decode.opc"
2683                 ID(call); DRW(rg);
2684
2685               }
2686             break;
2687           case 0xcb:
2688               {
2689                 /** 0110 0001 1100 1011         br      ax                              */
2690                 if (trace)
2691                   {
2692                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2693                            "/** 0110 0001 1100 1011             br      ax                              */",
2694                            op[0], op[1]);
2695                   }
2696                 SYNTAX("br      ax");
2697 #line 359 "rl78-decode.opc"
2698                 ID(branch); DR(AX);
2699
2700               /*----------------------------------------------------------------------*/
2701
2702               }
2703             break;
2704           case 0xcc:
2705               {
2706                 /** 0110 0001 1100 1100         brk                                     */
2707                 if (trace)
2708                   {
2709                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2710                            "/** 0110 0001 1100 1100             brk                                     */",
2711                            op[0], op[1]);
2712                   }
2713                 SYNTAX("brk");
2714 #line 367 "rl78-decode.opc"
2715                 ID(break);
2716
2717               /*----------------------------------------------------------------------*/
2718
2719               }
2720             break;
2721           case 0xcd:
2722               {
2723                 /** 0110 0001 1100 1101         pop     %s0                             */
2724                 if (trace)
2725                   {
2726                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2727                            "/** 0110 0001 1100 1101             pop     %s0                             */",
2728                            op[0], op[1]);
2729                   }
2730                 SYNTAX("pop     %s0");
2731 #line 965 "rl78-decode.opc"
2732                 ID(mov); W(); DR(PSW); SPOP();
2733
2734               /*----------------------------------------------------------------------*/
2735
2736               }
2737             break;
2738           case 0xce:
2739               {
2740                 /** 0110 0001 1100 1110         movs    %e0%0, %1                       */
2741                 if (trace)
2742                   {
2743                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2744                            "/** 0110 0001 1100 1110             movs    %e0%0, %1                       */",
2745                            op[0], op[1]);
2746                   }
2747                 SYNTAX("movs    %e0%0, %1");
2748 #line 787 "rl78-decode.opc"
2749                 ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
2750
2751               /*----------------------------------------------------------------------*/
2752
2753               }
2754             break;
2755           case 0xcf:
2756           case 0xdf:
2757           case 0xef:
2758           case 0xff:
2759               {
2760                 /** 0110 0001 11rb 1111         sel     rb%1                            */
2761 #line 1017 "rl78-decode.opc"
2762                 int rb AU = (op[1] >> 4) & 0x03;
2763                 if (trace)
2764                   {
2765                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2766                            "/** 0110 0001 11rb 1111             sel     rb%1                            */",
2767                            op[0], op[1]);
2768                     printf ("  rb = 0x%x\n", rb);
2769                   }
2770                 SYNTAX("sel     rb%1");
2771 #line 1017 "rl78-decode.opc"
2772                 ID(sel); SC(rb);
2773
2774               /*----------------------------------------------------------------------*/
2775
2776               }
2777             break;
2778           case 0xd0:
2779               {
2780                 /** 0110 0001 1101 0000         and     %0, %e1%1                       */
2781                 if (trace)
2782                   {
2783                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2784                            "/** 0110 0001 1101 0000             and     %0, %e1%1                       */",
2785                            op[0], op[1]);
2786                   }
2787                 SYNTAX("and     %0, %e1%1");
2788 #line 270 "rl78-decode.opc"
2789                 ID(and); DR(A); SM2(HL, B, 0); Fz;
2790
2791               }
2792             break;
2793           case 0xd2:
2794               {
2795                 /** 0110 0001 1101 0010         and     %0, %e1%1                       */
2796                 if (trace)
2797                   {
2798                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2799                            "/** 0110 0001 1101 0010             and     %0, %e1%1                       */",
2800                            op[0], op[1]);
2801                   }
2802                 SYNTAX("and     %0, %e1%1");
2803 #line 276 "rl78-decode.opc"
2804                 ID(and); DR(A); SM2(HL, C, 0); Fz;
2805
2806               }
2807             break;
2808           case 0xd3:
2809               {
2810                 /** 0110 0001 1101 0011         bnh     $%a0                            */
2811                 if (trace)
2812                   {
2813                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2814                            "/** 0110 0001 1101 0011             bnh     $%a0                            */",
2815                            op[0], op[1]);
2816                   }
2817                 SYNTAX("bnh     $%a0");
2818 #line 322 "rl78-decode.opc"
2819                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH);
2820
2821               }
2822             break;
2823           case 0xd8:
2824               {
2825                 /** 0110 0001 1101 1000         sk%c1                                   */
2826                 if (trace)
2827                   {
2828                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2829                            "/** 0110 0001 1101 1000             sk%c1                                   */",
2830                            op[0], op[1]);
2831                   }
2832                 SYNTAX("sk%c1");
2833 #line 1076 "rl78-decode.opc"
2834                 ID(skip); COND(NC);
2835
2836               }
2837             break;
2838           case 0xd9:
2839               {
2840                 /** 0110 0001 1101 1001         mov     %e0%0, %1                       */
2841                 if (trace)
2842                   {
2843                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2844                            "/** 0110 0001 1101 1001             mov     %e0%0, %1                       */",
2845                            op[0], op[1]);
2846                   }
2847                 SYNTAX("mov     %e0%0, %1");
2848 #line 606 "rl78-decode.opc"
2849                 ID(mov); DM2(HL, B, 0); SR(A);
2850
2851               }
2852             break;
2853           case 0xdb:
2854               {
2855                 /** 0110 0001 1101 1011         ror     %0, %1                          */
2856                 if (trace)
2857                   {
2858                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2859                            "/** 0110 0001 1101 1011             ror     %0, %1                          */",
2860                            op[0], op[1]);
2861                   }
2862                 SYNTAX("ror     %0, %1");
2863 #line 998 "rl78-decode.opc"
2864                 ID(ror); DR(A); SC(1);
2865
2866               }
2867             break;
2868           case 0xdc:
2869               {
2870                 /** 0110 0001 1101 1100         rolc    %0, %1                          */
2871                 if (trace)
2872                   {
2873                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2874                            "/** 0110 0001 1101 1100             rolc    %0, %1                          */",
2875                            op[0], op[1]);
2876                   }
2877                 SYNTAX("rolc    %0, %1");
2878 #line 992 "rl78-decode.opc"
2879                 ID(rolc); DR(A); SC(1);
2880
2881               }
2882             break;
2883           case 0xdd:
2884               {
2885                 /** 0110 0001 1101 1101         push    %s1                             */
2886                 if (trace)
2887                   {
2888                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2889                            "/** 0110 0001 1101 1101             push    %s1                             */",
2890                            op[0], op[1]);
2891                   }
2892                 SYNTAX("push    %s1");
2893 #line 973 "rl78-decode.opc"
2894                 ID(mov); W(); DPUSH(); SR(PSW);
2895
2896               /*----------------------------------------------------------------------*/
2897
2898               }
2899             break;
2900           case 0xde:
2901               {
2902                 /** 0110 0001 1101 1110         cmps    %0, %e1%1                       */
2903                 if (trace)
2904                   {
2905                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2906                            "/** 0110 0001 1101 1110             cmps    %0, %e1%1                       */",
2907                            op[0], op[1]);
2908                   }
2909                 SYNTAX("cmps    %0, %e1%1");
2910 #line 505 "rl78-decode.opc"
2911                 ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
2912
2913               /*----------------------------------------------------------------------*/
2914
2915               }
2916             break;
2917           case 0xe0:
2918               {
2919                 /** 0110 0001 1110 0000         or      %0, %e1%1                       */
2920                 if (trace)
2921                   {
2922                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2923                            "/** 0110 0001 1110 0000             or      %0, %e1%1                       */",
2924                            op[0], op[1]);
2925                   }
2926                 SYNTAX("or      %0, %e1%1");
2927 #line 922 "rl78-decode.opc"
2928                 ID(or); DR(A); SM2(HL, B, 0); Fz;
2929
2930               }
2931             break;
2932           case 0xe2:
2933               {
2934                 /** 0110 0001 1110 0010         or      %0, %e1%1                       */
2935                 if (trace)
2936                   {
2937                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2938                            "/** 0110 0001 1110 0010             or      %0, %e1%1                       */",
2939                            op[0], op[1]);
2940                   }
2941                 SYNTAX("or      %0, %e1%1");
2942 #line 928 "rl78-decode.opc"
2943                 ID(or); DR(A); SM2(HL, C, 0); Fz;
2944
2945               }
2946             break;
2947           case 0xe3:
2948               {
2949                 /** 0110 0001 1110 0011         sk%c1                                   */
2950                 if (trace)
2951                   {
2952                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2953                            "/** 0110 0001 1110 0011             sk%c1                                   */",
2954                            op[0], op[1]);
2955                   }
2956                 SYNTAX("sk%c1");
2957 #line 1073 "rl78-decode.opc"
2958                 ID(skip); COND(H);
2959
2960               }
2961             break;
2962           case 0xe8:
2963               {
2964                 /** 0110 0001 1110 1000         sk%c1                                   */
2965                 if (trace)
2966                   {
2967                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2968                            "/** 0110 0001 1110 1000             sk%c1                                   */",
2969                            op[0], op[1]);
2970                   }
2971                 SYNTAX("sk%c1");
2972 #line 1085 "rl78-decode.opc"
2973                 ID(skip); COND(Z);
2974
2975               /*----------------------------------------------------------------------*/
2976
2977               }
2978             break;
2979           case 0xe9:
2980               {
2981                 /** 0110 0001 1110 1001         mov     %0, %e1%1                       */
2982                 if (trace)
2983                   {
2984                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2985                            "/** 0110 0001 1110 1001             mov     %0, %e1%1                       */",
2986                            op[0], op[1]);
2987                   }
2988                 SYNTAX("mov     %0, %e1%1");
2989 #line 642 "rl78-decode.opc"
2990                 ID(mov); DR(A); SM2(HL, C, 0);
2991
2992               }
2993             break;
2994           case 0xeb:
2995               {
2996                 /** 0110 0001 1110 1011         rol     %0, %1                          */
2997                 if (trace)
2998                   {
2999                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3000                            "/** 0110 0001 1110 1011             rol     %0, %1                          */",
3001                            op[0], op[1]);
3002                   }
3003                 SYNTAX("rol     %0, %1");
3004 #line 989 "rl78-decode.opc"
3005                 ID(rol); DR(A); SC(1);
3006
3007               }
3008             break;
3009           case 0xec:
3010               {
3011                 /** 0110 0001 1110 1100         retb                                    */
3012                 if (trace)
3013                   {
3014                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3015                            "/** 0110 0001 1110 1100             retb                                    */",
3016                            op[0], op[1]);
3017                   }
3018                 SYNTAX("retb");
3019 #line 984 "rl78-decode.opc"
3020                 ID(reti);
3021
3022               /*----------------------------------------------------------------------*/
3023
3024               }
3025             break;
3026           case 0xed:
3027               {
3028                 /** 0110 0001 1110 1101         halt                                    */
3029                 if (trace)
3030                   {
3031                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3032                            "/** 0110 0001 1110 1101             halt                                    */",
3033                            op[0], op[1]);
3034                   }
3035                 SYNTAX("halt");
3036 #line 555 "rl78-decode.opc"
3037                 ID(halt);
3038
3039               /*----------------------------------------------------------------------*/
3040
3041               }
3042             break;
3043           case 0xee:
3044           case 0xfe:
3045               {
3046                 /** 0110 0001 111r 1110         rolwc   %0, %1                          */
3047 #line 995 "rl78-decode.opc"
3048                 int r AU = (op[1] >> 4) & 0x01;
3049                 if (trace)
3050                   {
3051                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3052                            "/** 0110 0001 111r 1110             rolwc   %0, %1                          */",
3053                            op[0], op[1]);
3054                     printf ("  r = 0x%x\n", r);
3055                   }
3056                 SYNTAX("rolwc   %0, %1");
3057 #line 995 "rl78-decode.opc"
3058                 ID(rolc); W(); DRW(r); SC(1);
3059
3060               }
3061             break;
3062           case 0xf0:
3063               {
3064                 /** 0110 0001 1111 0000         xor     %0, %e1%1                       */
3065                 if (trace)
3066                   {
3067                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3068                            "/** 0110 0001 1111 0000             xor     %0, %e1%1                       */",
3069                            op[0], op[1]);
3070                   }
3071                 SYNTAX("xor     %0, %e1%1");
3072 #line 1226 "rl78-decode.opc"
3073                 ID(xor); DR(A); SM2(HL, B, 0); Fz;
3074
3075               }
3076             break;
3077           case 0xf2:
3078               {
3079                 /** 0110 0001 1111 0010         xor     %0, %e1%1                       */
3080                 if (trace)
3081                   {
3082                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3083                            "/** 0110 0001 1111 0010             xor     %0, %e1%1                       */",
3084                            op[0], op[1]);
3085                   }
3086                 SYNTAX("xor     %0, %e1%1");
3087 #line 1232 "rl78-decode.opc"
3088                 ID(xor); DR(A); SM2(HL, C, 0); Fz;
3089
3090               }
3091             break;
3092           case 0xf3:
3093               {
3094                 /** 0110 0001 1111 0011         sk%c1                                   */
3095                 if (trace)
3096                   {
3097                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3098                            "/** 0110 0001 1111 0011             sk%c1                                   */",
3099                            op[0], op[1]);
3100                   }
3101                 SYNTAX("sk%c1");
3102 #line 1079 "rl78-decode.opc"
3103                 ID(skip); COND(NH);
3104
3105               }
3106             break;
3107           case 0xf8:
3108               {
3109                 /** 0110 0001 1111 1000         sk%c1                                   */
3110                 if (trace)
3111                   {
3112                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3113                            "/** 0110 0001 1111 1000             sk%c1                                   */",
3114                            op[0], op[1]);
3115                   }
3116                 SYNTAX("sk%c1");
3117 #line 1082 "rl78-decode.opc"
3118                 ID(skip); COND(NZ);
3119
3120               }
3121             break;
3122           case 0xf9:
3123               {
3124                 /** 0110 0001 1111 1001         mov     %e0%0, %1                       */
3125                 if (trace)
3126                   {
3127                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3128                            "/** 0110 0001 1111 1001             mov     %e0%0, %1                       */",
3129                            op[0], op[1]);
3130                   }
3131                 SYNTAX("mov     %e0%0, %1");
3132 #line 615 "rl78-decode.opc"
3133                 ID(mov); DM2(HL, C, 0); SR(A);
3134
3135               }
3136             break;
3137           case 0xfb:
3138               {
3139                 /** 0110 0001 1111 1011         rorc    %0, %1                          */
3140                 if (trace)
3141                   {
3142                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3143                            "/** 0110 0001 1111 1011             rorc    %0, %1                          */",
3144                            op[0], op[1]);
3145                   }
3146                 SYNTAX("rorc    %0, %1");
3147 #line 1001 "rl78-decode.opc"
3148                 ID(rorc); DR(A); SC(1);
3149
3150               /*----------------------------------------------------------------------*/
3151
3152               /* Note that the branch insns need to be listed before the shift
3153                  ones, as "shift count of zero" means "branch insn" */
3154
3155               }
3156             break;
3157           case 0xfc:
3158               {
3159                 /** 0110 0001 1111 1100         reti                                    */
3160                 if (trace)
3161                   {
3162                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3163                            "/** 0110 0001 1111 1100             reti                                    */",
3164                            op[0], op[1]);
3165                   }
3166                 SYNTAX("reti");
3167 #line 981 "rl78-decode.opc"
3168                 ID(reti);
3169
3170               }
3171             break;
3172           case 0xfd:
3173               {
3174                 /** 0110 0001 1111 1101 stop                                    */
3175                 if (trace)
3176                   {
3177                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3178                            "/** 0110 0001 1111 1101     stop                                    */",
3179                            op[0], op[1]);
3180                   }
3181                 SYNTAX("stop");
3182 #line 1090 "rl78-decode.opc"
3183                 ID(stop);
3184
3185               /*----------------------------------------------------------------------*/
3186
3187               }
3188             break;
3189           default: UNSUPPORTED(); break;
3190         }
3191       break;
3192     case 0x68:
3193         {
3194           /** 0110 1000                 movw    %e0%0, %1                       */
3195           if (trace)
3196             {
3197               printf ("\033[33m%s\033[0m  %02x\n",
3198                      "/** 0110 1000                     movw    %e0%0, %1                       */",
3199                      op[0]);
3200             }
3201           SYNTAX("movw  %e0%0, %1");
3202 #line 850 "rl78-decode.opc"
3203           ID(mov); W(); DM(C, IMMU(2)); SR(AX);
3204
3205         }
3206       break;
3207     case 0x69:
3208         {
3209           /** 0110 1001                 movw    %0, %e1%1                       */
3210           if (trace)
3211             {
3212               printf ("\033[33m%s\033[0m  %02x\n",
3213                      "/** 0110 1001                     movw    %0, %e1%1                       */",
3214                      op[0]);
3215             }
3216           SYNTAX("movw  %0, %e1%1");
3217 #line 841 "rl78-decode.opc"
3218           ID(mov); W(); DR(AX); SM(C, IMMU(2));
3219
3220         }
3221       break;
3222     case 0x6a:
3223         {
3224           /** 0110 1010                 or      %0, #%1                         */
3225           if (trace)
3226             {
3227               printf ("\033[33m%s\033[0m  %02x\n",
3228                      "/** 0110 1010                     or      %0, #%1                         */",
3229                      op[0]);
3230             }
3231           SYNTAX("or    %0, #%1");
3232 #line 943 "rl78-decode.opc"
3233           ID(or); DM(None, SADDR); SC(IMMU(1)); Fz;
3234
3235         /*----------------------------------------------------------------------*/
3236
3237         }
3238       break;
3239     case 0x6b:
3240         {
3241           /** 0110 1011                 or      %0, %1                          */
3242           if (trace)
3243             {
3244               printf ("\033[33m%s\033[0m  %02x\n",
3245                      "/** 0110 1011                     or      %0, %1                          */",
3246                      op[0]);
3247             }
3248           SYNTAX("or    %0, %1");
3249 #line 940 "rl78-decode.opc"
3250           ID(or); DR(A); SM(None, SADDR); Fz;
3251
3252         }
3253       break;
3254     case 0x6c:
3255         {
3256           /** 0110 1100                 or      %0, #%1                         */
3257           if (trace)
3258             {
3259               printf ("\033[33m%s\033[0m  %02x\n",
3260                      "/** 0110 1100                     or      %0, #%1                         */",
3261                      op[0]);
3262             }
3263           SYNTAX("or    %0, #%1");
3264 #line 931 "rl78-decode.opc"
3265           ID(or); DR(A); SC(IMMU(1)); Fz;
3266
3267         }
3268       break;
3269     case 0x6d:
3270         {
3271           /** 0110 1101                 or      %0, %e1%1                       */
3272           if (trace)
3273             {
3274               printf ("\033[33m%s\033[0m  %02x\n",
3275                      "/** 0110 1101                     or      %0, %e1%1                       */",
3276                      op[0]);
3277             }
3278           SYNTAX("or    %0, %e1%1");
3279 #line 919 "rl78-decode.opc"
3280           ID(or); DR(A); SM(HL, 0); Fz;
3281
3282         }
3283       break;
3284     case 0x6e:
3285         {
3286           /** 0110 1110                 or      %0, %e1%1                       */
3287           if (trace)
3288             {
3289               printf ("\033[33m%s\033[0m  %02x\n",
3290                      "/** 0110 1110                     or      %0, %e1%1                       */",
3291                      op[0]);
3292             }
3293           SYNTAX("or    %0, %e1%1");
3294 #line 925 "rl78-decode.opc"
3295           ID(or); DR(A); SM(HL, IMMU(1)); Fz;
3296
3297         }
3298       break;
3299     case 0x6f:
3300         {
3301           /** 0110 1111                 or      %0, %e1%!1                      */
3302           if (trace)
3303             {
3304               printf ("\033[33m%s\033[0m  %02x\n",
3305                      "/** 0110 1111                     or      %0, %e1%!1                      */",
3306                      op[0]);
3307             }
3308           SYNTAX("or    %0, %e1%!1");
3309 #line 916 "rl78-decode.opc"
3310           ID(or); DR(A); SM(None, IMMU(2)); Fz;
3311
3312         }
3313       break;
3314     case 0x70:
3315     case 0x72:
3316     case 0x73:
3317     case 0x74:
3318     case 0x75:
3319     case 0x76:
3320     case 0x77:
3321         {
3322           /** 0111 0rba                 mov     %0, %1                          */
3323 #line 675 "rl78-decode.opc"
3324           int rba AU = op[0] & 0x07;
3325           if (trace)
3326             {
3327               printf ("\033[33m%s\033[0m  %02x\n",
3328                      "/** 0111 0rba                     mov     %0, %1                          */",
3329                      op[0]);
3330               printf ("  rba = 0x%x\n", rba);
3331             }
3332           SYNTAX("mov   %0, %1");
3333 #line 675 "rl78-decode.opc"
3334           ID(mov); DRB(rba); SR(A);
3335
3336         }
3337       break;
3338     case 0x71:
3339         GETBYTE ();
3340         switch (op[1] & 0xff)
3341         {
3342           case 0x00:
3343           case 0x10:
3344           case 0x20:
3345           case 0x30:
3346           case 0x40:
3347           case 0x50:
3348           case 0x60:
3349           case 0x70:
3350               {
3351                 /** 0111 0001 0bit 0000         set1    %e0%!0                          */
3352 #line 1022 "rl78-decode.opc"
3353                 int bit AU = (op[1] >> 4) & 0x07;
3354                 if (trace)
3355                   {
3356                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3357                            "/** 0111 0001 0bit 0000             set1    %e0%!0                          */",
3358                            op[0], op[1]);
3359                     printf ("  bit = 0x%x\n", bit);
3360                   }
3361                 SYNTAX("set1    %e0%!0");
3362 #line 1022 "rl78-decode.opc"
3363                 ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
3364
3365               }
3366             break;
3367           case 0x01:
3368           case 0x11:
3369           case 0x21:
3370           case 0x31:
3371           case 0x41:
3372           case 0x51:
3373           case 0x61:
3374           case 0x71:
3375               {
3376                 /** 0111 0001 0bit 0001         mov1    %0, cy                          */
3377 #line 779 "rl78-decode.opc"
3378                 int bit AU = (op[1] >> 4) & 0x07;
3379                 if (trace)
3380                   {
3381                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3382                            "/** 0111 0001 0bit 0001             mov1    %0, cy                          */",
3383                            op[0], op[1]);
3384                     printf ("  bit = 0x%x\n", bit);
3385                   }
3386                 SYNTAX("mov1    %0, cy");
3387 #line 779 "rl78-decode.opc"
3388                 ID(mov); DM(None, SADDR); DB(bit); SCY();
3389
3390               }
3391             break;
3392           case 0x02:
3393           case 0x12:
3394           case 0x22:
3395           case 0x32:
3396           case 0x42:
3397           case 0x52:
3398           case 0x62:
3399           case 0x72:
3400               {
3401                 /** 0111 0001 0bit 0010         set1    %0                              */
3402 #line 1040 "rl78-decode.opc"
3403                 int bit AU = (op[1] >> 4) & 0x07;
3404                 if (trace)
3405                   {
3406                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3407                            "/** 0111 0001 0bit 0010             set1    %0                              */",
3408                            op[0], op[1]);
3409                     printf ("  bit = 0x%x\n", bit);
3410                   }
3411                 SYNTAX("set1    %0");
3412 #line 1040 "rl78-decode.opc"
3413                 ID(mov); DM(None, SADDR); DB(bit); SC(1);
3414
3415               /*----------------------------------------------------------------------*/
3416
3417               }
3418             break;
3419           case 0x03:
3420           case 0x13:
3421           case 0x23:
3422           case 0x33:
3423           case 0x43:
3424           case 0x53:
3425           case 0x63:
3426           case 0x73:
3427               {
3428                 /** 0111 0001 0bit 0011         clr1    %0                              */
3429 #line 435 "rl78-decode.opc"
3430                 int bit AU = (op[1] >> 4) & 0x07;
3431                 if (trace)
3432                   {
3433                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3434                            "/** 0111 0001 0bit 0011             clr1    %0                              */",
3435                            op[0], op[1]);
3436                     printf ("  bit = 0x%x\n", bit);
3437                   }
3438                 SYNTAX("clr1    %0");
3439 #line 435 "rl78-decode.opc"
3440                 ID(mov); DM(None, SADDR); DB(bit); SC(0);
3441
3442               /*----------------------------------------------------------------------*/
3443
3444               }
3445             break;
3446           case 0x04:
3447           case 0x14:
3448           case 0x24:
3449           case 0x34:
3450           case 0x44:
3451           case 0x54:
3452           case 0x64:
3453           case 0x74:
3454               {
3455                 /** 0111 0001 0bit 0100         mov1    cy, %1                          */
3456 #line 773 "rl78-decode.opc"
3457                 int bit AU = (op[1] >> 4) & 0x07;
3458                 if (trace)
3459                   {
3460                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3461                            "/** 0111 0001 0bit 0100             mov1    cy, %1                          */",
3462                            op[0], op[1]);
3463                     printf ("  bit = 0x%x\n", bit);
3464                   }
3465                 SYNTAX("mov1    cy, %1");
3466 #line 773 "rl78-decode.opc"
3467                 ID(mov); DCY(); SM(None, SADDR); SB(bit);
3468
3469               }
3470             break;
3471           case 0x05:
3472           case 0x15:
3473           case 0x25:
3474           case 0x35:
3475           case 0x45:
3476           case 0x55:
3477           case 0x65:
3478           case 0x75:
3479               {
3480                 /** 0111 0001 0bit 0101         and1    cy, %s1                         */
3481 #line 305 "rl78-decode.opc"
3482                 int bit AU = (op[1] >> 4) & 0x07;
3483                 if (trace)
3484                   {
3485                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3486                            "/** 0111 0001 0bit 0101             and1    cy, %s1                         */",
3487                            op[0], op[1]);
3488                     printf ("  bit = 0x%x\n", bit);
3489                   }
3490                 SYNTAX("and1    cy, %s1");
3491 #line 305 "rl78-decode.opc"
3492                 ID(and); DCY(); SM(None, SADDR); SB(bit);
3493
3494               /*----------------------------------------------------------------------*/
3495
3496               /* Note that the branch insns need to be listed before the shift
3497                  ones, as "shift count of zero" means "branch insn" */
3498
3499               }
3500             break;
3501           case 0x06:
3502           case 0x16:
3503           case 0x26:
3504           case 0x36:
3505           case 0x46:
3506           case 0x56:
3507           case 0x66:
3508           case 0x76:
3509               {
3510                 /** 0111 0001 0bit 0110         or1     cy, %s1                         */
3511 #line 957 "rl78-decode.opc"
3512                 int bit AU = (op[1] >> 4) & 0x07;
3513                 if (trace)
3514                   {
3515                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3516                            "/** 0111 0001 0bit 0110             or1     cy, %s1                         */",
3517                            op[0], op[1]);
3518                     printf ("  bit = 0x%x\n", bit);
3519                   }
3520                 SYNTAX("or1     cy, %s1");
3521 #line 957 "rl78-decode.opc"
3522                 ID(or); DCY(); SM(None, SADDR); SB(bit);
3523
3524               /*----------------------------------------------------------------------*/
3525
3526               }
3527             break;
3528           case 0x07:
3529           case 0x17:
3530           case 0x27:
3531           case 0x37:
3532           case 0x47:
3533           case 0x57:
3534           case 0x67:
3535           case 0x77:
3536               {
3537                 /** 0111 0001 0bit 0111         xor1    cy, %s1                         */
3538 #line 1261 "rl78-decode.opc"
3539                 int bit AU = (op[1] >> 4) & 0x07;
3540                 if (trace)
3541                   {
3542                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3543                            "/** 0111 0001 0bit 0111             xor1    cy, %s1                         */",
3544                            op[0], op[1]);
3545                     printf ("  bit = 0x%x\n", bit);
3546                   }
3547                 SYNTAX("xor1    cy, %s1");
3548 #line 1261 "rl78-decode.opc"
3549                 ID(xor); DCY(); SM(None, SADDR); SB(bit);
3550
3551               /*----------------------------------------------------------------------*/
3552
3553               }
3554             break;
3555           case 0x08:
3556           case 0x18:
3557           case 0x28:
3558           case 0x38:
3559           case 0x48:
3560           case 0x58:
3561           case 0x68:
3562           case 0x78:
3563               {
3564                 /** 0111 0001 0bit 1000         clr1    %e0%!0                          */
3565 #line 417 "rl78-decode.opc"
3566                 int bit AU = (op[1] >> 4) & 0x07;
3567                 if (trace)
3568                   {
3569                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3570                            "/** 0111 0001 0bit 1000             clr1    %e0%!0                          */",
3571                            op[0], op[1]);
3572                     printf ("  bit = 0x%x\n", bit);
3573                   }
3574                 SYNTAX("clr1    %e0%!0");
3575 #line 417 "rl78-decode.opc"
3576                 ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
3577
3578               }
3579             break;
3580           case 0x09:
3581           case 0x19:
3582           case 0x29:
3583           case 0x39:
3584           case 0x49:
3585           case 0x59:
3586           case 0x69:
3587           case 0x79:
3588               {
3589                 /** 0111 0001 0bit 1001         mov1    %s0, cy                         */
3590 #line 782 "rl78-decode.opc"
3591                 int bit AU = (op[1] >> 4) & 0x07;
3592                 if (trace)
3593                   {
3594                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3595                            "/** 0111 0001 0bit 1001             mov1    %s0, cy                         */",
3596                            op[0], op[1]);
3597                     printf ("  bit = 0x%x\n", bit);
3598                   }
3599                 SYNTAX("mov1    %s0, cy");
3600 #line 782 "rl78-decode.opc"
3601                 ID(mov); DM(None, SFR); DB(bit); SCY();
3602
3603               /*----------------------------------------------------------------------*/
3604
3605               }
3606             break;
3607           case 0x0a:
3608           case 0x1a:
3609           case 0x2a:
3610           case 0x3a:
3611           case 0x4a:
3612           case 0x5a:
3613           case 0x6a:
3614           case 0x7a:
3615               {
3616                 /** 0111 0001 0bit 1010         set1    %s0                             */
3617 #line 1034 "rl78-decode.opc"
3618                 int bit AU = (op[1] >> 4) & 0x07;
3619                 if (trace)
3620                   {
3621                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3622                            "/** 0111 0001 0bit 1010             set1    %s0                             */",
3623                            op[0], op[1]);
3624                     printf ("  bit = 0x%x\n", bit);
3625                   }
3626                 SYNTAX("set1    %s0");
3627 #line 1034 "rl78-decode.opc"
3628                 op0 = SFR;
3629                 ID(mov); DM(None, op0); DB(bit); SC(1);
3630                 if (op0 == RL78_SFR_PSW && bit == 7)
3631                   rl78->syntax = "ei";
3632
3633               }
3634             break;
3635           case 0x0b:
3636           case 0x1b:
3637           case 0x2b:
3638           case 0x3b:
3639           case 0x4b:
3640           case 0x5b:
3641           case 0x6b:
3642           case 0x7b:
3643               {
3644                 /** 0111 0001 0bit 1011         clr1    %s0                             */
3645 #line 429 "rl78-decode.opc"
3646                 int bit AU = (op[1] >> 4) & 0x07;
3647                 if (trace)
3648                   {
3649                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3650                            "/** 0111 0001 0bit 1011             clr1    %s0                             */",
3651                            op[0], op[1]);
3652                     printf ("  bit = 0x%x\n", bit);
3653                   }
3654                 SYNTAX("clr1    %s0");
3655 #line 429 "rl78-decode.opc"
3656                 op0 = SFR;
3657                 ID(mov); DM(None, op0); DB(bit); SC(0);
3658                 if (op0 == RL78_SFR_PSW && bit == 7)
3659                   rl78->syntax = "di";
3660
3661               }
3662             break;
3663           case 0x0c:
3664           case 0x1c:
3665           case 0x2c:
3666           case 0x3c:
3667           case 0x4c:
3668           case 0x5c:
3669           case 0x6c:
3670           case 0x7c:
3671               {
3672                 /** 0111 0001 0bit 1100         mov1    cy, %s1                         */
3673 #line 776 "rl78-decode.opc"
3674                 int bit AU = (op[1] >> 4) & 0x07;
3675                 if (trace)
3676                   {
3677                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3678                            "/** 0111 0001 0bit 1100             mov1    cy, %s1                         */",
3679                            op[0], op[1]);
3680                     printf ("  bit = 0x%x\n", bit);
3681                   }
3682                 SYNTAX("mov1    cy, %s1");
3683 #line 776 "rl78-decode.opc"
3684                 ID(mov); DCY(); SM(None, SFR); SB(bit);
3685
3686               }
3687             break;
3688           case 0x0d:
3689           case 0x1d:
3690           case 0x2d:
3691           case 0x3d:
3692           case 0x4d:
3693           case 0x5d:
3694           case 0x6d:
3695           case 0x7d:
3696               {
3697                 /** 0111 0001 0bit 1101         and1    cy, %s1                         */
3698 #line 302 "rl78-decode.opc"
3699                 int bit AU = (op[1] >> 4) & 0x07;
3700                 if (trace)
3701                   {
3702                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3703                            "/** 0111 0001 0bit 1101             and1    cy, %s1                         */",
3704                            op[0], op[1]);
3705                     printf ("  bit = 0x%x\n", bit);
3706                   }
3707                 SYNTAX("and1    cy, %s1");
3708 #line 302 "rl78-decode.opc"
3709                 ID(and); DCY(); SM(None, SFR); SB(bit);
3710
3711               }
3712             break;
3713           case 0x0e:
3714           case 0x1e:
3715           case 0x2e:
3716           case 0x3e:
3717           case 0x4e:
3718           case 0x5e:
3719           case 0x6e:
3720           case 0x7e:
3721               {
3722                 /** 0111 0001 0bit 1110         or1     cy, %s1                         */
3723 #line 954 "rl78-decode.opc"
3724                 int bit AU = (op[1] >> 4) & 0x07;
3725                 if (trace)
3726                   {
3727                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3728                            "/** 0111 0001 0bit 1110             or1     cy, %s1                         */",
3729                            op[0], op[1]);
3730                     printf ("  bit = 0x%x\n", bit);
3731                   }
3732                 SYNTAX("or1     cy, %s1");
3733 #line 954 "rl78-decode.opc"
3734                 ID(or); DCY(); SM(None, SFR); SB(bit);
3735
3736               }
3737             break;
3738           case 0x0f:
3739           case 0x1f:
3740           case 0x2f:
3741           case 0x3f:
3742           case 0x4f:
3743           case 0x5f:
3744           case 0x6f:
3745           case 0x7f:
3746               {
3747                 /** 0111 0001 0bit 1111         xor1    cy, %s1                         */
3748 #line 1258 "rl78-decode.opc"
3749                 int bit AU = (op[1] >> 4) & 0x07;
3750                 if (trace)
3751                   {
3752                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3753                            "/** 0111 0001 0bit 1111             xor1    cy, %s1                         */",
3754                            op[0], op[1]);
3755                     printf ("  bit = 0x%x\n", bit);
3756                   }
3757                 SYNTAX("xor1    cy, %s1");
3758 #line 1258 "rl78-decode.opc"
3759                 ID(xor); DCY(); SM(None, SFR); SB(bit);
3760
3761               }
3762             break;
3763           case 0x80:
3764               {
3765                 /** 0111 0001 1000 0000         set1    cy                              */
3766                 if (trace)
3767                   {
3768                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3769                            "/** 0111 0001 1000 0000             set1    cy                              */",
3770                            op[0], op[1]);
3771                   }
3772                 SYNTAX("set1    cy");
3773 #line 1031 "rl78-decode.opc"
3774                 ID(mov); DCY(); SC(1);
3775
3776               }
3777             break;
3778           case 0x81:
3779           case 0x91:
3780           case 0xa1:
3781           case 0xb1:
3782           case 0xc1:
3783           case 0xd1:
3784           case 0xe1:
3785           case 0xf1:
3786               {
3787                 /** 0111 0001 1bit 0001         mov1    %e0%0, cy                       */
3788 #line 761 "rl78-decode.opc"
3789                 int bit AU = (op[1] >> 4) & 0x07;
3790                 if (trace)
3791                   {
3792                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3793                            "/** 0111 0001 1bit 0001             mov1    %e0%0, cy                       */",
3794                            op[0], op[1]);
3795                     printf ("  bit = 0x%x\n", bit);
3796                   }
3797                 SYNTAX("mov1    %e0%0, cy");
3798 #line 761 "rl78-decode.opc"
3799                 ID(mov); DM(HL, 0); DB(bit); SCY();
3800
3801               }
3802             break;
3803           case 0x82:
3804           case 0x92:
3805           case 0xa2:
3806           case 0xb2:
3807           case 0xc2:
3808           case 0xd2:
3809           case 0xe2:
3810           case 0xf2:
3811               {
3812                 /** 0111 0001 1bit 0010         set1    %e0%0                           */
3813 #line 1025 "rl78-decode.opc"
3814                 int bit AU = (op[1] >> 4) & 0x07;
3815                 if (trace)
3816                   {
3817                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3818                            "/** 0111 0001 1bit 0010             set1    %e0%0                           */",
3819                            op[0], op[1]);
3820                     printf ("  bit = 0x%x\n", bit);
3821                   }
3822                 SYNTAX("set1    %e0%0");
3823 #line 1025 "rl78-decode.opc"
3824                 ID(mov); DM(HL, 0); DB(bit); SC(1);
3825
3826               }
3827             break;
3828           case 0x83:
3829           case 0x93:
3830           case 0xa3:
3831           case 0xb3:
3832           case 0xc3:
3833           case 0xd3:
3834           case 0xe3:
3835           case 0xf3:
3836               {
3837                 /** 0111 0001 1bit 0011         clr1    %e0%0                           */
3838 #line 420 "rl78-decode.opc"
3839                 int bit AU = (op[1] >> 4) & 0x07;
3840                 if (trace)
3841                   {
3842                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3843                            "/** 0111 0001 1bit 0011             clr1    %e0%0                           */",
3844                            op[0], op[1]);
3845                     printf ("  bit = 0x%x\n", bit);
3846                   }
3847                 SYNTAX("clr1    %e0%0");
3848 #line 420 "rl78-decode.opc"
3849                 ID(mov); DM(HL, 0); DB(bit); SC(0);
3850
3851               }
3852             break;
3853           case 0x84:
3854           case 0x94:
3855           case 0xa4:
3856           case 0xb4:
3857           case 0xc4:
3858           case 0xd4:
3859           case 0xe4:
3860           case 0xf4:
3861               {
3862                 /** 0111 0001 1bit 0100         mov1    cy, %e1%1                       */
3863 #line 767 "rl78-decode.opc"
3864                 int bit AU = (op[1] >> 4) & 0x07;
3865                 if (trace)
3866                   {
3867                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3868                            "/** 0111 0001 1bit 0100             mov1    cy, %e1%1                       */",
3869                            op[0], op[1]);
3870                     printf ("  bit = 0x%x\n", bit);
3871                   }
3872                 SYNTAX("mov1    cy, %e1%1");
3873 #line 767 "rl78-decode.opc"
3874                 ID(mov); DCY(); SM(HL, 0); SB(bit);
3875
3876               }
3877             break;
3878           case 0x85:
3879           case 0x95:
3880           case 0xa5:
3881           case 0xb5:
3882           case 0xc5:
3883           case 0xd5:
3884           case 0xe5:
3885           case 0xf5:
3886               {
3887                 /** 0111 0001 1bit 0101         and1    cy, %e1%1                       */
3888 #line 296 "rl78-decode.opc"
3889                 int bit AU = (op[1] >> 4) & 0x07;
3890                 if (trace)
3891                   {
3892                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3893                            "/** 0111 0001 1bit 0101             and1    cy, %e1%1                       */",
3894                            op[0], op[1]);
3895                     printf ("  bit = 0x%x\n", bit);
3896                   }
3897                 SYNTAX("and1    cy, %e1%1");
3898 #line 296 "rl78-decode.opc"
3899                 ID(and); DCY(); SM(HL, 0); SB(bit);
3900
3901               }
3902             break;
3903           case 0x86:
3904           case 0x96:
3905           case 0xa6:
3906           case 0xb6:
3907           case 0xc6:
3908           case 0xd6:
3909           case 0xe6:
3910           case 0xf6:
3911               {
3912                 /** 0111 0001 1bit 0110         or1     cy, %e1%1                       */
3913 #line 948 "rl78-decode.opc"
3914                 int bit AU = (op[1] >> 4) & 0x07;
3915                 if (trace)
3916                   {
3917                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3918                            "/** 0111 0001 1bit 0110             or1     cy, %e1%1                       */",
3919                            op[0], op[1]);
3920                     printf ("  bit = 0x%x\n", bit);
3921                   }
3922                 SYNTAX("or1     cy, %e1%1");
3923 #line 948 "rl78-decode.opc"
3924                 ID(or); DCY(); SM(HL, 0); SB(bit);
3925
3926               }
3927             break;
3928           case 0x87:
3929           case 0x97:
3930           case 0xa7:
3931           case 0xb7:
3932           case 0xc7:
3933           case 0xd7:
3934           case 0xe7:
3935           case 0xf7:
3936               {
3937                 /** 0111 0001 1bit 0111         xor1    cy, %e1%1                       */
3938 #line 1252 "rl78-decode.opc"
3939                 int bit AU = (op[1] >> 4) & 0x07;
3940                 if (trace)
3941                   {
3942                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3943                            "/** 0111 0001 1bit 0111             xor1    cy, %e1%1                       */",
3944                            op[0], op[1]);
3945                     printf ("  bit = 0x%x\n", bit);
3946                   }
3947                 SYNTAX("xor1    cy, %e1%1");
3948 #line 1252 "rl78-decode.opc"
3949                 ID(xor); DCY(); SM(HL, 0); SB(bit);
3950
3951               }
3952             break;
3953           case 0x88:
3954               {
3955                 /** 0111 0001 1000 1000         clr1    cy                              */
3956                 if (trace)
3957                   {
3958                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3959                            "/** 0111 0001 1000 1000             clr1    cy                              */",
3960                            op[0], op[1]);
3961                   }
3962                 SYNTAX("clr1    cy");
3963 #line 426 "rl78-decode.opc"
3964                 ID(mov); DCY(); SC(0);
3965
3966               }
3967             break;
3968           case 0x89:
3969           case 0x99:
3970           case 0xa9:
3971           case 0xb9:
3972           case 0xc9:
3973           case 0xd9:
3974           case 0xe9:
3975           case 0xf9:
3976               {
3977                 /** 0111 0001 1bit 1001         mov1    %e0%0, cy                       */
3978 #line 764 "rl78-decode.opc"
3979                 int bit AU = (op[1] >> 4) & 0x07;
3980                 if (trace)
3981                   {
3982                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3983                            "/** 0111 0001 1bit 1001             mov1    %e0%0, cy                       */",
3984                            op[0], op[1]);
3985                     printf ("  bit = 0x%x\n", bit);
3986                   }
3987                 SYNTAX("mov1    %e0%0, cy");
3988 #line 764 "rl78-decode.opc"
3989                 ID(mov); DR(A); DB(bit); SCY();
3990
3991               }
3992             break;
3993           case 0x8a:
3994           case 0x9a:
3995           case 0xaa:
3996           case 0xba:
3997           case 0xca:
3998           case 0xda:
3999           case 0xea:
4000           case 0xfa:
4001               {
4002                 /** 0111 0001 1bit 1010         set1    %0                              */
4003 #line 1028 "rl78-decode.opc"
4004                 int bit AU = (op[1] >> 4) & 0x07;
4005                 if (trace)
4006                   {
4007                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4008                            "/** 0111 0001 1bit 1010             set1    %0                              */",
4009                            op[0], op[1]);
4010                     printf ("  bit = 0x%x\n", bit);
4011                   }
4012                 SYNTAX("set1    %0");
4013 #line 1028 "rl78-decode.opc"
4014                 ID(mov); DR(A); DB(bit); SC(1);
4015
4016               }
4017             break;
4018           case 0x8b:
4019           case 0x9b:
4020           case 0xab:
4021           case 0xbb:
4022           case 0xcb:
4023           case 0xdb:
4024           case 0xeb:
4025           case 0xfb:
4026               {
4027                 /** 0111 0001 1bit 1011         clr1    %0                              */
4028 #line 423 "rl78-decode.opc"
4029                 int bit AU = (op[1] >> 4) & 0x07;
4030                 if (trace)
4031                   {
4032                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4033                            "/** 0111 0001 1bit 1011             clr1    %0                              */",
4034                            op[0], op[1]);
4035                     printf ("  bit = 0x%x\n", bit);
4036                   }
4037                 SYNTAX("clr1    %0");
4038 #line 423 "rl78-decode.opc"
4039                 ID(mov); DR(A); DB(bit); SC(0);
4040
4041               }
4042             break;
4043           case 0x8c:
4044           case 0x9c:
4045           case 0xac:
4046           case 0xbc:
4047           case 0xcc:
4048           case 0xdc:
4049           case 0xec:
4050           case 0xfc:
4051               {
4052                 /** 0111 0001 1bit 1100         mov1    cy, %e1%1                       */
4053 #line 770 "rl78-decode.opc"
4054                 int bit AU = (op[1] >> 4) & 0x07;
4055                 if (trace)
4056                   {
4057                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4058                            "/** 0111 0001 1bit 1100             mov1    cy, %e1%1                       */",
4059                            op[0], op[1]);
4060                     printf ("  bit = 0x%x\n", bit);
4061                   }
4062                 SYNTAX("mov1    cy, %e1%1");
4063 #line 770 "rl78-decode.opc"
4064                 ID(mov); DCY(); SR(A); SB(bit);
4065
4066               }
4067             break;
4068           case 0x8d:
4069           case 0x9d:
4070           case 0xad:
4071           case 0xbd:
4072           case 0xcd:
4073           case 0xdd:
4074           case 0xed:
4075           case 0xfd:
4076               {
4077                 /** 0111 0001 1bit 1101         and1    cy, %1                          */
4078 #line 299 "rl78-decode.opc"
4079                 int bit AU = (op[1] >> 4) & 0x07;
4080                 if (trace)
4081                   {
4082                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4083                            "/** 0111 0001 1bit 1101             and1    cy, %1                          */",
4084                            op[0], op[1]);
4085                     printf ("  bit = 0x%x\n", bit);
4086                   }
4087                 SYNTAX("and1    cy, %1");
4088 #line 299 "rl78-decode.opc"
4089                 ID(and); DCY(); SR(A); SB(bit);
4090
4091               }
4092             break;
4093           case 0x8e:
4094           case 0x9e:
4095           case 0xae:
4096           case 0xbe:
4097           case 0xce:
4098           case 0xde:
4099           case 0xee:
4100           case 0xfe:
4101               {
4102                 /** 0111 0001 1bit 1110         or1     cy, %1                          */
4103 #line 951 "rl78-decode.opc"
4104                 int bit AU = (op[1] >> 4) & 0x07;
4105                 if (trace)
4106                   {
4107                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4108                            "/** 0111 0001 1bit 1110             or1     cy, %1                          */",
4109                            op[0], op[1]);
4110                     printf ("  bit = 0x%x\n", bit);
4111                   }
4112                 SYNTAX("or1     cy, %1");
4113 #line 951 "rl78-decode.opc"
4114                 ID(or); DCY(); SR(A); SB(bit);
4115
4116               }
4117             break;
4118           case 0x8f:
4119           case 0x9f:
4120           case 0xaf:
4121           case 0xbf:
4122           case 0xcf:
4123           case 0xdf:
4124           case 0xef:
4125           case 0xff:
4126               {
4127                 /** 0111 0001 1bit 1111         xor1    cy, %1                          */
4128 #line 1255 "rl78-decode.opc"
4129                 int bit AU = (op[1] >> 4) & 0x07;
4130                 if (trace)
4131                   {
4132                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4133                            "/** 0111 0001 1bit 1111             xor1    cy, %1                          */",
4134                            op[0], op[1]);
4135                     printf ("  bit = 0x%x\n", bit);
4136                   }
4137                 SYNTAX("xor1    cy, %1");
4138 #line 1255 "rl78-decode.opc"
4139                 ID(xor); DCY(); SR(A); SB(bit);
4140
4141               }
4142             break;
4143           case 0xc0:
4144               {
4145                 /** 0111 0001 1100 0000         not1    cy                              */
4146                 if (trace)
4147                   {
4148                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4149                            "/** 0111 0001 1100 0000             not1    cy                              */",
4150                            op[0], op[1]);
4151                   }
4152                 SYNTAX("not1    cy");
4153 #line 892 "rl78-decode.opc"
4154                 ID(xor); DCY(); SC(1);
4155
4156               /*----------------------------------------------------------------------*/
4157
4158               }
4159             break;
4160           default: UNSUPPORTED(); break;
4161         }
4162       break;
4163     case 0x78:
4164         {
4165           /** 0111 1000                 movw    %e0%0, %1                       */
4166           if (trace)
4167             {
4168               printf ("\033[33m%s\033[0m  %02x\n",
4169                      "/** 0111 1000                     movw    %e0%0, %1                       */",
4170                      op[0]);
4171             }
4172           SYNTAX("movw  %e0%0, %1");
4173 #line 853 "rl78-decode.opc"
4174           ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
4175
4176         }
4177       break;
4178     case 0x79:
4179         {
4180           /** 0111 1001                 movw    %0, %e1%1                       */
4181           if (trace)
4182             {
4183               printf ("\033[33m%s\033[0m  %02x\n",
4184                      "/** 0111 1001                     movw    %0, %e1%1                       */",
4185                      op[0]);
4186             }
4187           SYNTAX("movw  %0, %e1%1");
4188 #line 844 "rl78-decode.opc"
4189           ID(mov); W(); DR(AX); SM(BC, IMMU(2));
4190
4191         }
4192       break;
4193     case 0x7a:
4194         {
4195           /** 0111 1010                 xor     %0, #%1                         */
4196           if (trace)
4197             {
4198               printf ("\033[33m%s\033[0m  %02x\n",
4199                      "/** 0111 1010                     xor     %0, #%1                         */",
4200                      op[0]);
4201             }
4202           SYNTAX("xor   %0, #%1");
4203 #line 1247 "rl78-decode.opc"
4204           ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz;
4205
4206         /*----------------------------------------------------------------------*/
4207
4208         }
4209       break;
4210     case 0x7b:
4211         {
4212           /** 0111 1011                 xor     %0, %1                          */
4213           if (trace)
4214             {
4215               printf ("\033[33m%s\033[0m  %02x\n",
4216                      "/** 0111 1011                     xor     %0, %1                          */",
4217                      op[0]);
4218             }
4219           SYNTAX("xor   %0, %1");
4220 #line 1244 "rl78-decode.opc"
4221           ID(xor); DR(A); SM(None, SADDR); Fz;
4222
4223         }
4224       break;
4225     case 0x7c:
4226         {
4227           /** 0111 1100                 xor     %0, #%1                         */
4228           if (trace)
4229             {
4230               printf ("\033[33m%s\033[0m  %02x\n",
4231                      "/** 0111 1100                     xor     %0, #%1                         */",
4232                      op[0]);
4233             }
4234           SYNTAX("xor   %0, #%1");
4235 #line 1235 "rl78-decode.opc"
4236           ID(xor); DR(A); SC(IMMU(1)); Fz;
4237
4238         }
4239       break;
4240     case 0x7d:
4241         {
4242           /** 0111 1101                 xor     %0, %e1%1                       */
4243           if (trace)
4244             {
4245               printf ("\033[33m%s\033[0m  %02x\n",
4246                      "/** 0111 1101                     xor     %0, %e1%1                       */",
4247                      op[0]);
4248             }
4249           SYNTAX("xor   %0, %e1%1");
4250 #line 1223 "rl78-decode.opc"
4251           ID(xor); DR(A); SM(HL, 0); Fz;
4252
4253         }
4254       break;
4255     case 0x7e:
4256         {
4257           /** 0111 1110                 xor     %0, %e1%1                       */
4258           if (trace)
4259             {
4260               printf ("\033[33m%s\033[0m  %02x\n",
4261                      "/** 0111 1110                     xor     %0, %e1%1                       */",
4262                      op[0]);
4263             }
4264           SYNTAX("xor   %0, %e1%1");
4265 #line 1229 "rl78-decode.opc"
4266           ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
4267
4268         }
4269       break;
4270     case 0x7f:
4271         {
4272           /** 0111 1111                 xor     %0, %e1%!1                      */
4273           if (trace)
4274             {
4275               printf ("\033[33m%s\033[0m  %02x\n",
4276                      "/** 0111 1111                     xor     %0, %e1%!1                      */",
4277                      op[0]);
4278             }
4279           SYNTAX("xor   %0, %e1%!1");
4280 #line 1220 "rl78-decode.opc"
4281           ID(xor); DR(A); SM(None, IMMU(2)); Fz;
4282
4283         }
4284       break;
4285     case 0x80:
4286     case 0x81:
4287     case 0x82:
4288     case 0x83:
4289     case 0x84:
4290     case 0x85:
4291     case 0x86:
4292     case 0x87:
4293         {
4294           /** 1000 0reg                 inc     %0                              */
4295 #line 566 "rl78-decode.opc"
4296           int reg AU = op[0] & 0x07;
4297           if (trace)
4298             {
4299               printf ("\033[33m%s\033[0m  %02x\n",
4300                      "/** 1000 0reg                     inc     %0                              */",
4301                      op[0]);
4302               printf ("  reg = 0x%x\n", reg);
4303             }
4304           SYNTAX("inc   %0");
4305 #line 566 "rl78-decode.opc"
4306           ID(add); DRB(reg); SC(1); Fza;
4307
4308         }
4309       break;
4310     case 0x88:
4311         {
4312           /** 1000 1000                 mov     %0, %e1%1                       */
4313           if (trace)
4314             {
4315               printf ("\033[33m%s\033[0m  %02x\n",
4316                      "/** 1000 1000                     mov     %0, %e1%1                       */",
4317                      op[0]);
4318             }
4319           SYNTAX("mov   %0, %e1%1");
4320 #line 645 "rl78-decode.opc"
4321           ID(mov); DR(A); SM(SP, IMMU(1));
4322
4323         }
4324       break;
4325     case 0x89:
4326         {
4327           /** 1000 1001                 mov     %0, %e1%1                       */
4328           if (trace)
4329             {
4330               printf ("\033[33m%s\033[0m  %02x\n",
4331                      "/** 1000 1001                     mov     %0, %e1%1                       */",
4332                      op[0]);
4333             }
4334           SYNTAX("mov   %0, %e1%1");
4335 #line 627 "rl78-decode.opc"
4336           ID(mov); DR(A); SM(DE, 0);
4337
4338         }
4339       break;
4340     case 0x8a:
4341         {
4342           /** 1000 1010                 mov     %0, %e1%1                       */
4343           if (trace)
4344             {
4345               printf ("\033[33m%s\033[0m  %02x\n",
4346                      "/** 1000 1010                     mov     %0, %e1%1                       */",
4347                      op[0]);
4348             }
4349           SYNTAX("mov   %0, %e1%1");
4350 #line 630 "rl78-decode.opc"
4351           ID(mov); DR(A); SM(DE, IMMU(1));
4352
4353         }
4354       break;
4355     case 0x8b:
4356         {
4357           /** 1000 1011                 mov     %0, %e1%1                       */
4358           if (trace)
4359             {
4360               printf ("\033[33m%s\033[0m  %02x\n",
4361                      "/** 1000 1011                     mov     %0, %e1%1                       */",
4362                      op[0]);
4363             }
4364           SYNTAX("mov   %0, %e1%1");
4365 #line 633 "rl78-decode.opc"
4366           ID(mov); DR(A); SM(HL, 0);
4367
4368         }
4369       break;
4370     case 0x8c:
4371         {
4372           /** 1000 1100                 mov     %0, %e1%1                       */
4373           if (trace)
4374             {
4375               printf ("\033[33m%s\033[0m  %02x\n",
4376                      "/** 1000 1100                     mov     %0, %e1%1                       */",
4377                      op[0]);
4378             }
4379           SYNTAX("mov   %0, %e1%1");
4380 #line 636 "rl78-decode.opc"
4381           ID(mov); DR(A); SM(HL, IMMU(1));
4382
4383         }
4384       break;
4385     case 0x8d:
4386         {
4387           /** 1000 1101                 mov     %0, %1                          */
4388           if (trace)
4389             {
4390               printf ("\033[33m%s\033[0m  %02x\n",
4391                      "/** 1000 1101                     mov     %0, %1                          */",
4392                      op[0]);
4393             }
4394           SYNTAX("mov   %0, %1");
4395 #line 669 "rl78-decode.opc"
4396           ID(mov); DR(A); SM(None, SADDR);
4397
4398         }
4399       break;
4400     case 0x8e:
4401         {
4402           /** 1000 1110                 mov     %0, %s1                         */
4403           if (trace)
4404             {
4405               printf ("\033[33m%s\033[0m  %02x\n",
4406                      "/** 1000 1110                     mov     %0, %s1                         */",
4407                      op[0]);
4408             }
4409           SYNTAX("mov   %0, %s1");
4410 #line 666 "rl78-decode.opc"
4411           ID(mov); DR(A); SM(None, SFR);
4412
4413         }
4414       break;
4415     case 0x8f:
4416         {
4417           /** 1000 1111                 mov     %0, %e1%!1                      */
4418           if (trace)
4419             {
4420               printf ("\033[33m%s\033[0m  %02x\n",
4421                      "/** 1000 1111                     mov     %0, %e1%!1                      */",
4422                      op[0]);
4423             }
4424           SYNTAX("mov   %0, %e1%!1");
4425 #line 624 "rl78-decode.opc"
4426           ID(mov); DR(A); SM(None, IMMU(2));
4427
4428         }
4429       break;
4430     case 0x90:
4431     case 0x91:
4432     case 0x92:
4433     case 0x93:
4434     case 0x94:
4435     case 0x95:
4436     case 0x96:
4437     case 0x97:
4438         {
4439           /** 1001 0reg                 dec     %0                              */
4440 #line 533 "rl78-decode.opc"
4441           int reg AU = op[0] & 0x07;
4442           if (trace)
4443             {
4444               printf ("\033[33m%s\033[0m  %02x\n",
4445                      "/** 1001 0reg                     dec     %0                              */",
4446                      op[0]);
4447               printf ("  reg = 0x%x\n", reg);
4448             }
4449           SYNTAX("dec   %0");
4450 #line 533 "rl78-decode.opc"
4451           ID(sub); DRB(reg); SC(1); Fza;
4452
4453         }
4454       break;
4455     case 0x98:
4456         {
4457           /** 1001 1000                 mov     %0, %1                          */
4458           if (trace)
4459             {
4460               printf ("\033[33m%s\033[0m  %02x\n",
4461                      "/** 1001 1000                     mov     %0, %1                          */",
4462                      op[0]);
4463             }
4464           SYNTAX("mov   %0, %1");
4465 #line 621 "rl78-decode.opc"
4466           ID(mov); DM(SP, IMMU(1)); SR(A);
4467
4468         }
4469       break;
4470     case 0x99:
4471         {
4472           /** 1001 1001                 mov     %e0%0,%1                        */
4473           if (trace)
4474             {
4475               printf ("\033[33m%s\033[0m  %02x\n",
4476                      "/** 1001 1001                     mov     %e0%0,%1                        */",
4477                      op[0]);
4478             }
4479           SYNTAX("mov   %e0%0,%1");
4480 #line 594 "rl78-decode.opc"
4481           ID(mov); DM(DE, 0); SR(A);
4482
4483         }
4484       break;
4485     case 0x9a:
4486         {
4487           /** 1001 1010                 mov     %e0%0, %1                       */
4488           if (trace)
4489             {
4490               printf ("\033[33m%s\033[0m  %02x\n",
4491                      "/** 1001 1010                     mov     %e0%0, %1                       */",
4492                      op[0]);
4493             }
4494           SYNTAX("mov   %e0%0, %1");
4495 #line 600 "rl78-decode.opc"
4496           ID(mov); DM(DE, IMMU(1)); SR(A);
4497
4498         }
4499       break;
4500     case 0x9b:
4501         {
4502           /** 1001 1011                 mov     %e0%0,%1                        */
4503           if (trace)
4504             {
4505               printf ("\033[33m%s\033[0m  %02x\n",
4506                      "/** 1001 1011                     mov     %e0%0,%1                        */",
4507                      op[0]);
4508             }
4509           SYNTAX("mov   %e0%0,%1");
4510 #line 603 "rl78-decode.opc"
4511           ID(mov); DM(HL, 0); SR(A);
4512
4513         }
4514       break;
4515     case 0x9c:
4516         {
4517           /** 1001 1100                 mov     %e0%0, %1                       */
4518           if (trace)
4519             {
4520               printf ("\033[33m%s\033[0m  %02x\n",
4521                      "/** 1001 1100                     mov     %e0%0, %1                       */",
4522                      op[0]);
4523             }
4524           SYNTAX("mov   %e0%0, %1");
4525 #line 612 "rl78-decode.opc"
4526           ID(mov); DM(HL, IMMU(1)); SR(A);
4527
4528         }
4529       break;
4530     case 0x9d:
4531         {
4532           /** 1001 1101                 mov     %0, %1                          */
4533           if (trace)
4534             {
4535               printf ("\033[33m%s\033[0m  %02x\n",
4536                      "/** 1001 1101                     mov     %0, %1                          */",
4537                      op[0]);
4538             }
4539           SYNTAX("mov   %0, %1");
4540 #line 726 "rl78-decode.opc"
4541           ID(mov); DM(None, SADDR); SR(A);
4542
4543         }
4544       break;
4545     case 0x9e:
4546         {
4547           /** 1001 1110                 mov     %0, %1                          */
4548           if (trace)
4549             {
4550               printf ("\033[33m%s\033[0m  %02x\n",
4551                      "/** 1001 1110                     mov     %0, %1                          */",
4552                      op[0]);
4553             }
4554           SYNTAX("mov   %0, %1");
4555 #line 756 "rl78-decode.opc"
4556           ID(mov); DM(None, SFR); SR(A);
4557
4558         /*----------------------------------------------------------------------*/
4559
4560         }
4561       break;
4562     case 0x9f:
4563         {
4564           /** 1001 1111                 mov     %e0%!0, %1                      */
4565           if (trace)
4566             {
4567               printf ("\033[33m%s\033[0m  %02x\n",
4568                      "/** 1001 1111                     mov     %e0%!0, %1                      */",
4569                      op[0]);
4570             }
4571           SYNTAX("mov   %e0%!0, %1");
4572 #line 591 "rl78-decode.opc"
4573           ID(mov); DM(None, IMMU(2)); SR(A);
4574
4575         }
4576       break;
4577     case 0xa0:
4578         {
4579           /** 1010 0000                 inc     %e0%!0                          */
4580           if (trace)
4581             {
4582               printf ("\033[33m%s\033[0m  %02x\n",
4583                      "/** 1010 0000                     inc     %e0%!0                          */",
4584                      op[0]);
4585             }
4586           SYNTAX("inc   %e0%!0");
4587 #line 560 "rl78-decode.opc"
4588           ID(add); DM(None, IMMU(2)); SC(1); Fza;
4589
4590         }
4591       break;
4592     case 0xa1:
4593     case 0xa3:
4594     case 0xa5:
4595     case 0xa7:
4596         {
4597           /** 1010 0rg1                 incw    %0                              */
4598 #line 580 "rl78-decode.opc"
4599           int rg AU = (op[0] >> 1) & 0x03;
4600           if (trace)
4601             {
4602               printf ("\033[33m%s\033[0m  %02x\n",
4603                      "/** 1010 0rg1                     incw    %0                              */",
4604                      op[0]);
4605               printf ("  rg = 0x%x\n", rg);
4606             }
4607           SYNTAX("incw  %0");
4608 #line 580 "rl78-decode.opc"
4609           ID(add); W(); DRW(rg); SC(1);
4610
4611         }
4612       break;
4613     case 0xa2:
4614         {
4615           /** 1010 0010                 incw    %e0%!0                          */
4616           if (trace)
4617             {
4618               printf ("\033[33m%s\033[0m  %02x\n",
4619                      "/** 1010 0010                     incw    %e0%!0                          */",
4620                      op[0]);
4621             }
4622           SYNTAX("incw  %e0%!0");
4623 #line 574 "rl78-decode.opc"
4624           ID(add); W(); DM(None, IMMU(2)); SC(1);
4625
4626         }
4627       break;
4628     case 0xa4:
4629         {
4630           /** 1010 0100                 inc     %0                              */
4631           if (trace)
4632             {
4633               printf ("\033[33m%s\033[0m  %02x\n",
4634                      "/** 1010 0100                     inc     %0                              */",
4635                      op[0]);
4636             }
4637           SYNTAX("inc   %0");
4638 #line 569 "rl78-decode.opc"
4639           ID(add); DM(None, SADDR); SC(1); Fza;
4640
4641         /*----------------------------------------------------------------------*/
4642
4643         }
4644       break;
4645     case 0xa6:
4646         {
4647           /** 1010 0110                 incw    %0                              */
4648           if (trace)
4649             {
4650               printf ("\033[33m%s\033[0m  %02x\n",
4651                      "/** 1010 0110                     incw    %0                              */",
4652                      op[0]);
4653             }
4654           SYNTAX("incw  %0");
4655 #line 583 "rl78-decode.opc"
4656           ID(add); W(); DM(None, SADDR); SC(1);
4657
4658         /*----------------------------------------------------------------------*/
4659
4660         }
4661       break;
4662     case 0xa8:
4663         {
4664           /** 1010 1000                 movw    %0, %1                          */
4665           if (trace)
4666             {
4667               printf ("\033[33m%s\033[0m  %02x\n",
4668                      "/** 1010 1000                     movw    %0, %1                          */",
4669                      op[0]);
4670             }
4671           SYNTAX("movw  %0, %1");
4672 #line 826 "rl78-decode.opc"
4673           ID(mov); W(); DR(AX); SM(SP, IMMU(1));
4674
4675         }
4676       break;
4677     case 0xa9:
4678         {
4679           /** 1010 1001                 movw    %0, %e1%1                       */
4680           if (trace)
4681             {
4682               printf ("\033[33m%s\033[0m  %02x\n",
4683                      "/** 1010 1001                     movw    %0, %e1%1                       */",
4684                      op[0]);
4685             }
4686           SYNTAX("movw  %0, %e1%1");
4687 #line 814 "rl78-decode.opc"
4688           ID(mov); W(); DR(AX); SM(DE, 0);
4689
4690         }
4691       break;
4692     case 0xaa:
4693         {
4694           /** 1010 1010                 movw    %0, %e1%1                       */
4695           if (trace)
4696             {
4697               printf ("\033[33m%s\033[0m  %02x\n",
4698                      "/** 1010 1010                     movw    %0, %e1%1                       */",
4699                      op[0]);
4700             }
4701           SYNTAX("movw  %0, %e1%1");
4702 #line 817 "rl78-decode.opc"
4703           ID(mov); W(); DR(AX); SM(DE, IMMU(1));
4704
4705         }
4706       break;
4707     case 0xab:
4708         {
4709           /** 1010 1011                 movw    %0, %e1%1                       */
4710           if (trace)
4711             {
4712               printf ("\033[33m%s\033[0m  %02x\n",
4713                      "/** 1010 1011                     movw    %0, %e1%1                       */",
4714                      op[0]);
4715             }
4716           SYNTAX("movw  %0, %e1%1");
4717 #line 820 "rl78-decode.opc"
4718           ID(mov); W(); DR(AX); SM(HL, 0);
4719
4720         }
4721       break;
4722     case 0xac:
4723         {
4724           /** 1010 1100                 movw    %0, %e1%1                       */
4725           if (trace)
4726             {
4727               printf ("\033[33m%s\033[0m  %02x\n",
4728                      "/** 1010 1100                     movw    %0, %e1%1                       */",
4729                      op[0]);
4730             }
4731           SYNTAX("movw  %0, %e1%1");
4732 #line 823 "rl78-decode.opc"
4733           ID(mov); W(); DR(AX); SM(HL, IMMU(1));
4734
4735         }
4736       break;
4737     case 0xad:
4738         {
4739           /** 1010 1101                 movw    %0, %1                          */
4740           if (trace)
4741             {
4742               printf ("\033[33m%s\033[0m  %02x\n",
4743                      "/** 1010 1101                     movw    %0, %1                          */",
4744                      op[0]);
4745             }
4746           SYNTAX("movw  %0, %1");
4747 #line 856 "rl78-decode.opc"
4748           ID(mov); W(); DR(AX); SM(None, SADDR);
4749
4750         }
4751       break;
4752     case 0xae:
4753         {
4754           /** 1010 1110                 movw    %0, %s1                         */
4755           if (trace)
4756             {
4757               printf ("\033[33m%s\033[0m  %02x\n",
4758                      "/** 1010 1110                     movw    %0, %s1                         */",
4759                      op[0]);
4760             }
4761           SYNTAX("movw  %0, %s1");
4762 #line 859 "rl78-decode.opc"
4763           ID(mov); W(); DR(AX); SM(None, SFR);
4764
4765         }
4766       break;
4767     case 0xaf:
4768         {
4769           /** 1010 1111                 movw    %0, %e1%!1                      */
4770           if (trace)
4771             {
4772               printf ("\033[33m%s\033[0m  %02x\n",
4773                      "/** 1010 1111                     movw    %0, %e1%!1                      */",
4774                      op[0]);
4775             }
4776           SYNTAX("movw  %0, %e1%!1");
4777 #line 810 "rl78-decode.opc"
4778           ID(mov); W(); DR(AX); SM(None, IMMU(2));
4779
4780
4781         }
4782       break;
4783     case 0xb0:
4784         {
4785           /** 1011 0000                 dec     %e0%!0                          */
4786           if (trace)
4787             {
4788               printf ("\033[33m%s\033[0m  %02x\n",
4789                      "/** 1011 0000                     dec     %e0%!0                          */",
4790                      op[0]);
4791             }
4792           SYNTAX("dec   %e0%!0");
4793 #line 527 "rl78-decode.opc"
4794           ID(sub); DM(None, IMMU(2)); SC(1); Fza;
4795
4796         }
4797       break;
4798     case 0xb1:
4799     case 0xb3:
4800     case 0xb5:
4801     case 0xb7:
4802         {
4803           /** 1011 0rg1                         decw    %0                              */
4804 #line 547 "rl78-decode.opc"
4805           int rg AU = (op[0] >> 1) & 0x03;
4806           if (trace)
4807             {
4808               printf ("\033[33m%s\033[0m  %02x\n",
4809                      "/** 1011 0rg1                     decw    %0                              */",
4810                      op[0]);
4811               printf ("  rg = 0x%x\n", rg);
4812             }
4813           SYNTAX("decw  %0");
4814 #line 547 "rl78-decode.opc"
4815           ID(sub); W(); DRW(rg); SC(1);
4816
4817         }
4818       break;
4819     case 0xb2:
4820         {
4821           /** 1011 0010                 decw    %e0%!0                          */
4822           if (trace)
4823             {
4824               printf ("\033[33m%s\033[0m  %02x\n",
4825                      "/** 1011 0010                     decw    %e0%!0                          */",
4826                      op[0]);
4827             }
4828           SYNTAX("decw  %e0%!0");
4829 #line 541 "rl78-decode.opc"
4830           ID(sub); W(); DM(None, IMMU(2)); SC(1);
4831
4832         }
4833       break;
4834     case 0xb4:
4835         {
4836           /** 1011 0100                 dec     %0                              */
4837           if (trace)
4838             {
4839               printf ("\033[33m%s\033[0m  %02x\n",
4840                      "/** 1011 0100                     dec     %0                              */",
4841                      op[0]);
4842             }
4843           SYNTAX("dec   %0");
4844 #line 536 "rl78-decode.opc"
4845           ID(sub); DM(None, SADDR); SC(1); Fza;
4846
4847         /*----------------------------------------------------------------------*/
4848
4849         }
4850       break;
4851     case 0xb6:
4852         {
4853           /** 1011 0110                 decw    %0                              */
4854           if (trace)
4855             {
4856               printf ("\033[33m%s\033[0m  %02x\n",
4857                      "/** 1011 0110                     decw    %0                              */",
4858                      op[0]);
4859             }
4860           SYNTAX("decw  %0");
4861 #line 550 "rl78-decode.opc"
4862           ID(sub); W(); DM(None, SADDR); SC(1);
4863
4864         /*----------------------------------------------------------------------*/
4865
4866         }
4867       break;
4868     case 0xb8:
4869         {
4870           /** 1011 1000                 movw    %0, %1                          */
4871           if (trace)
4872             {
4873               printf ("\033[33m%s\033[0m  %02x\n",
4874                      "/** 1011 1000                     movw    %0, %1                          */",
4875                      op[0]);
4876             }
4877           SYNTAX("movw  %0, %1");
4878 #line 807 "rl78-decode.opc"
4879           ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
4880
4881         }
4882       break;
4883     case 0xb9:
4884         {
4885           /** 1011 1001                 movw    %e0%0, %1                       */
4886           if (trace)
4887             {
4888               printf ("\033[33m%s\033[0m  %02x\n",
4889                      "/** 1011 1001                     movw    %e0%0, %1                       */",
4890                      op[0]);
4891             }
4892           SYNTAX("movw  %e0%0, %1");
4893 #line 795 "rl78-decode.opc"
4894           ID(mov); W(); DM(DE, 0); SR(AX);
4895
4896         }
4897       break;
4898     case 0xba:
4899         {
4900           /** 1011 1010                 movw    %e0%0, %1                       */
4901           if (trace)
4902             {
4903               printf ("\033[33m%s\033[0m  %02x\n",
4904                      "/** 1011 1010                     movw    %e0%0, %1                       */",
4905                      op[0]);
4906             }
4907           SYNTAX("movw  %e0%0, %1");
4908 #line 798 "rl78-decode.opc"
4909           ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
4910
4911         }
4912       break;
4913     case 0xbb:
4914         {
4915           /** 1011 1011                 movw    %e0%0, %1                       */
4916           if (trace)
4917             {
4918               printf ("\033[33m%s\033[0m  %02x\n",
4919                      "/** 1011 1011                     movw    %e0%0, %1                       */",
4920                      op[0]);
4921             }
4922           SYNTAX("movw  %e0%0, %1");
4923 #line 801 "rl78-decode.opc"
4924           ID(mov); W(); DM(HL, 0); SR(AX);
4925
4926         }
4927       break;
4928     case 0xbc:
4929         {
4930           /** 1011 1100                 movw    %e0%0, %1                       */
4931           if (trace)
4932             {
4933               printf ("\033[33m%s\033[0m  %02x\n",
4934                      "/** 1011 1100                     movw    %e0%0, %1                       */",
4935                      op[0]);
4936             }
4937           SYNTAX("movw  %e0%0, %1");
4938 #line 804 "rl78-decode.opc"
4939           ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
4940
4941         }
4942       break;
4943     case 0xbd:
4944         {
4945           /** 1011 1101                 movw    %0, %1                          */
4946           if (trace)
4947             {
4948               printf ("\033[33m%s\033[0m  %02x\n",
4949                      "/** 1011 1101                     movw    %0, %1                          */",
4950                      op[0]);
4951             }
4952           SYNTAX("movw  %0, %1");
4953 #line 871 "rl78-decode.opc"
4954           ID(mov); W(); DM(None, SADDR); SR(AX);
4955
4956         }
4957       break;
4958     case 0xbe:
4959         {
4960           /** 1011 1110                 movw    %0, %1                          */
4961           if (trace)
4962             {
4963               printf ("\033[33m%s\033[0m  %02x\n",
4964                      "/** 1011 1110                     movw    %0, %1                          */",
4965                      op[0]);
4966             }
4967           SYNTAX("movw  %0, %1");
4968 #line 877 "rl78-decode.opc"
4969           ID(mov); W(); DM(None, SFR); SR(AX);
4970
4971         /*----------------------------------------------------------------------*/
4972
4973         }
4974       break;
4975     case 0xbf:
4976         {
4977           /** 1011 1111                 movw    %e0%!0, %1                      */
4978           if (trace)
4979             {
4980               printf ("\033[33m%s\033[0m  %02x\n",
4981                      "/** 1011 1111                     movw    %e0%!0, %1                      */",
4982                      op[0]);
4983             }
4984           SYNTAX("movw  %e0%!0, %1");
4985 #line 792 "rl78-decode.opc"
4986           ID(mov); W(); DM(None, IMMU(2)); SR(AX);
4987
4988         }
4989       break;
4990     case 0xc0:
4991     case 0xc2:
4992     case 0xc4:
4993     case 0xc6:
4994         {
4995           /** 1100 0rg0                 pop     %0                              */
4996 #line 962 "rl78-decode.opc"
4997           int rg AU = (op[0] >> 1) & 0x03;
4998           if (trace)
4999             {
5000               printf ("\033[33m%s\033[0m  %02x\n",
5001                      "/** 1100 0rg0                     pop     %0                              */",
5002                      op[0]);
5003               printf ("  rg = 0x%x\n", rg);
5004             }
5005           SYNTAX("pop   %0");
5006 #line 962 "rl78-decode.opc"
5007           ID(mov); W(); DRW(rg); SPOP();
5008
5009         }
5010       break;
5011     case 0xc1:
5012     case 0xc3:
5013     case 0xc5:
5014     case 0xc7:
5015         {
5016           /** 1100 0rg1                 push    %1                              */
5017 #line 970 "rl78-decode.opc"
5018           int rg AU = (op[0] >> 1) & 0x03;
5019           if (trace)
5020             {
5021               printf ("\033[33m%s\033[0m  %02x\n",
5022                      "/** 1100 0rg1                     push    %1                              */",
5023                      op[0]);
5024               printf ("  rg = 0x%x\n", rg);
5025             }
5026           SYNTAX("push  %1");
5027 #line 970 "rl78-decode.opc"
5028           ID(mov); W(); DPUSH(); SRW(rg);
5029
5030         }
5031       break;
5032     case 0xc8:
5033         {
5034           /** 1100 1000                 mov     %0, #%1                         */
5035           if (trace)
5036             {
5037               printf ("\033[33m%s\033[0m  %02x\n",
5038                      "/** 1100 1000                     mov     %0, #%1                         */",
5039                      op[0]);
5040             }
5041           SYNTAX("mov   %0, #%1");
5042 #line 618 "rl78-decode.opc"
5043           ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
5044
5045         }
5046       break;
5047     case 0xc9:
5048         {
5049           /** 1100 1001                 movw    %0, #%1                         */
5050           if (trace)
5051             {
5052               printf ("\033[33m%s\033[0m  %02x\n",
5053                      "/** 1100 1001                     movw    %0, #%1                         */",
5054                      op[0]);
5055             }
5056           SYNTAX("movw  %0, #%1");
5057 #line 868 "rl78-decode.opc"
5058           ID(mov); W(); DM(None, SADDR); SC(IMMU(2));
5059
5060         }
5061       break;
5062     case 0xca:
5063         {
5064           /** 1100 1010                 mov     %e0%0, #%1                      */
5065           if (trace)
5066             {
5067               printf ("\033[33m%s\033[0m  %02x\n",
5068                      "/** 1100 1010                     mov     %e0%0, #%1                      */",
5069                      op[0]);
5070             }
5071           SYNTAX("mov   %e0%0, #%1");
5072 #line 597 "rl78-decode.opc"
5073           ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
5074
5075         }
5076       break;
5077     case 0xcb:
5078         {
5079           /** 1100 1011                 movw    %0, #%1                         */
5080           if (trace)
5081             {
5082               printf ("\033[33m%s\033[0m  %02x\n",
5083                      "/** 1100 1011                     movw    %0, #%1                         */",
5084                      op[0]);
5085             }
5086           SYNTAX("movw  %0, #%1");
5087 #line 874 "rl78-decode.opc"
5088           ID(mov); W(); DM(None, SFR); SC(IMMU(2));
5089
5090         }
5091       break;
5092     case 0xcc:
5093         {
5094           /** 1100 1100                 mov     %e0%0, #%1                      */
5095           if (trace)
5096             {
5097               printf ("\033[33m%s\033[0m  %02x\n",
5098                      "/** 1100 1100                     mov     %e0%0, #%1                      */",
5099                      op[0]);
5100             }
5101           SYNTAX("mov   %e0%0, #%1");
5102 #line 609 "rl78-decode.opc"
5103           ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
5104
5105         }
5106       break;
5107     case 0xcd:
5108         {
5109           /** 1100 1101                 mov     %0, #%1                         */
5110           if (trace)
5111             {
5112               printf ("\033[33m%s\033[0m  %02x\n",
5113                      "/** 1100 1101                     mov     %0, #%1                         */",
5114                      op[0]);
5115             }
5116           SYNTAX("mov   %0, #%1");
5117 #line 723 "rl78-decode.opc"
5118           ID(mov); DM(None, SADDR); SC(IMMU(1));
5119
5120         }
5121       break;
5122     case 0xce:
5123         {
5124           /** 1100 1110                 mov     %s0, #%1                        */
5125           if (trace)
5126             {
5127               printf ("\033[33m%s\033[0m  %02x\n",
5128                      "/** 1100 1110                     mov     %s0, #%1                        */",
5129                      op[0]);
5130             }
5131           SYNTAX("mov   %s0, #%1");
5132 #line 729 "rl78-decode.opc"
5133           op0 = SFR;
5134           op1 = IMMU(1);
5135           ID(mov); DM(None, op0); SC(op1);
5136           if (op0 == 0xffffb)
5137             switch (op1)
5138               {
5139               case 0x01:
5140                 rl78->syntax = "mulhu"; ID(mulhu);
5141                 break;
5142               case 0x02:
5143                 rl78->syntax = "mulh"; ID(mulh);
5144                 break;
5145               case 0x03:
5146                 rl78->syntax = "divhu"; ID(divhu);
5147                 break;
5148               case 0x04:
5149                 rl78->syntax = "divwu"; ID(divwu);
5150                 break;
5151               case 0x05:
5152                 rl78->syntax = "machu"; ID(machu);
5153                 break;
5154               case 0x06:
5155                 rl78->syntax = "mach"; ID(mach);
5156                 break;
5157               }
5158
5159         }
5160       break;
5161     case 0xcf:
5162         {
5163           /** 1100 1111                 mov     %e0%!0, #%1                     */
5164           if (trace)
5165             {
5166               printf ("\033[33m%s\033[0m  %02x\n",
5167                      "/** 1100 1111                     mov     %e0%!0, #%1                     */",
5168                      op[0]);
5169             }
5170           SYNTAX("mov   %e0%!0, #%1");
5171 #line 588 "rl78-decode.opc"
5172           ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
5173
5174         }
5175       break;
5176     case 0xd0:
5177     case 0xd1:
5178     case 0xd2:
5179     case 0xd3:
5180         {
5181           /** 1101 00rg                 cmp0    %0                              */
5182 #line 497 "rl78-decode.opc"
5183           int rg AU = op[0] & 0x03;
5184           if (trace)
5185             {
5186               printf ("\033[33m%s\033[0m  %02x\n",
5187                      "/** 1101 00rg                     cmp0    %0                              */",
5188                      op[0]);
5189               printf ("  rg = 0x%x\n", rg);
5190             }
5191           SYNTAX("cmp0  %0");
5192 #line 497 "rl78-decode.opc"
5193           ID(cmp); DRB(rg); SC(0); Fzac;
5194
5195         }
5196       break;
5197     case 0xd4:
5198         {
5199           /** 1101 0100                 cmp0    %0                              */
5200           if (trace)
5201             {
5202               printf ("\033[33m%s\033[0m  %02x\n",
5203                      "/** 1101 0100                     cmp0    %0                              */",
5204                      op[0]);
5205             }
5206           SYNTAX("cmp0  %0");
5207 #line 500 "rl78-decode.opc"
5208           ID(cmp); DM(None, SADDR); SC(0); Fzac;
5209
5210         /*----------------------------------------------------------------------*/
5211
5212         }
5213       break;
5214     case 0xd5:
5215         {
5216           /** 1101 0101                 cmp0    %e0%!0                          */
5217           if (trace)
5218             {
5219               printf ("\033[33m%s\033[0m  %02x\n",
5220                      "/** 1101 0101                     cmp0    %e0%!0                          */",
5221                      op[0]);
5222             }
5223           SYNTAX("cmp0  %e0%!0");
5224 #line 494 "rl78-decode.opc"
5225           ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
5226
5227         }
5228       break;
5229     case 0xd6:
5230         {
5231           /** 1101 0110                 mulu    x                               */
5232           if (trace)
5233             {
5234               printf ("\033[33m%s\033[0m  %02x\n",
5235                      "/** 1101 0110                     mulu    x                               */",
5236                      op[0]);
5237             }
5238           SYNTAX("mulu  x");
5239 #line 882 "rl78-decode.opc"
5240           ID(mulu);
5241
5242         /*----------------------------------------------------------------------*/
5243
5244         }
5245       break;
5246     case 0xd7:
5247         {
5248           /** 1101 0111                 ret                                     */
5249           if (trace)
5250             {
5251               printf ("\033[33m%s\033[0m  %02x\n",
5252                      "/** 1101 0111                     ret                                     */",
5253                      op[0]);
5254             }
5255           SYNTAX("ret");
5256 #line 978 "rl78-decode.opc"
5257           ID(ret);
5258
5259         }
5260       break;
5261     case 0xd8:
5262         {
5263           /** 1101 1000                 mov     %0, %1                          */
5264           if (trace)
5265             {
5266               printf ("\033[33m%s\033[0m  %02x\n",
5267                      "/** 1101 1000                     mov     %0, %1                          */",
5268                      op[0]);
5269             }
5270           SYNTAX("mov   %0, %1");
5271 #line 690 "rl78-decode.opc"
5272           ID(mov); DR(X); SM(None, SADDR);
5273
5274         }
5275       break;
5276     case 0xd9:
5277         {
5278           /** 1101 1001                 mov     %0, %e1%!1                      */
5279           if (trace)
5280             {
5281               printf ("\033[33m%s\033[0m  %02x\n",
5282                      "/** 1101 1001                     mov     %0, %e1%!1                      */",
5283                      op[0]);
5284             }
5285           SYNTAX("mov   %0, %e1%!1");
5286 #line 687 "rl78-decode.opc"
5287           ID(mov); DR(X); SM(None, IMMU(2));
5288
5289         }
5290       break;
5291     case 0xda:
5292     case 0xea:
5293     case 0xfa:
5294         {
5295           /** 11ra 1010                 movw    %0, %1                          */
5296 #line 865 "rl78-decode.opc"
5297           int ra AU = (op[0] >> 4) & 0x03;
5298           if (trace)
5299             {
5300               printf ("\033[33m%s\033[0m  %02x\n",
5301                      "/** 11ra 1010                     movw    %0, %1                          */",
5302                      op[0]);
5303               printf ("  ra = 0x%x\n", ra);
5304             }
5305           SYNTAX("movw  %0, %1");
5306 #line 865 "rl78-decode.opc"
5307           ID(mov); W(); DRW(ra); SM(None, SADDR);
5308
5309         }
5310       break;
5311     case 0xdb:
5312     case 0xeb:
5313     case 0xfb:
5314         {
5315           /** 11ra 1011                 movw    %0, %e1%!1                      */
5316 #line 862 "rl78-decode.opc"
5317           int ra AU = (op[0] >> 4) & 0x03;
5318           if (trace)
5319             {
5320               printf ("\033[33m%s\033[0m  %02x\n",
5321                      "/** 11ra 1011                     movw    %0, %e1%!1                      */",
5322                      op[0]);
5323               printf ("  ra = 0x%x\n", ra);
5324             }
5325           SYNTAX("movw  %0, %e1%!1");
5326 #line 862 "rl78-decode.opc"
5327           ID(mov); W(); DRW(ra); SM(None, IMMU(2));
5328
5329         }
5330       break;
5331     case 0xdc:
5332         {
5333           /** 1101 1100                 bc      $%a0                            */
5334           if (trace)
5335             {
5336               printf ("\033[33m%s\033[0m  %02x\n",
5337                      "/** 1101 1100                     bc      $%a0                            */",
5338                      op[0]);
5339             }
5340           SYNTAX("bc    $%a0");
5341 #line 313 "rl78-decode.opc"
5342           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C);
5343
5344         }
5345       break;
5346     case 0xdd:
5347         {
5348           /** 1101 1101                 bz      $%a0                            */
5349           if (trace)
5350             {
5351               printf ("\033[33m%s\033[0m  %02x\n",
5352                      "/** 1101 1101                     bz      $%a0                            */",
5353                      op[0]);
5354             }
5355           SYNTAX("bz    $%a0");
5356 #line 325 "rl78-decode.opc"
5357           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z);
5358
5359         }
5360       break;
5361     case 0xde:
5362         {
5363           /** 1101 1110                 bnc     $%a0                            */
5364           if (trace)
5365             {
5366               printf ("\033[33m%s\033[0m  %02x\n",
5367                      "/** 1101 1110                     bnc     $%a0                            */",
5368                      op[0]);
5369             }
5370           SYNTAX("bnc   $%a0");
5371 #line 316 "rl78-decode.opc"
5372           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC);
5373
5374         }
5375       break;
5376     case 0xdf:
5377         {
5378           /** 1101 1111                 bnz     $%a0                            */
5379           if (trace)
5380             {
5381               printf ("\033[33m%s\033[0m  %02x\n",
5382                      "/** 1101 1111                     bnz     $%a0                            */",
5383                      op[0]);
5384             }
5385           SYNTAX("bnz   $%a0");
5386 #line 328 "rl78-decode.opc"
5387           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ);
5388
5389         /*----------------------------------------------------------------------*/
5390
5391         }
5392       break;
5393     case 0xe0:
5394     case 0xe1:
5395     case 0xe2:
5396     case 0xe3:
5397         {
5398           /** 1110 00rg                 oneb    %0                              */
5399 #line 900 "rl78-decode.opc"
5400           int rg AU = op[0] & 0x03;
5401           if (trace)
5402             {
5403               printf ("\033[33m%s\033[0m  %02x\n",
5404                      "/** 1110 00rg                     oneb    %0                              */",
5405                      op[0]);
5406               printf ("  rg = 0x%x\n", rg);
5407             }
5408           SYNTAX("oneb  %0");
5409 #line 900 "rl78-decode.opc"
5410           ID(mov); DRB(rg); SC(1);
5411
5412         }
5413       break;
5414     case 0xe4:
5415         {
5416           /** 1110 0100                 oneb    %0                              */
5417           if (trace)
5418             {
5419               printf ("\033[33m%s\033[0m  %02x\n",
5420                      "/** 1110 0100                     oneb    %0                              */",
5421                      op[0]);
5422             }
5423           SYNTAX("oneb  %0");
5424 #line 903 "rl78-decode.opc"
5425           ID(mov); DM(None, SADDR); SC(1);
5426
5427         /*----------------------------------------------------------------------*/
5428
5429         }
5430       break;
5431     case 0xe5:
5432         {
5433           /** 1110 0101                 oneb    %e0%!0                          */
5434           if (trace)
5435             {
5436               printf ("\033[33m%s\033[0m  %02x\n",
5437                      "/** 1110 0101                     oneb    %e0%!0                          */",
5438                      op[0]);
5439             }
5440           SYNTAX("oneb  %e0%!0");
5441 #line 897 "rl78-decode.opc"
5442           ID(mov); DM(None, IMMU(2)); SC(1);
5443
5444         }
5445       break;
5446     case 0xe6:
5447         {
5448           /** 1110 0110                 onew    %0                              */
5449           if (trace)
5450             {
5451               printf ("\033[33m%s\033[0m  %02x\n",
5452                      "/** 1110 0110                     onew    %0                              */",
5453                      op[0]);
5454             }
5455           SYNTAX("onew  %0");
5456 #line 908 "rl78-decode.opc"
5457           ID(mov); DR(AX); SC(1);
5458
5459         }
5460       break;
5461     case 0xe7:
5462         {
5463           /** 1110 0111                 onew    %0                              */
5464           if (trace)
5465             {
5466               printf ("\033[33m%s\033[0m  %02x\n",
5467                      "/** 1110 0111                     onew    %0                              */",
5468                      op[0]);
5469             }
5470           SYNTAX("onew  %0");
5471 #line 911 "rl78-decode.opc"
5472           ID(mov); DR(BC); SC(1);
5473
5474         /*----------------------------------------------------------------------*/
5475
5476         }
5477       break;
5478     case 0xe8:
5479         {
5480           /** 1110 1000                 mov     %0, %1                          */
5481           if (trace)
5482             {
5483               printf ("\033[33m%s\033[0m  %02x\n",
5484                      "/** 1110 1000                     mov     %0, %1                          */",
5485                      op[0]);
5486             }
5487           SYNTAX("mov   %0, %1");
5488 #line 678 "rl78-decode.opc"
5489           ID(mov); DR(B); SM(None, SADDR);
5490
5491         }
5492       break;
5493     case 0xe9:
5494         {
5495           /** 1110 1001                 mov     %0, %e1%!1                      */
5496           if (trace)
5497             {
5498               printf ("\033[33m%s\033[0m  %02x\n",
5499                      "/** 1110 1001                     mov     %0, %e1%!1                      */",
5500                      op[0]);
5501             }
5502           SYNTAX("mov   %0, %e1%!1");
5503 #line 672 "rl78-decode.opc"
5504           ID(mov); DR(B); SM(None, IMMU(2));
5505
5506         }
5507       break;
5508     case 0xec:
5509         {
5510           /** 1110 1100                 br      !%!a0                           */
5511           if (trace)
5512             {
5513               printf ("\033[33m%s\033[0m  %02x\n",
5514                      "/** 1110 1100                     br      !%!a0                           */",
5515                      op[0]);
5516             }
5517           SYNTAX("br    !%!a0");
5518 #line 347 "rl78-decode.opc"
5519           ID(branch); DC(IMMU(3));
5520
5521         }
5522       break;
5523     case 0xed:
5524         {
5525           /** 1110 1101                 br      %!a0                            */
5526           if (trace)
5527             {
5528               printf ("\033[33m%s\033[0m  %02x\n",
5529                      "/** 1110 1101                     br      %!a0                            */",
5530                      op[0]);
5531             }
5532           SYNTAX("br    %!a0");
5533 #line 350 "rl78-decode.opc"
5534           ID(branch); DC(IMMU(2));
5535
5536         }
5537       break;
5538     case 0xee:
5539         {
5540           /** 1110 1110                 br      $%!a0                           */
5541           if (trace)
5542             {
5543               printf ("\033[33m%s\033[0m  %02x\n",
5544                      "/** 1110 1110                     br      $%!a0                           */",
5545                      op[0]);
5546             }
5547           SYNTAX("br    $%!a0");
5548 #line 353 "rl78-decode.opc"
5549           ID(branch); DC(pc+IMMS(2)+3);
5550
5551         }
5552       break;
5553     case 0xef:
5554         {
5555           /** 1110 1111                 br      $%a0                            */
5556           if (trace)
5557             {
5558               printf ("\033[33m%s\033[0m  %02x\n",
5559                      "/** 1110 1111                     br      $%a0                            */",
5560                      op[0]);
5561             }
5562           SYNTAX("br    $%a0");
5563 #line 356 "rl78-decode.opc"
5564           ID(branch); DC(pc+IMMS(1)+2);
5565
5566         }
5567       break;
5568     case 0xf0:
5569     case 0xf1:
5570     case 0xf2:
5571     case 0xf3:
5572         {
5573           /** 1111 00rg                 clrb    %0                              */
5574 #line 443 "rl78-decode.opc"
5575           int rg AU = op[0] & 0x03;
5576           if (trace)
5577             {
5578               printf ("\033[33m%s\033[0m  %02x\n",
5579                      "/** 1111 00rg                     clrb    %0                              */",
5580                      op[0]);
5581               printf ("  rg = 0x%x\n", rg);
5582             }
5583           SYNTAX("clrb  %0");
5584 #line 443 "rl78-decode.opc"
5585           ID(mov); DRB(rg); SC(0);
5586
5587         }
5588       break;
5589     case 0xf4:
5590         {
5591           /** 1111 0100                 clrb    %0                              */
5592           if (trace)
5593             {
5594               printf ("\033[33m%s\033[0m  %02x\n",
5595                      "/** 1111 0100                     clrb    %0                              */",
5596                      op[0]);
5597             }
5598           SYNTAX("clrb  %0");
5599 #line 446 "rl78-decode.opc"
5600           ID(mov); DM(None, SADDR); SC(0);
5601
5602         /*----------------------------------------------------------------------*/
5603
5604         }
5605       break;
5606     case 0xf5:
5607         {
5608           /** 1111 0101                 clrb    %e0%!0                          */
5609           if (trace)
5610             {
5611               printf ("\033[33m%s\033[0m  %02x\n",
5612                      "/** 1111 0101                     clrb    %e0%!0                          */",
5613                      op[0]);
5614             }
5615           SYNTAX("clrb  %e0%!0");
5616 #line 440 "rl78-decode.opc"
5617           ID(mov); DM(None, IMMU(2)); SC(0);
5618
5619         }
5620       break;
5621     case 0xf6:
5622         {
5623           /** 1111 0110                 clrw    %0                              */
5624           if (trace)
5625             {
5626               printf ("\033[33m%s\033[0m  %02x\n",
5627                      "/** 1111 0110                     clrw    %0                              */",
5628                      op[0]);
5629             }
5630           SYNTAX("clrw  %0");
5631 #line 451 "rl78-decode.opc"
5632           ID(mov); DR(AX); SC(0);
5633
5634         }
5635       break;
5636     case 0xf7:
5637         {
5638           /** 1111 0111                 clrw    %0                              */
5639           if (trace)
5640             {
5641               printf ("\033[33m%s\033[0m  %02x\n",
5642                      "/** 1111 0111                     clrw    %0                              */",
5643                      op[0]);
5644             }
5645           SYNTAX("clrw  %0");
5646 #line 454 "rl78-decode.opc"
5647           ID(mov); DR(BC); SC(0);
5648
5649         /*----------------------------------------------------------------------*/
5650
5651         }
5652       break;
5653     case 0xf8:
5654         {
5655           /** 1111 1000                 mov     %0, %1                          */
5656           if (trace)
5657             {
5658               printf ("\033[33m%s\033[0m  %02x\n",
5659                      "/** 1111 1000                     mov     %0, %1                          */",
5660                      op[0]);
5661             }
5662           SYNTAX("mov   %0, %1");
5663 #line 684 "rl78-decode.opc"
5664           ID(mov); DR(C); SM(None, SADDR);
5665
5666         }
5667       break;
5668     case 0xf9:
5669         {
5670           /** 1111 1001                 mov     %0, %e1%!1                      */
5671           if (trace)
5672             {
5673               printf ("\033[33m%s\033[0m  %02x\n",
5674                      "/** 1111 1001                     mov     %0, %e1%!1                      */",
5675                      op[0]);
5676             }
5677           SYNTAX("mov   %0, %e1%!1");
5678 #line 681 "rl78-decode.opc"
5679           ID(mov); DR(C); SM(None, IMMU(2));
5680
5681         }
5682       break;
5683     case 0xfc:
5684         {
5685           /** 1111 1100                 call    !%!a0                           */
5686           if (trace)
5687             {
5688               printf ("\033[33m%s\033[0m  %02x\n",
5689                      "/** 1111 1100                     call    !%!a0                           */",
5690                      op[0]);
5691             }
5692           SYNTAX("call  !%!a0");
5693 #line 400 "rl78-decode.opc"
5694           ID(call); DC(IMMU(3));
5695
5696         }
5697       break;
5698     case 0xfd:
5699         {
5700           /** 1111 1101                 call    %!a0                            */
5701           if (trace)
5702             {
5703               printf ("\033[33m%s\033[0m  %02x\n",
5704                      "/** 1111 1101                     call    %!a0                            */",
5705                      op[0]);
5706             }
5707           SYNTAX("call  %!a0");
5708 #line 403 "rl78-decode.opc"
5709           ID(call); DC(IMMU(2));
5710
5711         }
5712       break;
5713     case 0xfe:
5714         {
5715           /** 1111 1110                 call    $%!a0                           */
5716           if (trace)
5717             {
5718               printf ("\033[33m%s\033[0m  %02x\n",
5719                      "/** 1111 1110                     call    $%!a0                           */",
5720                      op[0]);
5721             }
5722           SYNTAX("call  $%!a0");
5723 #line 406 "rl78-decode.opc"
5724           ID(call); DC(pc+IMMS(2)+3);
5725
5726         }
5727       break;
5728     case 0xff:
5729         {
5730           /** 1111 1111                 brk1                                    */
5731           if (trace)
5732             {
5733               printf ("\033[33m%s\033[0m  %02x\n",
5734                      "/** 1111 1111                     brk1                                    */",
5735                      op[0]);
5736             }
5737           SYNTAX("brk1");
5738 #line 364 "rl78-decode.opc"
5739           ID(break);
5740
5741         }
5742       break;
5743   }
5744 #line 1266 "rl78-decode.opc"
5745
5746   return rl78->n_bytes;
5747 }