1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of GDB, GAS, and the GNU binutils.
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 2, or (at your option) any later version.
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 #include "opcode/ppc.h"
27 /* This file provides several disassembler functions, all of which use
28 the disassembler interface defined in dis-asm.h. Several functions
29 are provided because this file handles disassembly for the PowerPC
30 in both big and little endian mode and also for the POWER (RS/6000)
33 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
35 /* Determine which set of machines to disassemble for. PPC403/601 or
36 BookE. For convenience, also disassemble instructions supported
37 by the AltiVec vector unit. */
40 powerpc_dialect (struct disassemble_info *info)
42 int dialect = PPC_OPCODE_PPC;
44 if (BFD_DEFAULT_TARGET_SIZE == 64)
45 dialect |= PPC_OPCODE_64;
47 if (info->disassembler_options
48 && strstr (info->disassembler_options, "booke") != NULL)
49 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
50 else if ((info->mach == bfd_mach_ppc_e500)
51 || (info->disassembler_options
52 && strstr (info->disassembler_options, "e500") != NULL))
53 dialect |= (PPC_OPCODE_BOOKE
54 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
55 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
56 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
58 else if (info->disassembler_options
59 && strstr (info->disassembler_options, "efs") != NULL)
60 dialect |= PPC_OPCODE_EFS;
61 else if (info->disassembler_options
62 && strstr (info->disassembler_options, "e300") != NULL)
63 dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
64 else if (info->disassembler_options
65 && strstr (info->disassembler_options, "440") != NULL)
66 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
67 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
69 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
70 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
72 if (info->disassembler_options
73 && strstr (info->disassembler_options, "power4") != NULL)
74 dialect |= PPC_OPCODE_POWER4;
76 if (info->disassembler_options
77 && strstr (info->disassembler_options, "power5") != NULL)
78 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
80 if (info->disassembler_options
81 && strstr (info->disassembler_options, "cell") != NULL)
82 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
84 if (info->disassembler_options
85 && strstr (info->disassembler_options, "power6") != NULL)
86 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
88 if (info->disassembler_options
89 && strstr (info->disassembler_options, "any") != NULL)
90 dialect |= PPC_OPCODE_ANY;
92 if (info->disassembler_options)
94 if (strstr (info->disassembler_options, "32") != NULL)
95 dialect &= ~PPC_OPCODE_64;
96 else if (strstr (info->disassembler_options, "64") != NULL)
97 dialect |= PPC_OPCODE_64;
100 info->private_data = (char *) 0 + dialect;
104 /* Print a big endian PowerPC instruction. */
107 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
109 int dialect = (char *) info->private_data - (char *) 0;
110 return print_insn_powerpc (memaddr, info, 1, dialect);
113 /* Print a little endian PowerPC instruction. */
116 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
118 int dialect = (char *) info->private_data - (char *) 0;
119 return print_insn_powerpc (memaddr, info, 0, dialect);
122 /* Print a POWER (RS/6000) instruction. */
125 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
127 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
130 /* Print a PowerPC or POWER instruction. */
133 print_insn_powerpc (bfd_vma memaddr,
134 struct disassemble_info *info,
141 const struct powerpc_opcode *opcode;
142 const struct powerpc_opcode *opcode_end;
146 dialect = powerpc_dialect (info);
148 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
151 (*info->memory_error_func) (status, memaddr, info);
156 insn = bfd_getb32 (buffer);
158 insn = bfd_getl32 (buffer);
160 /* Get the major opcode of the instruction. */
163 /* Find the first match in the opcode table. We could speed this up
164 a bit by doing a binary search on the major opcode. */
165 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
167 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
169 unsigned long table_op;
170 const unsigned char *opindex;
171 const struct powerpc_operand *operand;
176 table_op = PPC_OP (opcode->opcode);
182 if ((insn & opcode->mask) != opcode->opcode
183 || (opcode->flags & dialect) == 0)
186 /* Make two passes over the operands. First see if any of them
187 have extraction functions, and, if they do, make sure the
188 instruction is valid. */
190 for (opindex = opcode->operands; *opindex != 0; opindex++)
192 operand = powerpc_operands + *opindex;
193 if (operand->extract)
194 (*operand->extract) (insn, dialect, &invalid);
199 /* The instruction is valid. */
200 if (opcode->operands[0] != 0)
201 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
203 (*info->fprintf_func) (info->stream, "%s", opcode->name);
205 /* Now extract and print the operands. */
208 for (opindex = opcode->operands; *opindex != 0; opindex++)
212 operand = powerpc_operands + *opindex;
214 /* Operands that are marked FAKE are simply ignored. We
215 already made sure that the extract function considered
216 the instruction to be valid. */
217 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
220 /* Extract the value from the instruction. */
221 if (operand->extract)
222 value = (*operand->extract) (insn, dialect, &invalid);
225 value = (insn >> operand->shift) & operand->bitm;
226 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
228 /* BITM is always some number of zeros followed by some
229 number of ones, followed by some numer of zeros. */
230 unsigned long top = operand->bitm;
231 /* top & -top gives the rightmost 1 bit, so this
232 fills in any trailing zeros. */
233 top |= (top & -top) - 1;
235 value = (value ^ top) - top;
239 /* If the operand is optional, and the value is zero, don't
241 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
242 && (operand->flags & PPC_OPERAND_NEXT) == 0
248 (*info->fprintf_func) (info->stream, ",");
252 /* Print the operand as directed by the flags. */
253 if ((operand->flags & PPC_OPERAND_GPR) != 0
254 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
255 (*info->fprintf_func) (info->stream, "r%ld", value);
256 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
257 (*info->fprintf_func) (info->stream, "f%ld", value);
258 else if ((operand->flags & PPC_OPERAND_VR) != 0)
259 (*info->fprintf_func) (info->stream, "v%ld", value);
260 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
261 (*info->print_address_func) (memaddr + value, info);
262 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
263 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
264 else if ((operand->flags & PPC_OPERAND_CR) == 0
265 || (dialect & PPC_OPCODE_PPC) == 0)
266 (*info->fprintf_func) (info->stream, "%ld", value);
269 if (operand->bitm == 7)
270 (*info->fprintf_func) (info->stream, "cr%ld", value);
273 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
279 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
281 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
287 (*info->fprintf_func) (info->stream, ")");
291 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
295 (*info->fprintf_func) (info->stream, "(");
300 /* We have found and printed an instruction; return. */
304 if ((dialect & PPC_OPCODE_ANY) != 0)
306 dialect = ~PPC_OPCODE_ANY;
310 /* We could not find a match. */
311 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
317 print_ppc_disassembler_options (FILE *stream)
319 fprintf (stream, "\n\
320 The following PPC specific disassembler options are supported for use with\n\
323 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
324 fprintf (stream, " e300 Disassemble the e300 instructions\n");
325 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
326 fprintf (stream, " 440 Disassemble the 440 instructions\n");
327 fprintf (stream, " efs Disassemble the EFS instructions\n");
328 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
329 fprintf (stream, " power5 Disassemble the Power5 instructions\n");
330 fprintf (stream, " power6 Disassemble the Power6 instructions\n");
331 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
332 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");