1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 2, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/ppc.h"
27 /* This file provides several disassembler functions, all of which use
28 the disassembler interface defined in dis-asm.h. Several functions
29 are provided because this file handles disassembly for the PowerPC
30 in both big and little endian mode and also for the POWER (RS/6000)
33 static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
34 int bigendian, int dialect));
36 /* Print a big endian PowerPC instruction. For convenience, also
37 disassemble instructions supported by the Motorola PowerPC 601. */
40 print_insn_big_powerpc (memaddr, info)
42 struct disassemble_info *info;
44 return print_insn_powerpc (memaddr, info, 1,
45 PPC_OPCODE_PPC | PPC_OPCODE_601);
48 /* Print a little endian PowerPC instruction. For convenience, also
49 disassemble instructions supported by the Motorola PowerPC 601. */
52 print_insn_little_powerpc (memaddr, info)
54 struct disassemble_info *info;
56 return print_insn_powerpc (memaddr, info, 0,
57 PPC_OPCODE_PPC | PPC_OPCODE_601);
60 /* Print a POWER (RS/6000) instruction. */
63 print_insn_rs6000 (memaddr, info)
65 struct disassemble_info *info;
67 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
70 /* Print a PowerPC or POWER instruction. */
73 print_insn_powerpc (memaddr, info, bigendian, dialect)
75 struct disassemble_info *info;
82 const struct powerpc_opcode *opcode;
83 const struct powerpc_opcode *opcode_end;
86 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
89 (*info->memory_error_func) (status, memaddr, info);
94 insn = bfd_getb32 (buffer);
96 insn = bfd_getl32 (buffer);
98 /* Get the major opcode of the instruction. */
101 /* Find the first match in the opcode table. We could speed this up
102 a bit by doing a binary search on the major opcode. */
103 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
104 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
106 unsigned long table_op;
107 const unsigned char *opindex;
108 const struct powerpc_operand *operand;
113 table_op = PPC_OP (opcode->opcode);
119 if ((insn & opcode->mask) != opcode->opcode
120 || (opcode->flags & dialect) == 0)
123 /* Make two passes over the operands. First see if any of them
124 have extraction functions, and, if they do, make sure the
125 instruction is valid. */
127 for (opindex = opcode->operands; *opindex != 0; opindex++)
129 operand = powerpc_operands + *opindex;
130 if (operand->extract)
131 (*operand->extract) (insn, &invalid);
136 /* The instruction is valid. */
137 (*info->fprintf_func) (info->stream, "%s", opcode->name);
138 if (opcode->operands[0] != 0)
139 (*info->fprintf_func) (info->stream, "\t");
141 /* Now extract and print the operands. */
144 for (opindex = opcode->operands; *opindex != 0; opindex++)
148 operand = powerpc_operands + *opindex;
150 /* Operands that are marked FAKE are simply ignored. We
151 already made sure that the extract function considered
152 the instruction to be valid. */
153 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
156 /* Extract the value from the instruction. */
157 if (operand->extract)
158 value = (*operand->extract) (insn, (int *) NULL);
161 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
162 if ((operand->flags & PPC_OPERAND_SIGNED) != 0
163 && (value & (1 << (operand->bits - 1))) != 0)
164 value -= 1 << operand->bits;
167 /* If the operand is optional, and the value is zero, don't
169 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
170 && (operand->flags & PPC_OPERAND_NEXT) == 0
176 (*info->fprintf_func) (info->stream, ",");
180 /* Print the operand as directed by the flags. */
181 if ((operand->flags & PPC_OPERAND_GPR) != 0)
182 (*info->fprintf_func) (info->stream, "r%ld", value);
183 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
184 (*info->fprintf_func) (info->stream, "f%ld", value);
185 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
186 (*info->print_address_func) (memaddr + value, info);
187 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
188 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
189 else if ((operand->flags & PPC_OPERAND_CR) == 0
190 || (dialect & PPC_OPCODE_PPC) == 0)
191 (*info->fprintf_func) (info->stream, "%ld", value);
194 if (operand->bits == 3)
195 (*info->fprintf_func) (info->stream, "cr%d", value);
198 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
204 (*info->fprintf_func) (info->stream, "4*cr%d", cr);
209 (*info->fprintf_func) (info->stream, "+");
210 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
217 (*info->fprintf_func) (info->stream, ")");
221 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
225 (*info->fprintf_func) (info->stream, "(");
230 /* We have found and printed an instruction; return. */
234 /* We could not find a match. */
235 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);