1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
27 #include "opcode/ppc.h"
29 /* This file provides several disassembler functions, all of which use
30 the disassembler interface defined in dis-asm.h. Several functions
31 are provided because this file handles disassembly for the PowerPC
32 in both big and little endian mode and also for the POWER (RS/6000)
34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
39 /* Stash the result of parsing disassembler_options here. */
43 #define POWERPC_DIALECT(INFO) \
44 (((struct dis_private *) ((INFO)->private_data))->dialect)
52 struct ppc_mopt ppc_opts[] = {
53 { "403", (PPC_OPCODE_PPC | PPC_OPCODE_403),
55 { "405", (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405),
57 { "440", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
58 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
60 { "464", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
61 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
63 { "476", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
64 | PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
66 { "601", (PPC_OPCODE_PPC | PPC_OPCODE_601),
68 { "603", (PPC_OPCODE_PPC),
70 { "604", (PPC_OPCODE_PPC),
72 { "620", (PPC_OPCODE_PPC | PPC_OPCODE_64),
74 { "7400", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
76 { "7410", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
78 { "7450", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
80 { "7455", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
82 { "750cl", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
84 { "a2", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
85 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
88 { "altivec", (PPC_OPCODE_PPC),
92 { "booke", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
94 { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
96 { "cell", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
97 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
99 { "com", (PPC_OPCODE_COMMON),
101 { "e300", (PPC_OPCODE_PPC | PPC_OPCODE_E300),
103 { "e500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
104 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
105 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
108 { "e500mc", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
109 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
110 | PPC_OPCODE_E500MC),
112 { "e500mc64", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
113 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
114 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
115 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
117 { "e5500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
118 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
119 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
120 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
121 | PPC_OPCODE_POWER7),
123 { "e6500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
124 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
125 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
126 | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
127 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
129 { "e500x2", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
130 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
131 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
134 { "efs", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
136 { "power4", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
138 { "power5", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
139 | PPC_OPCODE_POWER5),
141 { "power6", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
142 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
144 { "power7", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
145 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
146 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
148 { "ppc", (PPC_OPCODE_PPC),
150 { "ppc32", (PPC_OPCODE_PPC),
152 { "ppc64", (PPC_OPCODE_PPC | PPC_OPCODE_64),
154 { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE),
156 { "ppcps", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
158 { "pwr", (PPC_OPCODE_POWER),
160 { "pwr2", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
162 { "pwr4", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
164 { "pwr5", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
165 | PPC_OPCODE_POWER5),
167 { "pwr5x", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
168 | PPC_OPCODE_POWER5),
170 { "pwr6", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
171 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
173 { "pwr7", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
174 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
175 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
177 { "pwrx", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
179 { "spe", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
181 { "titan", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
182 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
184 { "vsx", (PPC_OPCODE_PPC),
188 /* Handle -m and -M options that set cpu type, and .machine arg. */
191 ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
194 ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
195 | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
198 for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
199 if (strcmp (ppc_opts[i].opt, arg) == 0)
201 if (ppc_opts[i].sticky)
203 retain_flags |= ppc_opts[i].sticky;
204 if ((ppc_cpu & ~(ppc_cpu_t) (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
205 | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
208 ppc_cpu = ppc_opts[i].cpu;
211 if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
214 ppc_cpu |= retain_flags;
218 /* Determine which set of machines to disassemble for. */
221 powerpc_init_dialect (struct disassemble_info *info)
223 ppc_cpu_t dialect = 0;
225 struct dis_private *priv = calloc (sizeof (*priv), 1);
230 arg = info->disassembler_options;
233 ppc_cpu_t new_cpu = 0;
234 char *end = strchr (arg, ',');
239 if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
241 else if (strcmp (arg, "32") == 0)
242 dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
243 else if (strcmp (arg, "64") == 0)
244 dialect |= PPC_OPCODE_64;
246 fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
253 if ((dialect & ~(ppc_cpu_t) PPC_OPCODE_64) == 0)
255 if (info->mach == bfd_mach_ppc64)
256 dialect |= PPC_OPCODE_64;
258 dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
259 /* Choose a reasonable default. */
260 dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
261 | PPC_OPCODE_ALTIVEC);
264 info->private_data = priv;
265 POWERPC_DIALECT(info) = dialect;
268 static unsigned short powerpc_opcd_indices[65];
270 /* Calculate opcode table indices to speed up disassembly,
274 disassemble_init_powerpc (struct disassemble_info *info)
279 i = powerpc_num_opcodes;
282 unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
284 powerpc_opcd_indices[op] = i;
287 last = powerpc_num_opcodes;
288 for (i = 64; i > 0; --i)
290 if (powerpc_opcd_indices[i] == 0)
291 powerpc_opcd_indices[i] = last;
292 last = powerpc_opcd_indices[i];
295 if (info->arch == bfd_arch_powerpc)
296 powerpc_init_dialect (info);
299 /* Print a big endian PowerPC instruction. */
302 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
304 return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
307 /* Print a little endian PowerPC instruction. */
310 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
312 return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
315 /* Print a POWER (RS/6000) instruction. */
318 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
320 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
323 /* Extract the operand value from the PowerPC or POWER instruction. */
326 operand_value_powerpc (const struct powerpc_operand *operand,
327 unsigned long insn, ppc_cpu_t dialect)
331 /* Extract the value from the instruction. */
332 if (operand->extract)
333 value = (*operand->extract) (insn, dialect, &invalid);
336 value = (insn >> operand->shift) & operand->bitm;
337 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
339 /* BITM is always some number of zeros followed by some
340 number of ones, followed by some numer of zeros. */
341 unsigned long top = operand->bitm;
342 /* top & -top gives the rightmost 1 bit, so this
343 fills in any trailing zeros. */
344 top |= (top & -top) - 1;
346 value = (value ^ top) - top;
353 /* Determine whether the optional operand(s) should be printed. */
356 skip_optional_operands (const unsigned char *opindex,
357 unsigned long insn, ppc_cpu_t dialect)
359 const struct powerpc_operand *operand;
361 for (; *opindex != 0; opindex++)
363 operand = &powerpc_operands[*opindex];
364 if ((operand->flags & PPC_OPERAND_NEXT) != 0
365 || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
366 && operand_value_powerpc (operand, insn, dialect) != 0))
373 /* Find a match for INSN in the opcode table, given machine DIALECT.
374 A DIALECT of -1 is special, matching all machine opcode variations. */
376 static const struct powerpc_opcode *
377 lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
379 const struct powerpc_opcode *opcode;
380 const struct powerpc_opcode *opcode_end;
383 /* Get the major opcode of the instruction. */
386 /* Find the first match in the opcode table for this major opcode. */
387 opcode_end = powerpc_opcodes + powerpc_opcd_indices[op + 1];
388 for (opcode = powerpc_opcodes + powerpc_opcd_indices[op];
392 const unsigned char *opindex;
393 const struct powerpc_operand *operand;
396 if ((insn & opcode->mask) != opcode->opcode
397 || (dialect != (ppc_cpu_t) -1
398 && ((opcode->flags & dialect) == 0
399 || (opcode->deprecated & dialect) != 0)))
402 /* Check validity of operands. */
404 for (opindex = opcode->operands; *opindex != 0; opindex++)
406 operand = powerpc_operands + *opindex;
407 if (operand->extract)
408 (*operand->extract) (insn, dialect, &invalid);
419 /* Print a PowerPC or POWER instruction. */
422 print_insn_powerpc (bfd_vma memaddr,
423 struct disassemble_info *info,
430 const struct powerpc_opcode *opcode;
432 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
435 (*info->memory_error_func) (status, memaddr, info);
440 insn = bfd_getb32 (buffer);
442 insn = bfd_getl32 (buffer);
444 opcode = lookup_powerpc (insn, dialect);
445 if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
446 opcode = lookup_powerpc (insn, (ppc_cpu_t) -1);
450 const unsigned char *opindex;
451 const struct powerpc_operand *operand;
456 if (opcode->operands[0] != 0)
457 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
459 (*info->fprintf_func) (info->stream, "%s", opcode->name);
461 /* Now extract and print the operands. */
465 for (opindex = opcode->operands; *opindex != 0; opindex++)
469 operand = powerpc_operands + *opindex;
471 /* Operands that are marked FAKE are simply ignored. We
472 already made sure that the extract function considered
473 the instruction to be valid. */
474 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
477 /* If all of the optional operands have the value zero,
478 then don't print any of them. */
479 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
481 if (skip_optional < 0)
482 skip_optional = skip_optional_operands (opindex, insn,
488 value = operand_value_powerpc (operand, insn, dialect);
492 (*info->fprintf_func) (info->stream, ",");
496 /* Print the operand as directed by the flags. */
497 if ((operand->flags & PPC_OPERAND_GPR) != 0
498 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
499 (*info->fprintf_func) (info->stream, "r%ld", value);
500 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
501 (*info->fprintf_func) (info->stream, "f%ld", value);
502 else if ((operand->flags & PPC_OPERAND_VR) != 0)
503 (*info->fprintf_func) (info->stream, "v%ld", value);
504 else if ((operand->flags & PPC_OPERAND_VSR) != 0)
505 (*info->fprintf_func) (info->stream, "vs%ld", value);
506 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
507 (*info->print_address_func) (memaddr + value, info);
508 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
509 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
510 else if ((operand->flags & PPC_OPERAND_FSL) != 0)
511 (*info->fprintf_func) (info->stream, "fsl%ld", value);
512 else if ((operand->flags & PPC_OPERAND_FCR) != 0)
513 (*info->fprintf_func) (info->stream, "fcr%ld", value);
514 else if ((operand->flags & PPC_OPERAND_UDI) != 0)
515 (*info->fprintf_func) (info->stream, "%ld", value);
516 else if ((operand->flags & PPC_OPERAND_CR) != 0
517 && (dialect & PPC_OPCODE_PPC) != 0)
519 if (operand->bitm == 7)
520 (*info->fprintf_func) (info->stream, "cr%ld", value);
523 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
529 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
531 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
535 (*info->fprintf_func) (info->stream, "%ld", value);
539 (*info->fprintf_func) (info->stream, ")");
543 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
547 (*info->fprintf_func) (info->stream, "(");
552 /* We have found and printed an instruction; return. */
556 /* We could not find a match. */
557 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
563 print_ppc_disassembler_options (FILE *stream)
567 fprintf (stream, _("\n\
568 The following PPC specific disassembler options are supported for use with\n\
571 for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
573 col += fprintf (stream, " %s,", ppc_opts[i].opt);
576 fprintf (stream, "\n");
580 fprintf (stream, " 32, 64\n");