1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of GDB, GAS, and the GNU binutils.
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 2, or (at your option) any later version.
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/ppc.h"
27 /* This file provides several disassembler functions, all of which use
28 the disassembler interface defined in dis-asm.h. Several functions
29 are provided because this file handles disassembly for the PowerPC
30 in both big and little endian mode and also for the POWER (RS/6000)
33 static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
34 int bigendian, int dialect));
36 static int powerpc_dialect PARAMS ((struct disassemble_info *));
38 /* Determine which set of machines to disassemble for. PPC403/601 or
39 BookE. For convenience, also disassemble instructions supported
40 by the AltiVec vector unit. */
44 struct disassemble_info *info;
46 int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
48 if (BFD_DEFAULT_TARGET_SIZE == 64)
49 dialect |= PPC_OPCODE_64;
51 if (info->disassembler_options
52 && (strcmp (info->disassembler_options, "booke") == 0
53 || strcmp (info->disassembler_options, "booke32") == 0
54 || strcmp (info->disassembler_options, "booke64") == 0))
55 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
57 if ((info->mach == bfd_mach_ppc_e500)
58 || (info->disassembler_options
59 && ( strcmp (info->disassembler_options, "e500") == 0
60 || strcmp (info->disassembler_options, "e500x2") == 0)))
62 dialect |= PPC_OPCODE_BOOKE
63 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
64 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
65 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
67 /* efs* and AltiVec conflict. */
68 dialect &= ~PPC_OPCODE_ALTIVEC;
71 if (info->disassembler_options
72 && (strcmp (info->disassembler_options, "efs") == 0))
74 dialect |= PPC_OPCODE_EFS;
75 /* efs* and AltiVec conflict. */
76 dialect &= ~PPC_OPCODE_ALTIVEC;
79 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
82 if (info->disassembler_options
83 && strcmp (info->disassembler_options, "power4") == 0)
84 dialect |= PPC_OPCODE_POWER4;
86 if (info->disassembler_options)
88 if (strstr (info->disassembler_options, "32") != NULL)
89 dialect &= ~PPC_OPCODE_64;
90 else if (strstr (info->disassembler_options, "64") != NULL)
91 dialect |= PPC_OPCODE_64;
97 /* Print a big endian PowerPC instruction. */
100 print_insn_big_powerpc (memaddr, info)
102 struct disassemble_info *info;
104 return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
107 /* Print a little endian PowerPC instruction. */
110 print_insn_little_powerpc (memaddr, info)
112 struct disassemble_info *info;
114 return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
117 /* Print a POWER (RS/6000) instruction. */
120 print_insn_rs6000 (memaddr, info)
122 struct disassemble_info *info;
124 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
127 /* Print a PowerPC or POWER instruction. */
130 print_insn_powerpc (memaddr, info, bigendian, dialect)
132 struct disassemble_info *info;
139 const struct powerpc_opcode *opcode;
140 const struct powerpc_opcode *opcode_end;
143 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
146 (*info->memory_error_func) (status, memaddr, info);
151 insn = bfd_getb32 (buffer);
153 insn = bfd_getl32 (buffer);
155 /* Get the major opcode of the instruction. */
158 /* Find the first match in the opcode table. We could speed this up
159 a bit by doing a binary search on the major opcode. */
160 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
161 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
163 unsigned long table_op;
164 const unsigned char *opindex;
165 const struct powerpc_operand *operand;
170 table_op = PPC_OP (opcode->opcode);
176 if ((insn & opcode->mask) != opcode->opcode
177 || (opcode->flags & dialect) == 0)
180 if ((dialect & PPC_OPCODE_EFS) && (opcode->flags & PPC_OPCODE_ALTIVEC))
183 /* Make two passes over the operands. First see if any of them
184 have extraction functions, and, if they do, make sure the
185 instruction is valid. */
187 for (opindex = opcode->operands; *opindex != 0; opindex++)
189 operand = powerpc_operands + *opindex;
190 if (operand->extract)
191 (*operand->extract) (insn, dialect, &invalid);
196 /* The instruction is valid. */
197 (*info->fprintf_func) (info->stream, "%s", opcode->name);
198 if (opcode->operands[0] != 0)
199 (*info->fprintf_func) (info->stream, "\t");
201 /* Now extract and print the operands. */
204 for (opindex = opcode->operands; *opindex != 0; opindex++)
208 operand = powerpc_operands + *opindex;
210 /* Operands that are marked FAKE are simply ignored. We
211 already made sure that the extract function considered
212 the instruction to be valid. */
213 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
216 /* Extract the value from the instruction. */
217 if (operand->extract)
218 value = (*operand->extract) (insn, dialect, &invalid);
221 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
222 if ((operand->flags & PPC_OPERAND_SIGNED) != 0
223 && (value & (1 << (operand->bits - 1))) != 0)
224 value -= 1 << operand->bits;
227 /* If the operand is optional, and the value is zero, don't
229 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
230 && (operand->flags & PPC_OPERAND_NEXT) == 0
236 (*info->fprintf_func) (info->stream, ",");
240 /* Print the operand as directed by the flags. */
241 if ((operand->flags & PPC_OPERAND_GPR) != 0)
242 (*info->fprintf_func) (info->stream, "r%ld", value);
243 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
244 (*info->fprintf_func) (info->stream, "f%ld", value);
245 else if ((operand->flags & PPC_OPERAND_VR) != 0)
246 (*info->fprintf_func) (info->stream, "v%ld", value);
247 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
248 (*info->print_address_func) (memaddr + value, info);
249 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
250 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
251 else if ((operand->flags & PPC_OPERAND_CR) == 0
252 || (dialect & PPC_OPCODE_PPC) == 0)
253 (*info->fprintf_func) (info->stream, "%ld", value);
256 if (operand->bits == 3)
257 (*info->fprintf_func) (info->stream, "cr%d", value);
260 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
266 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
268 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
274 (*info->fprintf_func) (info->stream, ")");
278 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
282 (*info->fprintf_func) (info->stream, "(");
287 /* We have found and printed an instruction; return. */
291 /* We could not find a match. */
292 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
298 print_ppc_disassembler_options (FILE * stream)
300 fprintf (stream, "\n\
301 The following PPC specific disassembler options are supported for use with\n\
304 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
305 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
306 fprintf (stream, " efs Disassemble the EFS instructions\n");
307 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
308 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
309 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");