1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for or1k. -*- C -*-
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
7 Copyright (C) 1996-2018 Free Software Foundation, Inc.
9 This file is part of libopcodes.
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "or1k-desc.h"
36 #include "cgen/basic-modes.h"
38 #include "safe-ctype.h"
41 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #define max(a,b) ((a) > (b) ? (a) : (b))
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
74 /* Operand insertion. */
78 /* Subroutine of insert_normal. */
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
91 x = cgen_get_insn_value (cd, bufp, word_length);
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
96 shift = (start + 1) - length;
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
104 #endif /* ! CGEN_INT_INSN_P */
106 /* Default insertion routine.
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
115 The result is an error message or NULL if success. */
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
123 insert_normal (CGEN_CPU_DESC cd,
126 unsigned int word_offset,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
149 && word_length > total_length)
150 word_length = total_length;
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
159 if ((value > 0 && (unsigned long) value > maxval)
162 /* xgettext:c-format */
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
183 /* xgettext:c-format */
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
192 if (! cgen_signed_overflow_ok_p (cd))
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
197 if (value < minval || value > maxval)
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
211 int shift_within_word, shift_to_word, shift;
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
220 shift_within_word = word_length - start - length;
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
227 #else /* ! CGEN_INT_INSN_P */
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
232 insert_1 (cd, value, start, length, word_length, bufp);
235 #endif /* ! CGEN_INT_INSN_P */
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
275 #endif /* ! CGEN_INT_INSN_P */
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
286 if (CGEN_SYNTAX_CHAR_P (* syn))
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
324 /* Operand extraction. */
326 #if ! CGEN_INT_INSN_P
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
366 (*info->memory_error_func) (status, pc, info);
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
376 /* Subroutine of extract_normal. */
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
385 bfd_vma pc ATTRIBUTE_UNUSED)
390 x = cgen_get_insn_value (cd, bufp, word_length);
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
395 shift = (word_length - (start + length));
399 #endif /* ! CGEN_INT_INSN_P */
401 /* Default extraction routine.
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
414 Returns 1 for success, 0 for failure. */
416 /* ??? The return code isn't properly used. wip. */
418 /* ??? This doesn't handle bfd_vma's. Create another function when
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
428 CGEN_INSN_INT insn_value,
430 unsigned int word_offset,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
438 bfd_vma pc ATTRIBUTE_UNUSED,
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
470 value = insn_value >> (total_length - ( word_offset + start + length));
473 #if ! CGEN_INT_INSN_P
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
488 #endif /* ! CGEN_INT_INSN_P */
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
504 /* Default insn extractor.
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
514 extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
526 CGEN_INIT_EXTRACT (cd);
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
532 if (CGEN_SYNTAX_CHAR_P (*syn))
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
545 /* Machine generated code added here. */
547 const char * or1k_cgen_insert_operand
548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
550 /* Main entry point for operand insertion.
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
565 or1k_cgen_insert_operand (CGEN_CPU_DESC cd,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
576 case OR1K_OPERAND_DISP26 :
578 long value = fields->f_disp26;
579 value = ((SI) (((value) - (pc))) >> (2));
580 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
583 case OR1K_OPERAND_RA :
584 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
586 case OR1K_OPERAND_RADF :
587 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
589 case OR1K_OPERAND_RASF :
590 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
592 case OR1K_OPERAND_RB :
593 errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
595 case OR1K_OPERAND_RBDF :
596 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
598 case OR1K_OPERAND_RBSF :
599 errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
601 case OR1K_OPERAND_RD :
602 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
604 case OR1K_OPERAND_RDDF :
605 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
607 case OR1K_OPERAND_RDSF :
608 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
610 case OR1K_OPERAND_SIMM16 :
611 errmsg = insert_normal (cd, fields->f_simm16, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, buffer);
613 case OR1K_OPERAND_SIMM16_SPLIT :
616 FLD (f_imm16_25_5) = ((((INT) (FLD (f_simm16_split)) >> (11))) & (31));
617 FLD (f_imm16_10_11) = ((FLD (f_simm16_split)) & (2047));
619 errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer);
622 errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer);
627 case OR1K_OPERAND_UIMM16 :
628 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 15, 16, 32, total_length, buffer);
630 case OR1K_OPERAND_UIMM16_SPLIT :
633 FLD (f_imm16_25_5) = ((((UINT) (FLD (f_uimm16_split)) >> (11))) & (31));
634 FLD (f_imm16_10_11) = ((FLD (f_uimm16_split)) & (2047));
636 errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer);
639 errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer);
644 case OR1K_OPERAND_UIMM6 :
645 errmsg = insert_normal (cd, fields->f_uimm6, 0, 0, 5, 6, 32, total_length, buffer);
649 /* xgettext:c-format */
650 opcodes_error_handler
651 (_("internal error: unrecognized field %d while building insn"),
659 int or1k_cgen_extract_operand
660 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
662 /* Main entry point for operand extraction.
663 The result is <= 0 for error, >0 for success.
664 ??? Actual values aren't well defined right now.
666 This function is basically just a big switch statement. Earlier versions
667 used tables to look up the function to use, but
668 - if the table contains both assembler and disassembler functions then
669 the disassembler contains much of the assembler and vice-versa,
670 - there's a lot of inlining possibilities as things grow,
671 - using a switch statement avoids the function call overhead.
673 This function could be moved into `print_insn_normal', but keeping it
674 separate makes clear the interface between `print_insn_normal' and each of
678 or1k_cgen_extract_operand (CGEN_CPU_DESC cd,
680 CGEN_EXTRACT_INFO *ex_info,
681 CGEN_INSN_INT insn_value,
682 CGEN_FIELDS * fields,
685 /* Assume success (for those operands that are nops). */
687 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
691 case OR1K_OPERAND_DISP26 :
694 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value);
695 value = ((((value) << (2))) + (pc));
696 fields->f_disp26 = value;
699 case OR1K_OPERAND_RA :
700 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
702 case OR1K_OPERAND_RADF :
703 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
705 case OR1K_OPERAND_RASF :
706 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
708 case OR1K_OPERAND_RB :
709 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
711 case OR1K_OPERAND_RBDF :
712 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
714 case OR1K_OPERAND_RBSF :
715 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
717 case OR1K_OPERAND_RD :
718 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
720 case OR1K_OPERAND_RDDF :
721 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
723 case OR1K_OPERAND_RDSF :
724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
726 case OR1K_OPERAND_SIMM16 :
727 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, pc, & fields->f_simm16);
729 case OR1K_OPERAND_SIMM16_SPLIT :
731 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5);
732 if (length <= 0) break;
733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11);
734 if (length <= 0) break;
735 FLD (f_simm16_split) = ((HI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))));
738 case OR1K_OPERAND_UIMM16 :
739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm16);
741 case OR1K_OPERAND_UIMM16_SPLIT :
743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5);
744 if (length <= 0) break;
745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11);
746 if (length <= 0) break;
747 FLD (f_uimm16_split) = ((UHI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))));
750 case OR1K_OPERAND_UIMM6 :
751 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_uimm6);
755 /* xgettext:c-format */
756 opcodes_error_handler
757 (_("internal error: unrecognized field %d while decoding insn"),
765 cgen_insert_fn * const or1k_cgen_insert_handlers[] =
770 cgen_extract_fn * const or1k_cgen_extract_handlers[] =
775 int or1k_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
776 bfd_vma or1k_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
778 /* Getting values from cgen_fields is handled by a collection of functions.
779 They are distinguished by the type of the VALUE argument they return.
780 TODO: floating point, inlining support, remove cases where result type
784 or1k_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
786 const CGEN_FIELDS * fields)
792 case OR1K_OPERAND_DISP26 :
793 value = fields->f_disp26;
795 case OR1K_OPERAND_RA :
796 value = fields->f_r2;
798 case OR1K_OPERAND_RADF :
799 value = fields->f_r1;
801 case OR1K_OPERAND_RASF :
802 value = fields->f_r2;
804 case OR1K_OPERAND_RB :
805 value = fields->f_r3;
807 case OR1K_OPERAND_RBDF :
808 value = fields->f_r1;
810 case OR1K_OPERAND_RBSF :
811 value = fields->f_r3;
813 case OR1K_OPERAND_RD :
814 value = fields->f_r1;
816 case OR1K_OPERAND_RDDF :
817 value = fields->f_r1;
819 case OR1K_OPERAND_RDSF :
820 value = fields->f_r1;
822 case OR1K_OPERAND_SIMM16 :
823 value = fields->f_simm16;
825 case OR1K_OPERAND_SIMM16_SPLIT :
826 value = fields->f_simm16_split;
828 case OR1K_OPERAND_UIMM16 :
829 value = fields->f_uimm16;
831 case OR1K_OPERAND_UIMM16_SPLIT :
832 value = fields->f_uimm16_split;
834 case OR1K_OPERAND_UIMM6 :
835 value = fields->f_uimm6;
839 /* xgettext:c-format */
840 opcodes_error_handler
841 (_("internal error: unrecognized field %d while getting int operand"),
850 or1k_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
852 const CGEN_FIELDS * fields)
858 case OR1K_OPERAND_DISP26 :
859 value = fields->f_disp26;
861 case OR1K_OPERAND_RA :
862 value = fields->f_r2;
864 case OR1K_OPERAND_RADF :
865 value = fields->f_r1;
867 case OR1K_OPERAND_RASF :
868 value = fields->f_r2;
870 case OR1K_OPERAND_RB :
871 value = fields->f_r3;
873 case OR1K_OPERAND_RBDF :
874 value = fields->f_r1;
876 case OR1K_OPERAND_RBSF :
877 value = fields->f_r3;
879 case OR1K_OPERAND_RD :
880 value = fields->f_r1;
882 case OR1K_OPERAND_RDDF :
883 value = fields->f_r1;
885 case OR1K_OPERAND_RDSF :
886 value = fields->f_r1;
888 case OR1K_OPERAND_SIMM16 :
889 value = fields->f_simm16;
891 case OR1K_OPERAND_SIMM16_SPLIT :
892 value = fields->f_simm16_split;
894 case OR1K_OPERAND_UIMM16 :
895 value = fields->f_uimm16;
897 case OR1K_OPERAND_UIMM16_SPLIT :
898 value = fields->f_uimm16_split;
900 case OR1K_OPERAND_UIMM6 :
901 value = fields->f_uimm6;
905 /* xgettext:c-format */
906 opcodes_error_handler
907 (_("internal error: unrecognized field %d while getting vma operand"),
915 void or1k_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
916 void or1k_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
918 /* Stuffing values in cgen_fields is handled by a collection of functions.
919 They are distinguished by the type of the VALUE argument they accept.
920 TODO: floating point, inlining support, remove cases where argument type
924 or1k_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
926 CGEN_FIELDS * fields,
931 case OR1K_OPERAND_DISP26 :
932 fields->f_disp26 = value;
934 case OR1K_OPERAND_RA :
935 fields->f_r2 = value;
937 case OR1K_OPERAND_RADF :
938 fields->f_r1 = value;
940 case OR1K_OPERAND_RASF :
941 fields->f_r2 = value;
943 case OR1K_OPERAND_RB :
944 fields->f_r3 = value;
946 case OR1K_OPERAND_RBDF :
947 fields->f_r1 = value;
949 case OR1K_OPERAND_RBSF :
950 fields->f_r3 = value;
952 case OR1K_OPERAND_RD :
953 fields->f_r1 = value;
955 case OR1K_OPERAND_RDDF :
956 fields->f_r1 = value;
958 case OR1K_OPERAND_RDSF :
959 fields->f_r1 = value;
961 case OR1K_OPERAND_SIMM16 :
962 fields->f_simm16 = value;
964 case OR1K_OPERAND_SIMM16_SPLIT :
965 fields->f_simm16_split = value;
967 case OR1K_OPERAND_UIMM16 :
968 fields->f_uimm16 = value;
970 case OR1K_OPERAND_UIMM16_SPLIT :
971 fields->f_uimm16_split = value;
973 case OR1K_OPERAND_UIMM6 :
974 fields->f_uimm6 = value;
978 /* xgettext:c-format */
979 opcodes_error_handler
980 (_("internal error: unrecognized field %d while setting int operand"),
987 or1k_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
989 CGEN_FIELDS * fields,
994 case OR1K_OPERAND_DISP26 :
995 fields->f_disp26 = value;
997 case OR1K_OPERAND_RA :
998 fields->f_r2 = value;
1000 case OR1K_OPERAND_RADF :
1001 fields->f_r1 = value;
1003 case OR1K_OPERAND_RASF :
1004 fields->f_r2 = value;
1006 case OR1K_OPERAND_RB :
1007 fields->f_r3 = value;
1009 case OR1K_OPERAND_RBDF :
1010 fields->f_r1 = value;
1012 case OR1K_OPERAND_RBSF :
1013 fields->f_r3 = value;
1015 case OR1K_OPERAND_RD :
1016 fields->f_r1 = value;
1018 case OR1K_OPERAND_RDDF :
1019 fields->f_r1 = value;
1021 case OR1K_OPERAND_RDSF :
1022 fields->f_r1 = value;
1024 case OR1K_OPERAND_SIMM16 :
1025 fields->f_simm16 = value;
1027 case OR1K_OPERAND_SIMM16_SPLIT :
1028 fields->f_simm16_split = value;
1030 case OR1K_OPERAND_UIMM16 :
1031 fields->f_uimm16 = value;
1033 case OR1K_OPERAND_UIMM16_SPLIT :
1034 fields->f_uimm16_split = value;
1036 case OR1K_OPERAND_UIMM6 :
1037 fields->f_uimm6 = value;
1041 /* xgettext:c-format */
1042 opcodes_error_handler
1043 (_("internal error: unrecognized field %d while setting vma operand"),
1049 /* Function to call before using the instruction builder tables. */
1052 or1k_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1054 cd->insert_handlers = & or1k_cgen_insert_handlers[0];
1055 cd->extract_handlers = & or1k_cgen_extract_handlers[0];
1057 cd->insert_operand = or1k_cgen_insert_operand;
1058 cd->extract_operand = or1k_cgen_extract_operand;
1060 cd->get_int_operand = or1k_cgen_get_int_operand;
1061 cd->set_int_operand = or1k_cgen_set_int_operand;
1062 cd->get_vma_operand = or1k_cgen_get_vma_operand;
1063 cd->set_vma_operand = or1k_cgen_set_vma_operand;