1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
7 Copyright (C) 1996-2015 Free Software Foundation, Inc.
9 This file is part of libopcodes.
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "libiberty.h"
35 #include "or1k-desc.h"
39 /* Default text to print if an instruction isn't recognized. */
40 #define UNKNOWN_INSN_MSG _("*unknown*")
42 static void print_normal
43 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
44 static void print_address
45 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
46 static void print_keyword
47 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
48 static void print_insn_normal
49 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
52 static int default_print_insn
53 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
58 /* -- disassembler routines inserted here. */
61 void or1k_cgen_print_operand
62 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
64 /* Main entry point for printing operands.
65 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
66 of dis-asm.h on cgen.h.
68 This function is basically just a big switch statement. Earlier versions
69 used tables to look up the function to use, but
70 - if the table contains both assembler and disassembler functions then
71 the disassembler contains much of the assembler and vice-versa,
72 - there's a lot of inlining possibilities as things grow,
73 - using a switch statement avoids the function call overhead.
75 This function could be moved into `print_insn_normal', but keeping it
76 separate makes clear the interface between `print_insn_normal' and each of
80 or1k_cgen_print_operand (CGEN_CPU_DESC cd,
84 void const *attrs ATTRIBUTE_UNUSED,
88 disassemble_info *info = (disassemble_info *) xinfo;
92 case OR1K_OPERAND_DISP26 :
93 print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
95 case OR1K_OPERAND_RA :
96 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r2, 0);
98 case OR1K_OPERAND_RADF :
99 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
101 case OR1K_OPERAND_RASF :
102 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r2, 0);
104 case OR1K_OPERAND_RB :
105 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r3, 0);
107 case OR1K_OPERAND_RBDF :
108 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
110 case OR1K_OPERAND_RBSF :
111 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r3, 0);
113 case OR1K_OPERAND_RD :
114 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r1, 0);
116 case OR1K_OPERAND_RDDF :
117 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
119 case OR1K_OPERAND_RDSF :
120 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r1, 0);
122 case OR1K_OPERAND_SIMM16 :
123 print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
125 case OR1K_OPERAND_SIMM16_SPLIT :
126 print_normal (cd, info, fields->f_simm16_split, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
128 case OR1K_OPERAND_UIMM16 :
129 print_normal (cd, info, fields->f_uimm16, 0, pc, length);
131 case OR1K_OPERAND_UIMM16_SPLIT :
132 print_normal (cd, info, fields->f_uimm16_split, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
134 case OR1K_OPERAND_UIMM6 :
135 print_normal (cd, info, fields->f_uimm6, 0, pc, length);
139 /* xgettext:c-format */
140 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
146 cgen_print_fn * const or1k_cgen_print_handlers[] =
153 or1k_cgen_init_dis (CGEN_CPU_DESC cd)
155 or1k_cgen_init_opcode_table (cd);
156 or1k_cgen_init_ibld_table (cd);
157 cd->print_handlers = & or1k_cgen_print_handlers[0];
158 cd->print_operand = or1k_cgen_print_operand;
162 /* Default print handler. */
165 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
169 bfd_vma pc ATTRIBUTE_UNUSED,
170 int length ATTRIBUTE_UNUSED)
172 disassemble_info *info = (disassemble_info *) dis_info;
174 /* Print the operand as directed by the attributes. */
175 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
176 ; /* nothing to do */
177 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
178 (*info->fprintf_func) (info->stream, "%ld", value);
180 (*info->fprintf_func) (info->stream, "0x%lx", value);
183 /* Default address handler. */
186 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
190 bfd_vma pc ATTRIBUTE_UNUSED,
191 int length ATTRIBUTE_UNUSED)
193 disassemble_info *info = (disassemble_info *) dis_info;
195 /* Print the operand as directed by the attributes. */
196 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
197 ; /* Nothing to do. */
198 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
199 (*info->print_address_func) (value, info);
200 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
201 (*info->print_address_func) (value, info);
202 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
203 (*info->fprintf_func) (info->stream, "%ld", (long) value);
205 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
208 /* Keyword print handler. */
211 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
213 CGEN_KEYWORD *keyword_table,
215 unsigned int attrs ATTRIBUTE_UNUSED)
217 disassemble_info *info = (disassemble_info *) dis_info;
218 const CGEN_KEYWORD_ENTRY *ke;
220 ke = cgen_keyword_lookup_value (keyword_table, value);
222 (*info->fprintf_func) (info->stream, "%s", ke->name);
224 (*info->fprintf_func) (info->stream, "???");
227 /* Default insn printer.
229 DIS_INFO is defined as `void *' so the disassembler needn't know anything
230 about disassemble_info. */
233 print_insn_normal (CGEN_CPU_DESC cd,
235 const CGEN_INSN *insn,
240 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
241 disassemble_info *info = (disassemble_info *) dis_info;
242 const CGEN_SYNTAX_CHAR_TYPE *syn;
244 CGEN_INIT_PRINT (cd);
246 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
248 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
250 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
253 if (CGEN_SYNTAX_CHAR_P (*syn))
255 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
259 /* We have an operand. */
260 or1k_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
261 fields, CGEN_INSN_ATTRS (insn), pc, length);
265 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
267 Returns 0 if all is well, non-zero otherwise. */
270 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
272 disassemble_info *info,
275 CGEN_EXTRACT_INFO *ex_info,
276 unsigned long *insn_value)
278 int status = (*info->read_memory_func) (pc, buf, buflen, info);
282 (*info->memory_error_func) (status, pc, info);
286 ex_info->dis_info = info;
287 ex_info->valid = (1 << buflen) - 1;
288 ex_info->insn_bytes = buf;
290 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
294 /* Utility to print an insn.
295 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
296 The result is the size of the insn in bytes or zero for an unknown insn
297 or -1 if an error occurs fetching data (memory_error_func will have
301 print_insn (CGEN_CPU_DESC cd,
303 disassemble_info *info,
307 CGEN_INSN_INT insn_value;
308 const CGEN_INSN_LIST *insn_list;
309 CGEN_EXTRACT_INFO ex_info;
312 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
313 basesize = cd->base_insn_bitsize < buflen * 8 ?
314 cd->base_insn_bitsize : buflen * 8;
315 insn_value = cgen_get_insn_value (cd, buf, basesize);
318 /* Fill in ex_info fields like read_insn would. Don't actually call
319 read_insn, since the incoming buffer is already read (and possibly
320 modified a la m32r). */
321 ex_info.valid = (1 << buflen) - 1;
322 ex_info.dis_info = info;
323 ex_info.insn_bytes = buf;
325 /* The instructions are stored in hash lists.
326 Pick the first one and keep trying until we find the right one. */
328 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
329 while (insn_list != NULL)
331 const CGEN_INSN *insn = insn_list->insn;
334 unsigned long insn_value_cropped;
336 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
337 /* Not needed as insn shouldn't be in hash lists if not supported. */
338 /* Supported by this cpu? */
339 if (! or1k_cgen_insn_supported (cd, insn))
341 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
346 /* Basic bit mask must be correct. */
347 /* ??? May wish to allow target to defer this check until the extract
350 /* Base size may exceed this instruction's size. Extract the
351 relevant part from the buffer. */
352 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
353 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
354 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
355 info->endian == BFD_ENDIAN_BIG);
357 insn_value_cropped = insn_value;
359 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
360 == CGEN_INSN_BASE_VALUE (insn))
362 /* Printing is handled in two passes. The first pass parses the
363 machine insn and extracts the fields. The second pass prints
366 /* Make sure the entire insn is loaded into insn_value, if it
368 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
369 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
371 unsigned long full_insn_value;
372 int rc = read_insn (cd, pc, info, buf,
373 CGEN_INSN_BITSIZE (insn) / 8,
374 & ex_info, & full_insn_value);
377 length = CGEN_EXTRACT_FN (cd, insn)
378 (cd, insn, &ex_info, full_insn_value, &fields, pc);
381 length = CGEN_EXTRACT_FN (cd, insn)
382 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
384 /* Length < 0 -> error. */
389 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
390 /* Length is in bits, result is in bytes. */
395 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
401 /* Default value for CGEN_PRINT_INSN.
402 The result is the size of the insn in bytes or zero for an unknown insn
403 or -1 if an error occured fetching bytes. */
405 #ifndef CGEN_PRINT_INSN
406 #define CGEN_PRINT_INSN default_print_insn
410 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
412 bfd_byte buf[CGEN_MAX_INSN_SIZE];
416 /* Attempt to read the base part of the insn. */
417 buflen = cd->base_insn_bitsize / 8;
418 status = (*info->read_memory_func) (pc, buf, buflen, info);
420 /* Try again with the minimum part, if min < base. */
421 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
423 buflen = cd->min_insn_bitsize / 8;
424 status = (*info->read_memory_func) (pc, buf, buflen, info);
429 (*info->memory_error_func) (status, pc, info);
433 return print_insn (cd, pc, info, buf, buflen);
437 Print one instruction from PC on INFO->STREAM.
438 Return the size of the instruction (in bytes). */
440 typedef struct cpu_desc_list
442 struct cpu_desc_list *next;
450 print_insn_or1k (bfd_vma pc, disassemble_info *info)
452 static cpu_desc_list *cd_list = 0;
453 cpu_desc_list *cl = 0;
454 static CGEN_CPU_DESC cd = 0;
455 static CGEN_BITSET *prev_isa;
456 static int prev_mach;
457 static int prev_endian;
461 int endian = (info->endian == BFD_ENDIAN_BIG
463 : CGEN_ENDIAN_LITTLE);
464 enum bfd_architecture arch;
466 /* ??? gdb will set mach but leave the architecture as "unknown" */
467 #ifndef CGEN_BFD_ARCH
468 #define CGEN_BFD_ARCH bfd_arch_or1k
471 if (arch == bfd_arch_unknown)
472 arch = CGEN_BFD_ARCH;
474 /* There's no standard way to compute the machine or isa number
475 so we leave it to the target. */
476 #ifdef CGEN_COMPUTE_MACH
477 mach = CGEN_COMPUTE_MACH (info);
482 #ifdef CGEN_COMPUTE_ISA
484 static CGEN_BITSET *permanent_isa;
487 permanent_isa = cgen_bitset_create (MAX_ISAS);
489 cgen_bitset_clear (isa);
490 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
493 isa = info->insn_sets;
496 /* If we've switched cpu's, try to find a handle we've used before */
498 && (cgen_bitset_compare (isa, prev_isa) != 0
500 || endian != prev_endian))
503 for (cl = cd_list; cl; cl = cl->next)
505 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
507 cl->endian == endian)
516 /* If we haven't initialized yet, initialize the opcode table. */
519 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
520 const char *mach_name;
524 mach_name = arch_type->printable_name;
526 prev_isa = cgen_bitset_copy (isa);
528 prev_endian = endian;
529 cd = or1k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
530 CGEN_CPU_OPEN_BFDMACH, mach_name,
531 CGEN_CPU_OPEN_ENDIAN, prev_endian,
536 /* Save this away for future reference. */
537 cl = xmalloc (sizeof (struct cpu_desc_list));
545 or1k_cgen_init_dis (cd);
548 /* We try to have as much common code as possible.
549 But at this point some targets need to take over. */
550 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
551 but if not possible try to move this hook elsewhere rather than
553 length = CGEN_PRINT_INSN (cd, pc, info);
559 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
560 return cd->default_insn_bitsize / 8;