1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
8 2008, 2010 Free Software Foundation, Inc.
10 This file is part of libopcodes.
12 This library is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 3, or (at your option)
17 It is distributed in the hope that it will be useful, but WITHOUT
18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
35 #include "libiberty.h"
36 #include "or1k-desc.h"
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
43 static void print_normal
44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45 static void print_address
46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47 static void print_keyword
48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49 static void print_insn_normal
50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
53 static int default_print_insn
54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
59 /* -- disassembler routines inserted here. */
62 void or1k_cgen_print_operand
63 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
65 /* Main entry point for printing operands.
66 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
67 of dis-asm.h on cgen.h.
69 This function is basically just a big switch statement. Earlier versions
70 used tables to look up the function to use, but
71 - if the table contains both assembler and disassembler functions then
72 the disassembler contains much of the assembler and vice-versa,
73 - there's a lot of inlining possibilities as things grow,
74 - using a switch statement avoids the function call overhead.
76 This function could be moved into `print_insn_normal', but keeping it
77 separate makes clear the interface between `print_insn_normal' and each of
81 or1k_cgen_print_operand (CGEN_CPU_DESC cd,
85 void const *attrs ATTRIBUTE_UNUSED,
89 disassemble_info *info = (disassemble_info *) xinfo;
93 case OR1K_OPERAND_DISP26 :
94 print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
96 case OR1K_OPERAND_RA :
97 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r2, 0);
99 case OR1K_OPERAND_RADF :
100 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
102 case OR1K_OPERAND_RASF :
103 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r2, 0);
105 case OR1K_OPERAND_RB :
106 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r3, 0);
108 case OR1K_OPERAND_RBDF :
109 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
111 case OR1K_OPERAND_RBSF :
112 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r3, 0);
114 case OR1K_OPERAND_RD :
115 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r1, 0);
117 case OR1K_OPERAND_RDDF :
118 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
120 case OR1K_OPERAND_RDSF :
121 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r1, 0);
123 case OR1K_OPERAND_SIMM16 :
124 print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
126 case OR1K_OPERAND_SIMM16_SPLIT :
127 print_normal (cd, info, fields->f_simm16_split, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
129 case OR1K_OPERAND_UIMM16 :
130 print_normal (cd, info, fields->f_uimm16, 0, pc, length);
132 case OR1K_OPERAND_UIMM16_SPLIT :
133 print_normal (cd, info, fields->f_uimm16_split, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
135 case OR1K_OPERAND_UIMM6 :
136 print_normal (cd, info, fields->f_uimm6, 0, pc, length);
140 /* xgettext:c-format */
141 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
147 cgen_print_fn * const or1k_cgen_print_handlers[] =
154 or1k_cgen_init_dis (CGEN_CPU_DESC cd)
156 or1k_cgen_init_opcode_table (cd);
157 or1k_cgen_init_ibld_table (cd);
158 cd->print_handlers = & or1k_cgen_print_handlers[0];
159 cd->print_operand = or1k_cgen_print_operand;
163 /* Default print handler. */
166 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
170 bfd_vma pc ATTRIBUTE_UNUSED,
171 int length ATTRIBUTE_UNUSED)
173 disassemble_info *info = (disassemble_info *) dis_info;
175 /* Print the operand as directed by the attributes. */
176 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
177 ; /* nothing to do */
178 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
179 (*info->fprintf_func) (info->stream, "%ld", value);
181 (*info->fprintf_func) (info->stream, "0x%lx", value);
184 /* Default address handler. */
187 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
191 bfd_vma pc ATTRIBUTE_UNUSED,
192 int length ATTRIBUTE_UNUSED)
194 disassemble_info *info = (disassemble_info *) dis_info;
196 /* Print the operand as directed by the attributes. */
197 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
198 ; /* Nothing to do. */
199 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
200 (*info->print_address_func) (value, info);
201 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
202 (*info->print_address_func) (value, info);
203 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
204 (*info->fprintf_func) (info->stream, "%ld", (long) value);
206 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
209 /* Keyword print handler. */
212 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
214 CGEN_KEYWORD *keyword_table,
216 unsigned int attrs ATTRIBUTE_UNUSED)
218 disassemble_info *info = (disassemble_info *) dis_info;
219 const CGEN_KEYWORD_ENTRY *ke;
221 ke = cgen_keyword_lookup_value (keyword_table, value);
223 (*info->fprintf_func) (info->stream, "%s", ke->name);
225 (*info->fprintf_func) (info->stream, "???");
228 /* Default insn printer.
230 DIS_INFO is defined as `void *' so the disassembler needn't know anything
231 about disassemble_info. */
234 print_insn_normal (CGEN_CPU_DESC cd,
236 const CGEN_INSN *insn,
241 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
242 disassemble_info *info = (disassemble_info *) dis_info;
243 const CGEN_SYNTAX_CHAR_TYPE *syn;
245 CGEN_INIT_PRINT (cd);
247 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
249 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
251 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
254 if (CGEN_SYNTAX_CHAR_P (*syn))
256 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
260 /* We have an operand. */
261 or1k_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
262 fields, CGEN_INSN_ATTRS (insn), pc, length);
266 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
268 Returns 0 if all is well, non-zero otherwise. */
271 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
273 disassemble_info *info,
276 CGEN_EXTRACT_INFO *ex_info,
277 unsigned long *insn_value)
279 int status = (*info->read_memory_func) (pc, buf, buflen, info);
283 (*info->memory_error_func) (status, pc, info);
287 ex_info->dis_info = info;
288 ex_info->valid = (1 << buflen) - 1;
289 ex_info->insn_bytes = buf;
291 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
295 /* Utility to print an insn.
296 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
297 The result is the size of the insn in bytes or zero for an unknown insn
298 or -1 if an error occurs fetching data (memory_error_func will have
302 print_insn (CGEN_CPU_DESC cd,
304 disassemble_info *info,
308 CGEN_INSN_INT insn_value;
309 const CGEN_INSN_LIST *insn_list;
310 CGEN_EXTRACT_INFO ex_info;
313 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
314 basesize = cd->base_insn_bitsize < buflen * 8 ?
315 cd->base_insn_bitsize : buflen * 8;
316 insn_value = cgen_get_insn_value (cd, buf, basesize);
319 /* Fill in ex_info fields like read_insn would. Don't actually call
320 read_insn, since the incoming buffer is already read (and possibly
321 modified a la m32r). */
322 ex_info.valid = (1 << buflen) - 1;
323 ex_info.dis_info = info;
324 ex_info.insn_bytes = buf;
326 /* The instructions are stored in hash lists.
327 Pick the first one and keep trying until we find the right one. */
329 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
330 while (insn_list != NULL)
332 const CGEN_INSN *insn = insn_list->insn;
335 unsigned long insn_value_cropped;
337 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
338 /* Not needed as insn shouldn't be in hash lists if not supported. */
339 /* Supported by this cpu? */
340 if (! or1k_cgen_insn_supported (cd, insn))
342 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
347 /* Basic bit mask must be correct. */
348 /* ??? May wish to allow target to defer this check until the extract
351 /* Base size may exceed this instruction's size. Extract the
352 relevant part from the buffer. */
353 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
354 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
355 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
356 info->endian == BFD_ENDIAN_BIG);
358 insn_value_cropped = insn_value;
360 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
361 == CGEN_INSN_BASE_VALUE (insn))
363 /* Printing is handled in two passes. The first pass parses the
364 machine insn and extracts the fields. The second pass prints
367 /* Make sure the entire insn is loaded into insn_value, if it
369 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
370 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
372 unsigned long full_insn_value;
373 int rc = read_insn (cd, pc, info, buf,
374 CGEN_INSN_BITSIZE (insn) / 8,
375 & ex_info, & full_insn_value);
378 length = CGEN_EXTRACT_FN (cd, insn)
379 (cd, insn, &ex_info, full_insn_value, &fields, pc);
382 length = CGEN_EXTRACT_FN (cd, insn)
383 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
385 /* Length < 0 -> error. */
390 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
391 /* Length is in bits, result is in bytes. */
396 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
402 /* Default value for CGEN_PRINT_INSN.
403 The result is the size of the insn in bytes or zero for an unknown insn
404 or -1 if an error occured fetching bytes. */
406 #ifndef CGEN_PRINT_INSN
407 #define CGEN_PRINT_INSN default_print_insn
411 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
413 bfd_byte buf[CGEN_MAX_INSN_SIZE];
417 /* Attempt to read the base part of the insn. */
418 buflen = cd->base_insn_bitsize / 8;
419 status = (*info->read_memory_func) (pc, buf, buflen, info);
421 /* Try again with the minimum part, if min < base. */
422 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
424 buflen = cd->min_insn_bitsize / 8;
425 status = (*info->read_memory_func) (pc, buf, buflen, info);
430 (*info->memory_error_func) (status, pc, info);
434 return print_insn (cd, pc, info, buf, buflen);
438 Print one instruction from PC on INFO->STREAM.
439 Return the size of the instruction (in bytes). */
441 typedef struct cpu_desc_list
443 struct cpu_desc_list *next;
451 print_insn_or1k (bfd_vma pc, disassemble_info *info)
453 static cpu_desc_list *cd_list = 0;
454 cpu_desc_list *cl = 0;
455 static CGEN_CPU_DESC cd = 0;
456 static CGEN_BITSET *prev_isa;
457 static int prev_mach;
458 static int prev_endian;
462 int endian = (info->endian == BFD_ENDIAN_BIG
464 : CGEN_ENDIAN_LITTLE);
465 enum bfd_architecture arch;
467 /* ??? gdb will set mach but leave the architecture as "unknown" */
468 #ifndef CGEN_BFD_ARCH
469 #define CGEN_BFD_ARCH bfd_arch_or1k
472 if (arch == bfd_arch_unknown)
473 arch = CGEN_BFD_ARCH;
475 /* There's no standard way to compute the machine or isa number
476 so we leave it to the target. */
477 #ifdef CGEN_COMPUTE_MACH
478 mach = CGEN_COMPUTE_MACH (info);
483 #ifdef CGEN_COMPUTE_ISA
485 static CGEN_BITSET *permanent_isa;
488 permanent_isa = cgen_bitset_create (MAX_ISAS);
490 cgen_bitset_clear (isa);
491 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
494 isa = info->insn_sets;
497 /* If we've switched cpu's, try to find a handle we've used before */
499 && (cgen_bitset_compare (isa, prev_isa) != 0
501 || endian != prev_endian))
504 for (cl = cd_list; cl; cl = cl->next)
506 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
508 cl->endian == endian)
517 /* If we haven't initialized yet, initialize the opcode table. */
520 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
521 const char *mach_name;
525 mach_name = arch_type->printable_name;
527 prev_isa = cgen_bitset_copy (isa);
529 prev_endian = endian;
530 cd = or1k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
531 CGEN_CPU_OPEN_BFDMACH, mach_name,
532 CGEN_CPU_OPEN_ENDIAN, prev_endian,
537 /* Save this away for future reference. */
538 cl = xmalloc (sizeof (struct cpu_desc_list));
546 or1k_cgen_init_dis (cd);
549 /* We try to have as much common code as possible.
550 But at this point some targets need to take over. */
551 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
552 but if not possible try to move this hook elsewhere rather than
554 length = CGEN_PRINT_INSN (cd, pc, info);
560 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
561 return cd->default_insn_bitsize / 8;