1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Disassembler interface for targets using CGEN. -*- C -*-
3 CGEN: Cpu tools GENerator
5 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 - the resultant file is machine generated, cgen-dis.in isn't
8 Copyright (C) 1996-2018 Free Software Foundation, Inc.
10 This file is part of libopcodes.
12 This library is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 3, or (at your option)
17 It is distributed in the hope that it will be useful, but WITHOUT
18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
32 #include "disassemble.h"
35 #include "libiberty.h"
36 #include "or1k-desc.h"
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
43 static void print_normal
44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45 static void print_address
46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47 static void print_keyword
48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49 static void print_insn_normal
50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
53 static int default_print_insn
54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
59 /* -- disassembler routines inserted here. */
62 void or1k_cgen_print_operand
63 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
65 /* Main entry point for printing operands.
66 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
67 of dis-asm.h on cgen.h.
69 This function is basically just a big switch statement. Earlier versions
70 used tables to look up the function to use, but
71 - if the table contains both assembler and disassembler functions then
72 the disassembler contains much of the assembler and vice-versa,
73 - there's a lot of inlining possibilities as things grow,
74 - using a switch statement avoids the function call overhead.
76 This function could be moved into `print_insn_normal', but keeping it
77 separate makes clear the interface between `print_insn_normal' and each of
81 or1k_cgen_print_operand (CGEN_CPU_DESC cd,
85 void const *attrs ATTRIBUTE_UNUSED,
89 disassemble_info *info = (disassemble_info *) xinfo;
93 case OR1K_OPERAND_DISP21 :
94 print_address (cd, info, fields->f_disp21, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
96 case OR1K_OPERAND_DISP26 :
97 print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
99 case OR1K_OPERAND_RA :
100 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r2, 0);
102 case OR1K_OPERAND_RADF :
103 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
105 case OR1K_OPERAND_RASF :
106 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r2, 0);
108 case OR1K_OPERAND_RB :
109 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r3, 0);
111 case OR1K_OPERAND_RBDF :
112 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
114 case OR1K_OPERAND_RBSF :
115 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r3, 0);
117 case OR1K_OPERAND_RD :
118 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r1, 0);
120 case OR1K_OPERAND_RDDF :
121 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0);
123 case OR1K_OPERAND_RDSF :
124 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r1, 0);
126 case OR1K_OPERAND_SIMM16 :
127 print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
129 case OR1K_OPERAND_SIMM16_SPLIT :
130 print_normal (cd, info, fields->f_simm16_split, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
132 case OR1K_OPERAND_UIMM16 :
133 print_normal (cd, info, fields->f_uimm16, 0, pc, length);
135 case OR1K_OPERAND_UIMM16_SPLIT :
136 print_normal (cd, info, fields->f_uimm16_split, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
138 case OR1K_OPERAND_UIMM6 :
139 print_normal (cd, info, fields->f_uimm6, 0, pc, length);
143 /* xgettext:c-format */
144 opcodes_error_handler
145 (_("internal error: unrecognized field %d while printing insn"),
151 cgen_print_fn * const or1k_cgen_print_handlers[] =
158 or1k_cgen_init_dis (CGEN_CPU_DESC cd)
160 or1k_cgen_init_opcode_table (cd);
161 or1k_cgen_init_ibld_table (cd);
162 cd->print_handlers = & or1k_cgen_print_handlers[0];
163 cd->print_operand = or1k_cgen_print_operand;
167 /* Default print handler. */
170 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
174 bfd_vma pc ATTRIBUTE_UNUSED,
175 int length ATTRIBUTE_UNUSED)
177 disassemble_info *info = (disassemble_info *) dis_info;
179 /* Print the operand as directed by the attributes. */
180 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
181 ; /* nothing to do */
182 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
183 (*info->fprintf_func) (info->stream, "%ld", value);
185 (*info->fprintf_func) (info->stream, "0x%lx", value);
188 /* Default address handler. */
191 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
195 bfd_vma pc ATTRIBUTE_UNUSED,
196 int length ATTRIBUTE_UNUSED)
198 disassemble_info *info = (disassemble_info *) dis_info;
200 /* Print the operand as directed by the attributes. */
201 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
202 ; /* Nothing to do. */
203 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
204 (*info->print_address_func) (value, info);
205 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
206 (*info->print_address_func) (value, info);
207 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
208 (*info->fprintf_func) (info->stream, "%ld", (long) value);
210 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
213 /* Keyword print handler. */
216 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
218 CGEN_KEYWORD *keyword_table,
220 unsigned int attrs ATTRIBUTE_UNUSED)
222 disassemble_info *info = (disassemble_info *) dis_info;
223 const CGEN_KEYWORD_ENTRY *ke;
225 ke = cgen_keyword_lookup_value (keyword_table, value);
227 (*info->fprintf_func) (info->stream, "%s", ke->name);
229 (*info->fprintf_func) (info->stream, "???");
232 /* Default insn printer.
234 DIS_INFO is defined as `void *' so the disassembler needn't know anything
235 about disassemble_info. */
238 print_insn_normal (CGEN_CPU_DESC cd,
240 const CGEN_INSN *insn,
245 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
246 disassemble_info *info = (disassemble_info *) dis_info;
247 const CGEN_SYNTAX_CHAR_TYPE *syn;
249 CGEN_INIT_PRINT (cd);
251 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
253 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
255 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
258 if (CGEN_SYNTAX_CHAR_P (*syn))
260 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
264 /* We have an operand. */
265 or1k_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
266 fields, CGEN_INSN_ATTRS (insn), pc, length);
270 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
272 Returns 0 if all is well, non-zero otherwise. */
275 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
277 disassemble_info *info,
280 CGEN_EXTRACT_INFO *ex_info,
281 unsigned long *insn_value)
283 int status = (*info->read_memory_func) (pc, buf, buflen, info);
287 (*info->memory_error_func) (status, pc, info);
291 ex_info->dis_info = info;
292 ex_info->valid = (1 << buflen) - 1;
293 ex_info->insn_bytes = buf;
295 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
299 /* Utility to print an insn.
300 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
301 The result is the size of the insn in bytes or zero for an unknown insn
302 or -1 if an error occurs fetching data (memory_error_func will have
306 print_insn (CGEN_CPU_DESC cd,
308 disassemble_info *info,
312 CGEN_INSN_INT insn_value;
313 const CGEN_INSN_LIST *insn_list;
314 CGEN_EXTRACT_INFO ex_info;
317 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
318 basesize = cd->base_insn_bitsize < buflen * 8 ?
319 cd->base_insn_bitsize : buflen * 8;
320 insn_value = cgen_get_insn_value (cd, buf, basesize);
323 /* Fill in ex_info fields like read_insn would. Don't actually call
324 read_insn, since the incoming buffer is already read (and possibly
325 modified a la m32r). */
326 ex_info.valid = (1 << buflen) - 1;
327 ex_info.dis_info = info;
328 ex_info.insn_bytes = buf;
330 /* The instructions are stored in hash lists.
331 Pick the first one and keep trying until we find the right one. */
333 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
334 while (insn_list != NULL)
336 const CGEN_INSN *insn = insn_list->insn;
339 unsigned long insn_value_cropped;
341 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
342 /* Not needed as insn shouldn't be in hash lists if not supported. */
343 /* Supported by this cpu? */
344 if (! or1k_cgen_insn_supported (cd, insn))
346 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
351 /* Basic bit mask must be correct. */
352 /* ??? May wish to allow target to defer this check until the extract
355 /* Base size may exceed this instruction's size. Extract the
356 relevant part from the buffer. */
357 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
358 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
359 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
360 info->endian == BFD_ENDIAN_BIG);
362 insn_value_cropped = insn_value;
364 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
365 == CGEN_INSN_BASE_VALUE (insn))
367 /* Printing is handled in two passes. The first pass parses the
368 machine insn and extracts the fields. The second pass prints
371 /* Make sure the entire insn is loaded into insn_value, if it
373 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
374 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
376 unsigned long full_insn_value;
377 int rc = read_insn (cd, pc, info, buf,
378 CGEN_INSN_BITSIZE (insn) / 8,
379 & ex_info, & full_insn_value);
382 length = CGEN_EXTRACT_FN (cd, insn)
383 (cd, insn, &ex_info, full_insn_value, &fields, pc);
386 length = CGEN_EXTRACT_FN (cd, insn)
387 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
389 /* Length < 0 -> error. */
394 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
395 /* Length is in bits, result is in bytes. */
400 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
406 /* Default value for CGEN_PRINT_INSN.
407 The result is the size of the insn in bytes or zero for an unknown insn
408 or -1 if an error occured fetching bytes. */
410 #ifndef CGEN_PRINT_INSN
411 #define CGEN_PRINT_INSN default_print_insn
415 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
417 bfd_byte buf[CGEN_MAX_INSN_SIZE];
421 /* Attempt to read the base part of the insn. */
422 buflen = cd->base_insn_bitsize / 8;
423 status = (*info->read_memory_func) (pc, buf, buflen, info);
425 /* Try again with the minimum part, if min < base. */
426 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
428 buflen = cd->min_insn_bitsize / 8;
429 status = (*info->read_memory_func) (pc, buf, buflen, info);
434 (*info->memory_error_func) (status, pc, info);
438 return print_insn (cd, pc, info, buf, buflen);
442 Print one instruction from PC on INFO->STREAM.
443 Return the size of the instruction (in bytes). */
445 typedef struct cpu_desc_list
447 struct cpu_desc_list *next;
455 print_insn_or1k (bfd_vma pc, disassemble_info *info)
457 static cpu_desc_list *cd_list = 0;
458 cpu_desc_list *cl = 0;
459 static CGEN_CPU_DESC cd = 0;
460 static CGEN_BITSET *prev_isa;
461 static int prev_mach;
462 static int prev_endian;
466 int endian = (info->endian == BFD_ENDIAN_BIG
468 : CGEN_ENDIAN_LITTLE);
469 enum bfd_architecture arch;
471 /* ??? gdb will set mach but leave the architecture as "unknown" */
472 #ifndef CGEN_BFD_ARCH
473 #define CGEN_BFD_ARCH bfd_arch_or1k
476 if (arch == bfd_arch_unknown)
477 arch = CGEN_BFD_ARCH;
479 /* There's no standard way to compute the machine or isa number
480 so we leave it to the target. */
481 #ifdef CGEN_COMPUTE_MACH
482 mach = CGEN_COMPUTE_MACH (info);
487 #ifdef CGEN_COMPUTE_ISA
489 static CGEN_BITSET *permanent_isa;
492 permanent_isa = cgen_bitset_create (MAX_ISAS);
494 cgen_bitset_clear (isa);
495 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
498 isa = info->insn_sets;
501 /* If we've switched cpu's, try to find a handle we've used before */
503 && (cgen_bitset_compare (isa, prev_isa) != 0
505 || endian != prev_endian))
508 for (cl = cd_list; cl; cl = cl->next)
510 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
512 cl->endian == endian)
521 /* If we haven't initialized yet, initialize the opcode table. */
524 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
525 const char *mach_name;
529 mach_name = arch_type->printable_name;
531 prev_isa = cgen_bitset_copy (isa);
533 prev_endian = endian;
534 cd = or1k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
535 CGEN_CPU_OPEN_BFDMACH, mach_name,
536 CGEN_CPU_OPEN_ENDIAN, prev_endian,
541 /* Save this away for future reference. */
542 cl = xmalloc (sizeof (struct cpu_desc_list));
550 or1k_cgen_init_dis (cd);
553 /* We try to have as much common code as possible.
554 But at this point some targets need to take over. */
555 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
556 but if not possible try to move this hook elsewhere rather than
558 length = CGEN_PRINT_INSN (cd, pc, info);
564 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
565 return cd->default_insn_bitsize / 8;