1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
8 Free Software Foundation, Inc.
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
35 #include "libiberty.h"
36 #include "openrisc-desc.h"
37 #include "openrisc-opc.h"
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
43 static void print_normal
44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45 static void print_address
46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47 static void print_keyword
48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49 static void print_insn_normal
50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
53 static int default_print_insn
54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
59 /* -- disassembler routines inserted here. */
62 void openrisc_cgen_print_operand
63 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
65 /* Main entry point for printing operands.
66 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
67 of dis-asm.h on cgen.h.
69 This function is basically just a big switch statement. Earlier versions
70 used tables to look up the function to use, but
71 - if the table contains both assembler and disassembler functions then
72 the disassembler contains much of the assembler and vice-versa,
73 - there's a lot of inlining possibilities as things grow,
74 - using a switch statement avoids the function call overhead.
76 This function could be moved into `print_insn_normal', but keeping it
77 separate makes clear the interface between `print_insn_normal' and each of
81 openrisc_cgen_print_operand (CGEN_CPU_DESC cd,
85 void const *attrs ATTRIBUTE_UNUSED,
89 disassemble_info *info = (disassemble_info *) xinfo;
93 case OPENRISC_OPERAND_ABS_26 :
94 print_address (cd, info, fields->f_abs26, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
96 case OPENRISC_OPERAND_DISP_26 :
97 print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
99 case OPENRISC_OPERAND_HI16 :
100 print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
102 case OPENRISC_OPERAND_LO16 :
103 print_normal (cd, info, fields->f_lo16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
105 case OPENRISC_OPERAND_OP_F_23 :
106 print_normal (cd, info, fields->f_op4, 0, pc, length);
108 case OPENRISC_OPERAND_OP_F_3 :
109 print_normal (cd, info, fields->f_op5, 0, pc, length);
111 case OPENRISC_OPERAND_RA :
112 print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r2, 0);
114 case OPENRISC_OPERAND_RB :
115 print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r3, 0);
117 case OPENRISC_OPERAND_RD :
118 print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r1, 0);
120 case OPENRISC_OPERAND_SIMM_16 :
121 print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
123 case OPENRISC_OPERAND_UI16NC :
124 print_normal (cd, info, fields->f_i16nc, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
126 case OPENRISC_OPERAND_UIMM_16 :
127 print_normal (cd, info, fields->f_uimm16, 0, pc, length);
129 case OPENRISC_OPERAND_UIMM_5 :
130 print_normal (cd, info, fields->f_uimm5, 0, pc, length);
134 /* xgettext:c-format */
135 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
141 cgen_print_fn * const openrisc_cgen_print_handlers[] =
148 openrisc_cgen_init_dis (CGEN_CPU_DESC cd)
150 openrisc_cgen_init_opcode_table (cd);
151 openrisc_cgen_init_ibld_table (cd);
152 cd->print_handlers = & openrisc_cgen_print_handlers[0];
153 cd->print_operand = openrisc_cgen_print_operand;
157 /* Default print handler. */
160 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
164 bfd_vma pc ATTRIBUTE_UNUSED,
165 int length ATTRIBUTE_UNUSED)
167 disassemble_info *info = (disassemble_info *) dis_info;
169 #ifdef CGEN_PRINT_NORMAL
170 CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
173 /* Print the operand as directed by the attributes. */
174 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
175 ; /* nothing to do */
176 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
177 (*info->fprintf_func) (info->stream, "%ld", value);
179 (*info->fprintf_func) (info->stream, "0x%lx", value);
182 /* Default address handler. */
185 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
189 bfd_vma pc ATTRIBUTE_UNUSED,
190 int length ATTRIBUTE_UNUSED)
192 disassemble_info *info = (disassemble_info *) dis_info;
194 #ifdef CGEN_PRINT_ADDRESS
195 CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
198 /* Print the operand as directed by the attributes. */
199 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
200 ; /* Nothing to do. */
201 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
202 (*info->print_address_func) (value, info);
203 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
204 (*info->print_address_func) (value, info);
205 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
206 (*info->fprintf_func) (info->stream, "%ld", (long) value);
208 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
211 /* Keyword print handler. */
214 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
216 CGEN_KEYWORD *keyword_table,
218 unsigned int attrs ATTRIBUTE_UNUSED)
220 disassemble_info *info = (disassemble_info *) dis_info;
221 const CGEN_KEYWORD_ENTRY *ke;
223 ke = cgen_keyword_lookup_value (keyword_table, value);
225 (*info->fprintf_func) (info->stream, "%s", ke->name);
227 (*info->fprintf_func) (info->stream, "???");
230 /* Default insn printer.
232 DIS_INFO is defined as `void *' so the disassembler needn't know anything
233 about disassemble_info. */
236 print_insn_normal (CGEN_CPU_DESC cd,
238 const CGEN_INSN *insn,
243 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
244 disassemble_info *info = (disassemble_info *) dis_info;
245 const CGEN_SYNTAX_CHAR_TYPE *syn;
247 CGEN_INIT_PRINT (cd);
249 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
251 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
253 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
256 if (CGEN_SYNTAX_CHAR_P (*syn))
258 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
262 /* We have an operand. */
263 openrisc_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
264 fields, CGEN_INSN_ATTRS (insn), pc, length);
268 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
270 Returns 0 if all is well, non-zero otherwise. */
273 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
275 disassemble_info *info,
278 CGEN_EXTRACT_INFO *ex_info,
279 unsigned long *insn_value)
281 int status = (*info->read_memory_func) (pc, buf, buflen, info);
285 (*info->memory_error_func) (status, pc, info);
289 ex_info->dis_info = info;
290 ex_info->valid = (1 << buflen) - 1;
291 ex_info->insn_bytes = buf;
293 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
297 /* Utility to print an insn.
298 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
299 The result is the size of the insn in bytes or zero for an unknown insn
300 or -1 if an error occurs fetching data (memory_error_func will have
304 print_insn (CGEN_CPU_DESC cd,
306 disassemble_info *info,
310 CGEN_INSN_INT insn_value;
311 const CGEN_INSN_LIST *insn_list;
312 CGEN_EXTRACT_INFO ex_info;
315 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
316 basesize = cd->base_insn_bitsize < buflen * 8 ?
317 cd->base_insn_bitsize : buflen * 8;
318 insn_value = cgen_get_insn_value (cd, buf, basesize);
321 /* Fill in ex_info fields like read_insn would. Don't actually call
322 read_insn, since the incoming buffer is already read (and possibly
323 modified a la m32r). */
324 ex_info.valid = (1 << buflen) - 1;
325 ex_info.dis_info = info;
326 ex_info.insn_bytes = buf;
328 /* The instructions are stored in hash lists.
329 Pick the first one and keep trying until we find the right one. */
331 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
332 while (insn_list != NULL)
334 const CGEN_INSN *insn = insn_list->insn;
337 unsigned long insn_value_cropped;
339 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
340 /* Not needed as insn shouldn't be in hash lists if not supported. */
341 /* Supported by this cpu? */
342 if (! openrisc_cgen_insn_supported (cd, insn))
344 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
349 /* Basic bit mask must be correct. */
350 /* ??? May wish to allow target to defer this check until the extract
353 /* Base size may exceed this instruction's size. Extract the
354 relevant part from the buffer. */
355 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
356 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
357 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
358 info->endian == BFD_ENDIAN_BIG);
360 insn_value_cropped = insn_value;
362 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
363 == CGEN_INSN_BASE_VALUE (insn))
365 /* Printing is handled in two passes. The first pass parses the
366 machine insn and extracts the fields. The second pass prints
369 /* Make sure the entire insn is loaded into insn_value, if it
371 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
372 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
374 unsigned long full_insn_value;
375 int rc = read_insn (cd, pc, info, buf,
376 CGEN_INSN_BITSIZE (insn) / 8,
377 & ex_info, & full_insn_value);
380 length = CGEN_EXTRACT_FN (cd, insn)
381 (cd, insn, &ex_info, full_insn_value, &fields, pc);
384 length = CGEN_EXTRACT_FN (cd, insn)
385 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
387 /* Length < 0 -> error. */
392 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
393 /* Length is in bits, result is in bytes. */
398 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
404 /* Default value for CGEN_PRINT_INSN.
405 The result is the size of the insn in bytes or zero for an unknown insn
406 or -1 if an error occured fetching bytes. */
408 #ifndef CGEN_PRINT_INSN
409 #define CGEN_PRINT_INSN default_print_insn
413 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
415 bfd_byte buf[CGEN_MAX_INSN_SIZE];
419 /* Attempt to read the base part of the insn. */
420 buflen = cd->base_insn_bitsize / 8;
421 status = (*info->read_memory_func) (pc, buf, buflen, info);
423 /* Try again with the minimum part, if min < base. */
424 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
426 buflen = cd->min_insn_bitsize / 8;
427 status = (*info->read_memory_func) (pc, buf, buflen, info);
432 (*info->memory_error_func) (status, pc, info);
436 return print_insn (cd, pc, info, buf, buflen);
440 Print one instruction from PC on INFO->STREAM.
441 Return the size of the instruction (in bytes). */
443 typedef struct cpu_desc_list
445 struct cpu_desc_list *next;
453 print_insn_openrisc (bfd_vma pc, disassemble_info *info)
455 static cpu_desc_list *cd_list = 0;
456 cpu_desc_list *cl = 0;
457 static CGEN_CPU_DESC cd = 0;
458 static CGEN_BITSET *prev_isa;
459 static int prev_mach;
460 static int prev_endian;
464 int endian = (info->endian == BFD_ENDIAN_BIG
466 : CGEN_ENDIAN_LITTLE);
467 enum bfd_architecture arch;
469 /* ??? gdb will set mach but leave the architecture as "unknown" */
470 #ifndef CGEN_BFD_ARCH
471 #define CGEN_BFD_ARCH bfd_arch_openrisc
474 if (arch == bfd_arch_unknown)
475 arch = CGEN_BFD_ARCH;
477 /* There's no standard way to compute the machine or isa number
478 so we leave it to the target. */
479 #ifdef CGEN_COMPUTE_MACH
480 mach = CGEN_COMPUTE_MACH (info);
485 #ifdef CGEN_COMPUTE_ISA
487 static CGEN_BITSET *permanent_isa;
490 permanent_isa = cgen_bitset_create (MAX_ISAS);
492 cgen_bitset_clear (isa);
493 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
496 isa = info->insn_sets;
499 /* If we've switched cpu's, try to find a handle we've used before */
501 && (cgen_bitset_compare (isa, prev_isa) != 0
503 || endian != prev_endian))
506 for (cl = cd_list; cl; cl = cl->next)
508 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
510 cl->endian == endian)
519 /* If we haven't initialized yet, initialize the opcode table. */
522 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
523 const char *mach_name;
527 mach_name = arch_type->printable_name;
529 prev_isa = cgen_bitset_copy (isa);
531 prev_endian = endian;
532 cd = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
533 CGEN_CPU_OPEN_BFDMACH, mach_name,
534 CGEN_CPU_OPEN_ENDIAN, prev_endian,
539 /* Save this away for future reference. */
540 cl = xmalloc (sizeof (struct cpu_desc_list));
548 openrisc_cgen_init_dis (cd);
551 /* We try to have as much common code as possible.
552 But at this point some targets need to take over. */
553 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
554 but if not possible try to move this hook elsewhere rather than
556 length = CGEN_PRINT_INSN (cd, pc, info);
562 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
563 return cd->default_insn_bitsize / 8;