opcodes/nios2-opc.c

   1 /* Altera Nios II opcode list.
   2    Copyright (C) 2012, 2013 Free Software Foundation, Inc.
   3    Contributed by Nigel Gray (ngray@altera.com).
   4    Contributed by Mentor Graphics, Inc.
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include "sysdep.h"
  24 #include <stdio.h>
  25 #include "opcode/nios2.h"
  26
  27 /* Register string table */
  28
  29 const struct nios2_reg nios2_builtin_regs[] = {
  30   /* Standard register names.  */
  31   {"zero", 0},
  32   {"at", 1},                    /* assembler temporary */
  33   {"r2", 2},
  34   {"r3", 3},
  35   {"r4", 4},
  36   {"r5", 5},
  37   {"r6", 6},
  38   {"r7", 7},
  39   {"r8", 8},
  40   {"r9", 9},
  41   {"r10", 10},
  42   {"r11", 11},
  43   {"r12", 12},
  44   {"r13", 13},
  45   {"r14", 14},
  46   {"r15", 15},
  47   {"r16", 16},
  48   {"r17", 17},
  49   {"r18", 18},
  50   {"r19", 19},
  51   {"r20", 20},
  52   {"r21", 21},
  53   {"r22", 22},
  54   {"r23", 23},
  55   {"et", 24},
  56   {"bt", 25},
  57   {"gp", 26},                   /* global pointer */
  58   {"sp", 27},                   /* stack pointer */
  59   {"fp", 28},                   /* frame pointer */
  60   {"ea", 29},                   /* exception return address */
  61   {"ba", 30},                   /* breakpoint return address */
  62   {"ra", 31},                   /* return address */
  63
  64   /* Alternative names for special registers.  */
  65   {"r0", 0},
  66   {"r1", 1},
  67   {"r24", 24},
  68   {"r25", 25},
  69   {"r26", 26},
  70   {"r27", 27},
  71   {"r28", 28},
  72   {"r29", 29},
  73   {"r30", 30},
  74   {"r31", 31},
  75
  76   /* Control register names.  */
  77   {"status", 0},
  78   {"estatus", 1},
  79   {"bstatus", 2},
  80   {"ienable", 3},
  81   {"ipending", 4},
  82   {"cpuid", 5},
  83   {"ctl6", 6},
  84   {"exception", 7},
  85   {"pteaddr", 8},
  86   {"tlbacc", 9},
  87   {"tlbmisc", 10},
  88   {"fstatus", 11},
  89   {"badaddr", 12},
  90   {"config", 13},
  91   {"mpubase", 14},
  92   {"mpuacc", 15},
  93   {"ctl16", 16},
  94   {"ctl17", 17},
  95   {"ctl18", 18},
  96   {"ctl19", 19},
  97   {"ctl20", 20},
  98   {"ctl21", 21},
  99   {"ctl22", 22},
 100   {"ctl23", 23},
 101   {"ctl24", 24},
 102   {"ctl25", 25},
 103   {"ctl26", 26},
 104   {"ctl27", 27},
 105   {"ctl28", 28},
 106   {"ctl29", 29},
 107   {"ctl30", 30},
 108   {"ctl31", 31},
 109
 110   /* Alternative names for special control registers.  */
 111   {"ctl0", 0},
 112   {"ctl1", 1},
 113   {"ctl2", 2},
 114   {"ctl3", 3},
 115   {"ctl4", 4},
 116   {"ctl5", 5},
 117   {"ctl7", 7},
 118   {"ctl8", 8},
 119   {"ctl9", 9},
 120   {"ctl10", 10},
 121   {"ctl11", 11},
 122   {"ctl12", 12},
 123   {"ctl13", 13},
 124   {"ctl14", 14},
 125   {"ctl15", 15},
 126
 127   /* Coprocessor register names.  */
 128   {"c0", 0},
 129   {"c1", 1},
 130   {"c2", 2},
 131   {"c3", 3},
 132   {"c4", 4},
 133   {"c5", 5},
 134   {"c6", 6},
 135   {"c7", 7},
 136   {"c8", 8},
 137   {"c9", 9},
 138   {"c10", 10},
 139   {"c11", 11},
 140   {"c12", 12},
 141   {"c13", 13},
 142   {"c14", 14},
 143   {"c15", 15},
 144   {"c16", 16},
 145   {"c17", 17},
 146   {"c18", 18},
 147   {"c19", 19},
 148   {"c20", 20},
 149   {"c21", 21},
 150   {"c22", 22},
 151   {"c23", 23},
 152   {"c24", 24},
 153   {"c25", 25},
 154   {"c26", 26},
 155   {"c27", 27},
 156   {"c28", 28},
 157   {"c29", 29},
 158   {"c30", 30},
 159   {"c31", 31},
 160 };
 161
 162 #define NIOS2_NUM_REGS \
 163        ((sizeof nios2_builtin_regs) / (sizeof (nios2_builtin_regs[0])))
 164 const int nios2_num_builtin_regs = NIOS2_NUM_REGS;
 165
 166 /* This is not const in order to allow for dynamic extensions to the
 167    built-in instruction set.  */
 168 struct nios2_reg *nios2_regs = (struct nios2_reg *) nios2_builtin_regs;
 169 int nios2_num_regs = NIOS2_NUM_REGS;
 170 #undef NIOS2_NUM_REGS
 171
 172 /* This is the opcode table used by the Nios II GNU as, disassembler
 173    and GDB.  */
 174 const struct nios2_opcode nios2_builtin_opcodes[] =
 175 {
 176   /* { name, args, args_test, num_args,
 177        match, mask, pinfo, overflow_msg } */
 178   {"add", "d,s,t", "d,s,t,E", 3,
 179    OP_MATCH_ADD, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 180   {"addi", "t,s,i", "t,s,i,E", 3,
 181    OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_ADDI, signed_immed16_overflow},
 182   {"subi", "t,s,i", "t,s,i,E", 3,
 183    OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow},
 184   {"and", "d,s,t", "d,s,t,E", 3,
 185    OP_MATCH_AND, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 186   {"andhi", "t,s,u", "t,s,u,E", 3,
 187    OP_MATCH_ANDHI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
 188   {"andi", "t,s,u", "t,s,u,E", 3,
 189    OP_MATCH_ANDI, OP_MASK_IOP, NIOS2_INSN_ANDI, unsigned_immed16_overflow},
 190   {"beq", "s,t,o", "s,t,o,E", 3,
 191    OP_MATCH_BEQ, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
 192   {"bge", "s,t,o", "s,t,o,E", 3,
 193    OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
 194   {"bgeu", "s,t,o", "s,t,o,E", 3,
 195    OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
 196   {"bgt", "s,t,o", "s,t,o,E", 3,
 197    OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
 198    branch_target_overflow},
 199   {"bgtu", "s,t,o", "s,t,o,E", 3,
 200    OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
 201    branch_target_overflow},
 202   {"ble", "s,t,o", "s,t,o,E", 3,
 203    OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
 204    branch_target_overflow},
 205   {"bleu", "s,t,o", "s,t,o,E", 3,
 206    OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
 207    branch_target_overflow},
 208   {"blt", "s,t,o", "s,t,o,E", 3,
 209    OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
 210   {"bltu", "s,t,o", "s,t,o,E", 3,
 211    OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
 212   {"bne", "s,t,o", "s,t,o,E", 3,
 213    OP_MATCH_BNE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
 214   {"br", "o", "o,E", 1,
 215    OP_MATCH_BR, OP_MASK_IOP, NIOS2_INSN_UBRANCH, branch_target_overflow},
 216   {"break", "b", "b,E", 1,
 217    OP_MATCH_BREAK, OP_MASK_BREAK, 0, no_overflow},
 218   {"bret", "", "E", 0,
 219    OP_MATCH_BRET, OP_MASK, 0, no_overflow},
 220   {"flushd", "i(s)", "i(s)E", 2,
 221    OP_MATCH_FLUSHD, OP_MASK_IOP, 0, signed_immed16_overflow},
 222   {"flushda", "i(s)", "i(s)E", 2,
 223    OP_MATCH_FLUSHDA, OP_MASK_IOP, 0, signed_immed16_overflow},
 224   {"flushi", "s", "s,E", 1,
 225    OP_MATCH_FLUSHI, OP_MASK_FLUSHI, 0, no_overflow},
 226   {"flushp", "", "E", 0,
 227    OP_MATCH_FLUSHP, OP_MASK, 0, no_overflow},
 228   {"initd", "i(s)", "i(s)E", 2,
 229    OP_MATCH_INITD, OP_MASK_IOP, 0, signed_immed16_overflow},
 230   {"initda", "i(s)", "i(s)E", 2,
 231    OP_MATCH_INITDA, OP_MASK_IOP, 0, signed_immed16_overflow},
 232   {"initi", "s", "s,E", 1,
 233    OP_MATCH_INITI, OP_MASK_INITI, 0, no_overflow},
 234   {"call", "m", "m,E", 1,
 235    OP_MATCH_CALL, OP_MASK_IOP, NIOS2_INSN_CALL, call_target_overflow},
 236   {"callr", "s", "s,E", 1,
 237    OP_MATCH_CALLR, OP_MASK_CALLR, 0, no_overflow},
 238   {"cmpeq", "d,s,t", "d,s,t,E", 3,
 239    OP_MATCH_CMPEQ, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 240   {"cmpeqi", "t,s,i", "t,s,i,E", 3,
 241    OP_MATCH_CMPEQI, OP_MASK_IOP, 0, signed_immed16_overflow},
 242   {"cmpge", "d,s,t", "d,s,t,E", 3,
 243    OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 244   {"cmpgei", "t,s,i", "t,s,i,E", 3,
 245    OP_MATCH_CMPGEI, OP_MASK_IOP, 0, signed_immed16_overflow},
 246   {"cmpgeu", "d,s,t", "d,s,t,E", 3,
 247    OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 248   {"cmpgeui", "t,s,u", "t,s,u,E", 3,
 249    OP_MATCH_CMPGEUI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
 250   {"cmpgt", "d,s,t", "d,s,t,E", 3,
 251    OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
 252   {"cmpgti", "t,s,i", "t,s,i,E", 3,
 253    OP_MATCH_CMPGEI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow},
 254   {"cmpgtu", "d,s,t", "d,s,t,E", 3,
 255    OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
 256   {"cmpgtui", "t,s,u", "t,s,u,E", 3,
 257    OP_MATCH_CMPGEUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow},
 258   {"cmple", "d,s,t", "d,s,t,E", 3,
 259    OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
 260   {"cmplei", "t,s,i", "t,s,i,E", 3,
 261    OP_MATCH_CMPLTI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow},
 262   {"cmpleu", "d,s,t", "d,s,t,E", 3,
 263    OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
 264   {"cmpleui", "t,s,u", "t,s,u,E", 3,
 265    OP_MATCH_CMPLTUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow},
 266   {"cmplt", "d,s,t", "d,s,t,E", 3,
 267    OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 268   {"cmplti", "t,s,i", "t,s,i,E", 3,
 269    OP_MATCH_CMPLTI, OP_MASK_IOP, 0, signed_immed16_overflow},
 270   {"cmpltu", "d,s,t", "d,s,t,E", 3,
 271    OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 272   {"cmpltui", "t,s,u", "t,s,u,E", 3,
 273    OP_MATCH_CMPLTUI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
 274   {"cmpne", "d,s,t", "d,s,t,E", 3,
 275    OP_MATCH_CMPNE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 276   {"cmpnei", "t,s,i", "t,s,i,E", 3,
 277    OP_MATCH_CMPNEI, OP_MASK_IOP, 0, signed_immed16_overflow},
 278   {"div", "d,s,t", "d,s,t,E", 3,
 279    OP_MATCH_DIV, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 280   {"divu", "d,s,t", "d,s,t,E", 3,
 281    OP_MATCH_DIVU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 282   {"jmp", "s", "s,E", 1,
 283    OP_MATCH_JMP, OP_MASK_JMP, 0, no_overflow},
 284   {"jmpi", "m", "m,E", 1,
 285    OP_MATCH_JMPI, OP_MASK_IOP, 0, no_overflow},
 286   {"ldb", "t,i(s)", "t,i(s)E", 3,
 287    OP_MATCH_LDB, OP_MASK_IOP, 0, address_offset_overflow},
 288   {"ldbio", "t,i(s)", "t,i(s)E", 3,
 289    OP_MATCH_LDBIO, OP_MASK_IOP, 0, address_offset_overflow},
 290   {"ldbu", "t,i(s)", "t,i(s)E", 3,
 291    OP_MATCH_LDBU, OP_MASK_IOP, 0, address_offset_overflow},
 292   {"ldbuio", "t,i(s)", "t,i(s)E", 3,
 293    OP_MATCH_LDBUIO, OP_MASK_IOP, 0, address_offset_overflow},
 294   {"ldh", "t,i(s)", "t,i(s)E", 3,
 295    OP_MATCH_LDH, OP_MASK_IOP, 0, address_offset_overflow},
 296   {"ldhio", "t,i(s)", "t,i(s)E", 3,
 297    OP_MATCH_LDHIO, OP_MASK_IOP, 0, address_offset_overflow},
 298   {"ldhu", "t,i(s)", "t,i(s)E", 3,
 299    OP_MATCH_LDHU, OP_MASK_IOP, 0, address_offset_overflow},
 300   {"ldhuio", "t,i(s)", "t,i(s)E", 3,
 301    OP_MATCH_LDHUIO, OP_MASK_IOP, 0, address_offset_overflow},
 302   {"ldl", "t,i(s)", "t,i(s)E", 3,
 303    OP_MATCH_LDL, OP_MASK_IOP, 0, address_offset_overflow},
 304   {"ldw", "t,i(s)", "t,i(s)E", 3,
 305    OP_MATCH_LDW, OP_MASK_IOP, 0, address_offset_overflow},
 306   {"ldwio", "t,i(s)", "t,i(s)E", 3,
 307    OP_MATCH_LDWIO, OP_MASK_IOP, 0, address_offset_overflow},
 308   {"mov", "d,s", "d,s,E", 2,
 309    OP_MATCH_ADD, OP_MASK_RRT|OP_MASK_ROPX|OP_MASK_ROP, NIOS2_INSN_MACRO_MOV,
 310    no_overflow},
 311   {"movhi", "t,u", "t,u,E", 2,
 312    OP_MATCH_ORHI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI,
 313    unsigned_immed16_overflow},
 314   {"movui", "t,u", "t,u,E", 2,
 315    OP_MATCH_ORI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI,
 316    unsigned_immed16_overflow},
 317   {"movi", "t,i", "t,i,E", 2,
 318    OP_MATCH_ADDI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI,
 319    signed_immed16_overflow},
 320   /* movia expands to two instructions so there is no mask or match */
 321   {"movia", "t,o", "t,o,E", 2,
 322    OP_MATCH_ORHI, OP_MASK_IOP, NIOS2_INSN_MACRO_MOVIA, no_overflow},
 323   {"mul", "d,s,t", "d,s,t,E", 3,
 324    OP_MATCH_MUL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 325   {"muli", "t,s,i", "t,s,i,E", 3,
 326    OP_MATCH_MULI, OP_MASK_IOP, 0, signed_immed16_overflow},
 327   {"mulxss", "d,s,t", "d,s,t,E", 3,
 328    OP_MATCH_MULXSS, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 329   {"mulxsu", "d,s,t", "d,s,t,E", 3,
 330    OP_MATCH_MULXSU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 331   {"mulxuu", "d,s,t", "d,s,t,E", 3,
 332    OP_MATCH_MULXUU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 333   {"nextpc", "d", "d,E", 1,
 334    OP_MATCH_NEXTPC, OP_MASK_NEXTPC, 0, no_overflow},
 335   {"nop", "", "E", 0,
 336    OP_MATCH_ADD, OP_MASK, NIOS2_INSN_MACRO_MOV, no_overflow},
 337   {"nor", "d,s,t", "d,s,t,E", 3,
 338    OP_MATCH_NOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 339   {"or", "d,s,t", "d,s,t,E", 3,
 340    OP_MATCH_OR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 341   {"orhi", "t,s,u", "t,s,u,E", 3,
 342    OP_MATCH_ORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
 343   {"ori", "t,s,u", "t,s,u,E", 3,
 344    OP_MATCH_ORI, OP_MASK_IOP, NIOS2_INSN_ORI, unsigned_immed16_overflow},
 345   {"rdctl", "d,c", "d,c,E", 2,
 346    OP_MATCH_RDCTL, OP_MASK_RDCTL, 0, no_overflow},
 347   {"ret", "", "E", 0,
 348    OP_MATCH_RET, OP_MASK, 0, no_overflow},
 349   {"rol", "d,s,t", "d,s,t,E", 3,
 350    OP_MATCH_ROL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 351   {"roli", "d,s,j", "d,s,j,E", 3,
 352    OP_MATCH_ROLI, OP_MASK_ROLI, 0, unsigned_immed5_overflow},
 353   {"ror", "d,s,t", "d,s,t,E", 3,
 354    OP_MATCH_ROR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 355   {"sll", "d,s,t", "d,s,t,E", 3,
 356    OP_MATCH_SLL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 357   {"slli", "d,s,j", "d,s,j,E", 3,
 358    OP_MATCH_SLLI, OP_MASK_SLLI, 0, unsigned_immed5_overflow},
 359   {"sra", "d,s,t", "d,s,t,E", 3,
 360    OP_MATCH_SRA, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 361   {"srai", "d,s,j", "d,s,j,E", 3,
 362    OP_MATCH_SRAI, OP_MASK_SRAI, 0, unsigned_immed5_overflow},
 363   {"srl", "d,s,t", "d,s,t,E", 3,
 364    OP_MATCH_SRL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 365   {"srli", "d,s,j", "d,s,j,E", 3,
 366    OP_MATCH_SRLI, OP_MASK_SRLI, 0, unsigned_immed5_overflow},
 367   {"stb", "t,i(s)", "t,i(s)E", 3,
 368    OP_MATCH_STB, OP_MASK_IOP, 0, address_offset_overflow},
 369   {"stbio", "t,i(s)", "t,i(s)E", 3,
 370    OP_MATCH_STBIO, OP_MASK_IOP, 0, address_offset_overflow},
 371   {"stc", "t,i(s)", "t,i(s)E", 3,
 372    OP_MATCH_STC, OP_MASK_IOP, 0, address_offset_overflow},
 373   {"sth", "t,i(s)", "t,i(s)E", 3,
 374    OP_MATCH_STH, OP_MASK_IOP, 0, address_offset_overflow},
 375   {"sthio", "t,i(s)", "t,i(s)E", 3,
 376    OP_MATCH_STHIO, OP_MASK_IOP, 0, address_offset_overflow},
 377   {"stw", "t,i(s)", "t,i(s)E", 3,
 378    OP_MATCH_STW, OP_MASK_IOP, 0, address_offset_overflow},
 379   {"stwio", "t,i(s)", "t,i(s)E", 3,
 380    OP_MATCH_STWIO, OP_MASK_IOP, 0, address_offset_overflow},
 381   {"sub", "d,s,t", "d,s,t,E", 3,
 382    OP_MATCH_SUB, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 383   {"sync", "", "E", 0,
 384    OP_MATCH_SYNC, OP_MASK_SYNC, 0, no_overflow},
 385   {"trap", "", "E", 0,
 386    OP_MATCH_TRAP, OP_MASK_TRAP, 0, no_overflow},
 387   {"eret", "", "E", 0,
 388    OP_MATCH_ERET, OP_MASK, 0, no_overflow},
 389   {"custom", "l,d,s,t", "l,d,s,t,E", 4,
 390    OP_MATCH_CUSTOM, OP_MASK_ROP, 0, custom_opcode_overflow},
 391   {"wrctl", "c,s", "c,s,E", 2,
 392    OP_MATCH_WRCTL, OP_MASK_WRCTL, 0, no_overflow},
 393   {"xor", "d,s,t", "d,s,t,E", 3,
 394    OP_MATCH_XOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
 395   {"xorhi", "t,s,u", "t,s,u,E", 3,
 396    OP_MATCH_XORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
 397   {"xori", "t,s,u", "t,s,u,E", 3,
 398    OP_MATCH_XORI, OP_MASK_IOP, NIOS2_INSN_XORI, unsigned_immed16_overflow}
 399 };
 400
 401 #define NIOS2_NUM_OPCODES \
 402        ((sizeof nios2_builtin_opcodes) / (sizeof (nios2_builtin_opcodes[0])))
 403 const int bfd_nios2_num_builtin_opcodes = NIOS2_NUM_OPCODES;
 404
 405 /* This is not const to allow for dynamic extensions to the
 406    built-in instruction set. */
 407 struct nios2_opcode *nios2_opcodes =
 408   (struct nios2_opcode *) nios2_builtin_opcodes;
 409 int bfd_nios2_num_opcodes = NIOS2_NUM_OPCODES;
 410 #undef NIOS2_NUM_OPCODES