1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "disassemble.h"
28 #include "libiberty.h"
30 #include "bfd_stdint.h"
32 #include "nds32-asm.h"
33 #include "opcode/nds32.h"
35 /* Get fields macro define. */
36 #define MASK_OP(insn, mask) ((insn) & (0x3f << 25 | (mask)))
38 /* For mapping symbol. */
49 struct nds32_private_data
51 /* Whether any mapping symbols are present in the provided symbol
52 table. -1 if we do not know yet, otherwise 0 or 1. */
53 int has_mapping_symbols;
55 /* Track the last type (although this doesn't seem to be useful). */
56 enum map_type last_mapping_type;
58 /* Tracking symbol table information. */
59 int last_symbol_index;
63 /* Default text to print if an instruction isn't recognized. */
64 #define UNKNOWN_INSN_MSG _("*unknown*")
65 #define NDS32_PARSE_INSN16 0x01
66 #define NDS32_PARSE_INSN32 0x02
68 extern const field_t *nds32_field_table[NDS32_CORE_COUNT];
69 extern opcode_t *nds32_opcode_table[NDS32_CORE_COUNT];
70 extern keyword_t **nds32_keyword_table[NDS32_CORE_COUNT];
71 extern struct nds32_opcode nds32_opcodes[];
72 extern const field_t operand_fields[];
73 extern keyword_t *keywords[];
74 extern const keyword_t keyword_gpr[];
75 static void print_insn16 (bfd_vma pc, disassemble_info *info,
76 uint32_t insn, uint32_t parse_mode);
77 static void print_insn32 (bfd_vma pc, disassemble_info *info, uint32_t insn,
79 static uint32_t nds32_mask_opcode (uint32_t);
80 static void nds32_special_opcode (uint32_t, struct nds32_opcode **);
81 static int get_mapping_symbol_type (struct disassemble_info *, int,
83 static int is_mapping_symbol (struct disassemble_info *, int,
86 /* define in objdump.c. */
87 struct objdump_disasm_info
91 bfd_boolean require_sec;
94 disassembler_ftype disassemble_fn;
98 /* Hash function for disassemble. */
100 static htab_t opcode_htab;
102 /* Find the value map register name. */
105 nds32_find_reg_keyword (keyword_t *reg, int value)
110 while (reg->name != NULL && reg->value != value)
114 if (reg->name == NULL)
120 nds32_parse_audio_ext (const field_t *pfd,
121 disassemble_info *info, uint32_t insn)
123 fprintf_ftype func = info->fprintf_func;
124 void *stream = info->stream;
126 int int_value, new_value;
128 if (pfd->hw_res == HW_INT || pfd->hw_res == HW_UINT)
130 if (pfd->hw_res == HW_INT)
132 N32_IMMS ((insn >> pfd->bitpos), pfd->bitsize) << pfd->shift;
134 int_value = __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
137 func (stream, "#%d", int_value);
139 func (stream, "#0x%x", int_value);
143 __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
144 new_value = int_value;
145 psys_reg = (keyword_t*) keywords[pfd->hw_res];
147 /* p = bit[4].bit[1:0], r = bit[4].bit[3:2]. */
148 if (strcmp (pfd->name, "im5_i") == 0)
150 new_value = int_value & 0x03;
151 new_value |= ((int_value & 0x10) >> 2);
153 else if (strcmp (pfd->name, "im5_m") == 0)
155 new_value = ((int_value & 0x1C) >> 2);
157 /* p = 0.bit[1:0], r = 0.bit[3:2]. */
158 /* q = 1.bit[1:0], s = 1.bit[5:4]. */
159 else if (strcmp (pfd->name, "im6_iq") == 0)
163 else if (strcmp (pfd->name, "im6_ms") == 0)
167 /* Rt CONCAT(c, t21, t0). */
168 else if (strcmp (pfd->name, "a_rt21") == 0)
170 new_value = (insn & 0x00000020) >> 5;
171 new_value |= (insn & 0x00000C00) >> 9;
172 new_value |= (insn & 0x00008000) >> 12;
174 else if (strcmp (pfd->name, "a_rte") == 0)
176 new_value = (insn & 0x00000C00) >> 9;
177 new_value |= (insn & 0x00008000) >> 12;
179 else if (strcmp (pfd->name, "a_rte1") == 0)
181 new_value = (insn & 0x00000C00) >> 9;
182 new_value |= (insn & 0x00008000) >> 12;
185 else if (strcmp (pfd->name, "a_rte69") == 0)
187 new_value = int_value << 1;
189 else if (strcmp (pfd->name, "a_rte69_1") == 0)
191 new_value = int_value << 1;
195 psys_reg = nds32_find_reg_keyword (psys_reg, new_value);
197 func (stream, "???");
199 func (stream, "$%s", psys_reg->name);
202 /* Match instruction opcode with keyword table. */
205 match_field (char *name)
210 for (k = 0; k < NDS32_CORE_COUNT; k++)
212 pfd = (field_t *) nds32_field_table[k];
215 if (pfd->name == NULL)
217 if (strcmp (name, pfd->name) == 0)
226 /* Dump instruction. If the opcode is unknown, return FALSE. */
229 nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
230 disassemble_info *info, uint32_t insn,
234 fprintf_ftype func = info->fprintf_func;
235 void *stream = info->stream;
236 const char *pstr_src;
239 unsigned int push25gpr = 0, lsmwRb, lsmwRe, lsmwEnb4, checkbit, i;
240 int int_value, ifthe1st = 1;
246 func (stream, UNKNOWN_INSN_MSG);
250 pstr_src = opc->instruction;
253 func (stream, "%s", opc->opcode);
256 /* NDS32_PARSE_INSN16. */
257 if (parse_mode & NDS32_PARSE_INSN16)
259 func (stream, "%s ", opc->opcode);
262 /* NDS32_PARSE_INSN32. */
266 if (op == N32_OP6_LSMW)
267 func (stream, "%s.", opc->opcode);
268 else if (strstr (opc->instruction, "tito"))
269 func (stream, "%s", opc->opcode);
271 func (stream, "%s\t", opc->opcode);
282 /* Compare with operand_fields[].name. */
283 pstr_tmp = &tmp_string[0];
286 if ((*pstr_src == ',') || (*pstr_src == ' ')
287 || (*pstr_src == '{') || (*pstr_src == '}')
288 || (*pstr_src == '[') || (*pstr_src == ']')
289 || (*pstr_src == '(') || (*pstr_src == ')')
290 || (*pstr_src == '+') || (*pstr_src == '<'))
292 *pstr_tmp++ = *pstr_src++;
296 if ((pfd = match_field (&tmp_string[0])) == NULL)
300 if (parse_mode & NDS32_PARSE_INSN16)
302 if (pfd->hw_res == HW_GPR)
305 __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
307 if ((opc->value == 0xfc00) || (opc->value == 0xfc80))
312 int_value = (6 + (0x01 << int_value));
313 push25gpr = int_value;
315 else if (strcmp (pfd->name, "rt4") == 0)
317 int_value = nds32_r45map[int_value];
319 func (stream, "$%s", keyword_gpr[int_value].name);
321 else if ((pfd->hw_res == HW_INT) || (pfd->hw_res == HW_UINT))
323 if (pfd->hw_res == HW_INT)
325 N32_IMMS ((insn >> pfd->bitpos),
326 pfd->bitsize) << pfd->shift;
329 __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
332 if (opc->value == 0xfa00)
335 func (stream, "#0x%x", int_value);
338 else if (opc->value == 0xb200)
340 int_value = 0 - (128 - int_value);
341 func (stream, "#%d", int_value);
343 /* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8. */
344 else if ((opc->value == 0xc000) || (opc->value == 0xc800)
345 || (opc->value == 0xd000) || (opc->value == 0xd800)
346 || (opc->value == 0xd500) || (opc->value == 0xe800)
347 || (opc->value == 0xe900))
349 info->print_address_func (int_value + pc, info);
352 else if ((opc->value == 0xfc00) || (opc->value == 0xfc80))
354 func (stream, "#%d ! {$r6", int_value);
356 func (stream, "~$%s", keyword_gpr[push25gpr].name);
357 func (stream, ", $fp, $gp, $lp}");
359 else if (pfd->hw_res == HW_INT)
362 func (stream, "#%d", int_value);
364 func (stream, "#0x%x", int_value);
366 else /* if (pfd->hw_res == HW_UINT). */
369 func (stream, "#%u", int_value);
371 func (stream, "#0x%x", int_value);
377 else if (op == N32_OP6_AEXT)
379 nds32_parse_audio_ext (pfd, info, insn);
382 else if (pfd->hw_res < HW_INT)
385 __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
387 psys_reg = *(nds32_keyword_table[pfd->hw_res >> 8]
388 + (pfd->hw_res & 0xff));
390 psys_reg = nds32_find_reg_keyword (psys_reg, int_value);
391 /* For HW_SR, dump the index when it can't
392 map the register name. */
393 if (!psys_reg && pfd->hw_res == HW_SR)
394 func (stream, "%d", int_value);
396 func (stream, "???");
399 if (pfd->hw_res == HW_GPR || pfd->hw_res == HW_CPR
400 || pfd->hw_res == HW_FDR || pfd->hw_res == HW_FSR
401 || pfd->hw_res == HW_DXR || pfd->hw_res == HW_SR
402 || pfd->hw_res == HW_USR)
403 func (stream, "$%s", psys_reg->name);
404 else if (pfd->hw_res == HW_DTITON
405 || pfd->hw_res == HW_DTITOFF)
406 func (stream, ".%s", psys_reg->name);
408 func (stream, "%s", psys_reg->name);
411 else if ((pfd->hw_res == HW_INT) || (pfd->hw_res == HW_UINT))
413 if (pfd->hw_res == HW_INT)
415 N32_IMMS ((insn >> pfd->bitpos), pfd->bitsize) << pfd->shift;
418 __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
420 if ((op == N32_OP6_BR1) || (op == N32_OP6_BR2))
422 info->print_address_func (int_value + pc, info);
424 else if ((op == N32_OP6_BR3) && (pfd->bitpos == 0))
426 info->print_address_func (int_value + pc, info);
428 else if (op == N32_OP6_JI)
430 /* FIXME: Handle relocation. */
431 if (info->flags & INSN_HAS_RELOC)
433 info->print_address_func (int_value + pc, info);
435 else if (op == N32_OP6_LSMW)
437 /* lmw.adm/smw.adm. */
438 func (stream, "#0x%x ! {", int_value);
439 lsmwEnb4 = int_value;
440 lsmwRb = ((insn >> 20) & 0x1F);
441 lsmwRe = ((insn >> 10) & 0x1F);
443 /* If [Rb, Re] specifies at least one register,
444 Rb(4,0) <= Re(4,0) and 0 <= Rb(4,0), Re(4,0) < 28.
445 Disassembling does not consider this currently because of
446 the convience comparing with bsp320. */
447 if (lsmwRb != 31 || lsmwRe != 31)
449 func (stream, "$%s", keyword_gpr[lsmwRb].name);
450 if (lsmwRb != lsmwRe)
451 func (stream, "~$%s", keyword_gpr[lsmwRe].name);
456 /* $fp, $gp, $lp, $sp. */
458 for (i = 0; i < 4; i++)
460 if (lsmwEnb4 & checkbit)
465 func (stream, "$%s", keyword_gpr[28 + i].name);
468 func (stream, ", $%s", keyword_gpr[28 + i].name);
475 else if (pfd->hw_res == HW_INT)
478 func (stream, "#%d", int_value);
480 func (stream, "#0x%x", int_value);
482 else /* if (pfd->hw_res == HW_UINT). */
485 func (stream, "#%u", int_value);
487 func (stream, "#0x%x", int_value);
503 func (stream, " + ");
508 if (pstr_src[1] == '<')
510 func (stream, " << ");
521 func (stream, "%c", *pstr_src++);
527 /* Filter instructions with some bits must be fixed. */
530 nds32_filter_unknown_insn (uint32_t insn, struct nds32_opcode **opc)
535 switch ((*opc)->value)
540 if (__GF (insn, 6, 2) != 0 || __GF (insn, 15, 10) != 0)
544 if (__GF (insn, 7, 18) != 0)
549 if (__GF (insn, 5, 5) != 0)
553 if (__GF (insn, 20, 5) != 0)
557 if (__GF (insn, 5, 3) != 0 || __GF (insn, 15, 5) != 0)
579 if (__GF (insn, 5, 5) != 0)
585 if (__GF (insn, 5, 20) != 0)
592 print_insn32 (bfd_vma pc, disassemble_info *info, uint32_t insn,
595 /* Get the final correct opcode and parse. */
596 struct nds32_opcode *opc;
597 uint32_t opcode = nds32_mask_opcode (insn);
598 opc = (struct nds32_opcode *) htab_find (opcode_htab, &opcode);
600 nds32_special_opcode (insn, &opc);
601 nds32_filter_unknown_insn (insn, &opc);
602 nds32_parse_opcode (opc, pc, info, insn, parse_mode);
606 print_insn16 (bfd_vma pc, disassemble_info *info,
607 uint32_t insn, uint32_t parse_mode)
609 struct nds32_opcode *opc;
612 /* Get highest 7 bit in default. */
613 unsigned int mask = 0xfe00;
615 /* Classify 16-bit instruction to 4 sets by bit 13 and 14. */
616 switch (__GF (insn, 13, 2))
620 if (__GF (insn, 11, 2) == 0)
623 /* ifret16 = mov55 $sp, $sp*/
624 if (__GF (insn, 0, 11) == 0x3ff)
627 else if (__GF (insn, 9, 4) == 0xb)
632 if (__GF (insn, 11, 2) == 0x3)
637 /* Exclude beqz38, bnez38, beqs38, and bnes38. */
638 if (__GF (insn, 12, 1) == 0x1
639 && __GF (insn, 8, 3) == 0x5)
641 if (__GF (insn, 11, 1) == 0x0)
648 switch (__GF (insn, 11, 2))
652 if (__GF (insn, 9, 2) == 0x0)
655 else if (__GF(insn, 10, 1) == 0x1)
659 /* lwi37.sp swi37.sp */
663 if (__GF (insn, 8, 3) == 0x5)
665 else if (__GF (insn, 8, 3) == 0x4)
667 else if (__GF (insn, 9 , 2) == 0x3)
673 opcode = insn & mask;
674 opc = (struct nds32_opcode *) htab_find (opcode_htab, &opcode);
676 nds32_special_opcode (insn, &opc);
677 /* Get the final correct opcode and parse it. */
678 nds32_parse_opcode (opc, pc, info, insn, parse_mode);
682 htab_hash_hash (const void *p)
684 return (*(unsigned int *) p) % 49;
688 htab_hash_eq (const void *p, const void *q)
690 uint32_t pinsn = ((struct nds32_opcode *) p)->value;
691 uint32_t qinsn = *((uint32_t *) q);
693 return (pinsn == qinsn);
696 /* Get the format of instruction. */
699 nds32_mask_opcode (uint32_t insn)
701 uint32_t opcode = N32_OP6 (insn);
723 case N32_OP6_LBSI_BI:
724 case N32_OP6_LHSI_BI:
725 case N32_OP6_LWSI_BI:
737 return MASK_OP (insn, 0);
740 if (__GF (insn, 0, 7) == (N32_ALU2_FFBI | N32_BIT (6)))
741 return MASK_OP (insn, 0x7f);
742 else if (__GF (insn, 0, 7) == (N32_ALU2_MFUSR | N32_BIT (6))
743 || __GF (insn, 0, 7) == (N32_ALU2_MTUSR | N32_BIT (6)))
745 return MASK_OP (insn, 0xf81ff);
746 else if (__GF (insn, 0, 10) == (N32_ALU2_ONEOP | N32_BIT (7)))
749 if (__GF (insn, 12, 3) == 4)
750 return MASK_OP (insn, 0x73ff);
751 return MASK_OP (insn, 0x7fff);
753 return MASK_OP (insn, 0x3ff);
756 return MASK_OP (insn, 0x1f);
758 return MASK_OP (insn, 0xff);
760 return MASK_OP (insn, 0x7f);
762 return MASK_OP (insn, 0x23);
765 return MASK_OP (insn, 0x1 << 19);
767 if (__GF (insn, 18, 2) == 0x3)
768 return MASK_OP (insn, 0x7 << 17);
769 return MASK_OP (insn, 0x3 << 18);
771 return MASK_OP (insn, 0x1 << 24);
776 return MASK_OP (insn, 0x1 << 12);
778 return MASK_OP (insn, 0x1 << 24);
780 return MASK_OP (insn, 0x1 << 14);
782 if (__GF (insn, 16, 4) == 0)
783 return MASK_OP (insn, 0x1ff << 16);
785 return MASK_OP (insn, 0xf << 16);
787 return MASK_OP (insn, 0x1 << 19);
789 switch (__GF (insn, 0, 5))
792 /* SETGIE and SETEND */
793 if (__GF (insn, 5, 5) == 0x1 || __GF (insn, 5, 5) == 0x2)
794 return MASK_OP (insn, 0x1fffff);
795 return MASK_OP (insn, 0x1f);
797 if (__GF (insn, 5, 5) == 5 || __GF (insn, 5, 5) == 7)
799 return MASK_OP (insn, 0x3ff);
800 return MASK_OP (insn, 0x1f);
802 return MASK_OP (insn, 0x1f);
805 if (__GF (insn, 4, 2) == 0)
808 switch (__GF (insn, 0, 4))
812 /* FS1/F2OP FD1/F2OP */
813 if (__GF (insn, 6, 4) == 0xf)
814 return MASK_OP (insn, 0x7fff);
816 return MASK_OP (insn, 0x3ff);
820 return MASK_OP (insn, 0x3ff);
824 if (__GF (insn, 6, 4) == 0xc)
825 return MASK_OP (insn, 0x7fff);
827 return MASK_OP (insn, 0x3ff);
829 return MASK_OP (insn, 0xff);
832 else if (__GF (insn, 0, 2) == 0)
833 return MASK_OP (insn, 0xf);
834 return MASK_OP (insn, 0xcf);
837 switch (__GF (insn, 23, 2))
840 if (__GF (insn, 5, 4) == 0)
841 /* AMxxx AMAyyS AMyyS AMAWzS AMWzS */
842 return MASK_OP (insn, (0x1f << 20) | 0x1ff);
843 else if (__GF (insn, 5, 4) == 1)
844 /* ALR ASR ALA ASA AUPI */
845 return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
846 else if (__GF (insn, 20, 3) == 0 && __GF (insn, 6, 3) == 1)
848 return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
849 else if (__GF (insn, 20 ,3) == 2 && __GF (insn, 6, 3) == 1)
851 return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
852 else if (__GF (insn, 20 ,3) == 3 && __GF (insn, 6, 3) == 1)
853 /* AMTAR AMTAR2 AMFAR AMFAR2 */
854 return MASK_OP (insn, (0x1f << 20) | (0x1f << 5));
855 else if (__GF (insn, 7, 2) == 3)
857 return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
858 else if (__GF (insn, 6, 3) == 2)
860 return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
862 /* AmxxxL.l AmxxxL2.S AMxxxL2.L */
863 return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
865 if (__GF (insn, 20, 3) == 0)
867 return MASK_OP (insn, (0x1f << 20) | (0x1 << 5));
868 else if (__GF (insn, 20, 3) == 1)
869 /* AMTARI Ix AMTARI Mx */
870 return MASK_OP (insn, (0x1f << 20));
871 else if (__GF (insn, 6, 3) == 2)
872 /* AMAWzSl.S AMWzSl.S */
873 return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
874 else if (__GF (insn, 7, 2) == 3)
875 /* AMAWzSSA AMWzSSA */
876 return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
878 /* AMAWzSL.L AMAWzSL2.S AMAWzSL2.L
879 AMWzSL.L AMWzSL.L AMWzSL2.S */
880 return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
882 if (__GF (insn, 6, 3) == 2)
883 /* AMAyySl.S AMWyySl.S */
884 return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
885 else if (__GF (insn, 7, 2) == 3)
886 /* AMAWyySSA AMWyySSA */
887 return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
889 /* AMAWyySL.L AMAWyySL2.S AMAWyySL2.L
890 AMWyySL.L AMWyySL.L AMWyySL2.S */
891 return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
893 return MASK_OP (insn, 0x1f << 20);
899 /* Define cctl subtype. */
900 static char *cctl_subtype [] =
903 "st0", "st0", "st0", "st2", "st2", "st3", "st3", "st4",
904 "st1", "st1", "st1", "st0", "st0", NULL, NULL, "st5",
906 "st0", NULL, NULL, "st2", "st2", "st3", "st3", NULL,
907 "st1", NULL, NULL, "st0", "st0", NULL, NULL, NULL
910 /* Check the subset of opcode. */
913 nds32_special_opcode (uint32_t insn, struct nds32_opcode **opc)
921 /* Check if special case. */
922 switch ((*opc)->value)
928 case FPU_RA_IMMBI (LWC):
929 case FPU_RA_IMMBI (SWC):
930 case FPU_RA_IMMBI (LDC):
931 case FPU_RA_IMMBI (SDC):
932 /* Check if cp0 => FPU. */
933 if (__GF (insn, 13, 2) == 0)
935 while (!((*opc)->attr & ATTR (FPU)) && (*opc)->next)
944 /* Check if (add/add_slli) (sub/sub_slli) (and/and_slli). */
945 if (N32_SH5(insn) != 0)
950 if (__GF (insn, 10, 15) == 0)
954 string = cctl_subtype [__GF (insn, 5, 5)];
958 case JREG (JR) | JREG_RET:
959 if (__GF (insn, 8, 2) != 0)
966 if (__GF (insn, 0, 9) == 0)
973 while (strstr ((*opc)->opcode, string) == NULL
974 && strstr ((*opc)->instruction, string) == NULL && (*opc)->next)
979 /* Classify instruction is COP or FPU. */
981 if (op == N32_OP6_COP && __GF (insn, 4, 2) != 0)
983 while (((*opc)->attr & ATTR (FPU)) != 0 && (*opc)->next)
989 print_insn_nds32 (bfd_vma pc, disassemble_info *info)
993 bfd_byte buf_data[16];
998 int last_symbol_index = -1;
1000 int is_data = FALSE;
1001 bfd_boolean found = FALSE;
1002 struct nds32_private_data *private_data;
1003 unsigned int size = 16;
1004 enum map_type mapping_type = MAP_CODE;
1006 if (info->private_data == NULL)
1008 /* Note: remain lifecycle throughout whole execution. */
1009 static struct nds32_private_data private;
1010 private.has_mapping_symbols = -1; /* unknown yet. */
1011 private.last_symbol_index = -1;
1012 private.last_addr = 0;
1013 info->private_data = &private;
1015 private_data = info->private_data;
1017 if (info->symtab_size != 0)
1024 start = info->symtab_pos;
1025 if (start < private_data->last_symbol_index)
1026 start = private_data->last_symbol_index;
1032 if (private_data->has_mapping_symbols != 0
1033 && ((strncmp (".text", info->section->name, 5) == 0)))
1035 for (n = start; n < info->symtab_size; n++)
1037 addr = bfd_asymbol_value (info->symtab[n]);
1040 if (get_mapping_symbol_type (info, n, &mapping_type))
1042 last_symbol_index = n;
1048 private_data->has_mapping_symbols = 1;
1049 else if (!found && private_data->has_mapping_symbols == -1)
1051 /* Make sure there are no any mapping symbol. */
1052 for (n = 0; n < info->symtab_size; n++)
1054 if (is_mapping_symbol (info, n, &mapping_type))
1056 private_data->has_mapping_symbols = -1;
1060 if (private_data->has_mapping_symbols == -1)
1061 private_data->has_mapping_symbols = 0;
1064 private_data->last_symbol_index = last_symbol_index;
1065 private_data->last_mapping_type = mapping_type;
1066 is_data = (private_data->last_mapping_type == MAP_DATA0
1067 || private_data->last_mapping_type == MAP_DATA1
1068 || private_data->last_mapping_type == MAP_DATA2
1069 || private_data->last_mapping_type == MAP_DATA3
1070 || private_data->last_mapping_type == MAP_DATA4);
1074 /* Wonder data or instruction. */
1079 /* Fix corner case: there is no next mapping symbol,
1080 let mapping type decides size */
1081 if (last_symbol_index + 1 >= info->symtab_size)
1083 if (mapping_type == MAP_DATA0)
1085 if (mapping_type == MAP_DATA1)
1087 if (mapping_type == MAP_DATA2)
1089 if (mapping_type == MAP_DATA3)
1091 if (mapping_type == MAP_DATA4)
1094 for (n = last_symbol_index + 1; n < info->symtab_size; n++)
1096 addr = bfd_asymbol_value (info->symtab[n]);
1098 enum map_type fake_mapping_type;
1099 if (get_mapping_symbol_type (info, n, &fake_mapping_type)
1101 && ((info->section == NULL)
1102 || (info->section == info->symtab[n]->section)))
1103 && (addr - pc < size))
1111 size = (pc & 1) ? 1 : 2;
1113 /* Read bytes from BFD. */
1114 info->read_memory_func (pc, (bfd_byte *) buf_data, size, info);
1117 /* Start assembling data. */
1118 /* Little endian of data. */
1119 if (info->endian == BFD_ENDIAN_LITTLE)
1121 for (i1 = size - 1;; i1--)
1124 given1 = buf_data[i1] | (given1 << 8);
1126 given = buf_data[i1] | (given << 8);
1134 /* Big endian of data. */
1135 for (i1 = 0; i1 < size; i1++)
1138 given = buf_data[i1] | (given << 8);
1140 given1 = buf_data[i1] | (given1 << 8);
1144 info->bytes_per_line = 4;
1147 info->fprintf_func (info->stream, ".qword\t0x%016llx%016llx",
1150 info->fprintf_func (info->stream, ".dword\t0x%016llx", given);
1152 info->fprintf_func (info->stream, ".word\t0x%08llx", given);
1156 if (mapping_type == MAP_DATA0)
1157 info->fprintf_func (info->stream, ".byte\t0x%02llx", given & 0xFF);
1159 info->fprintf_func (info->stream, ".short\t0x%04llx", given);
1164 info->fprintf_func (info->stream, ".byte\t0x%02llx", given);
1170 status = info->read_memory_func (pc, (bfd_byte *) buf, 4, info);
1173 /* For the last 16-bit instruction. */
1174 status = info->read_memory_func (pc, (bfd_byte *) buf, 2, info);
1177 (*info->memory_error_func)(status, pc, info);
1182 insn = bfd_getb32 (buf);
1183 /* 16-bit instruction. */
1184 if (insn & 0x80000000)
1186 print_insn16 (pc, info, (insn >> 16), NDS32_PARSE_INSN16);
1190 /* 32-bit instructions. */
1193 print_insn32 (pc, info, insn, NDS32_PARSE_INSN32);
1198 /* Ignore disassembling unnecessary name. */
1201 nds32_symbol_is_valid (asymbol *sym,
1202 struct disassemble_info *info ATTRIBUTE_UNUSED)
1209 name = bfd_asymbol_name (sym);
1211 /* Mapping symbol is invalid. */
1218 nds32_add_opcode_hash_table (unsigned indx)
1222 opc = nds32_opcode_table[indx];
1226 while (opc->opcode != NULL)
1230 slot = (opcode_t **) htab_find_slot
1231 (opcode_htab, &opc->value, INSERT);
1234 /* This is the new one. */
1241 /* Already exists. Append to the list. */
1253 disassemble_init_nds32 (struct disassemble_info *info)
1255 static unsigned init_done = 0;
1258 /* Set up symbol checking function. */
1259 info->symbol_is_valid = nds32_symbol_is_valid;
1261 /* Only need to initialize once:
1262 High level will call this function for every object file.
1263 For example, when disassemble all members of a library. */
1267 /* Setup main core. */
1268 nds32_keyword_table[NDS32_MAIN_CORE] = &keywords[0];
1269 nds32_opcode_table[NDS32_MAIN_CORE] = &nds32_opcodes[0];
1270 nds32_field_table[NDS32_MAIN_CORE] = &operand_fields[0];
1272 /* Build opcode table. */
1273 opcode_htab = htab_create_alloc (1024, htab_hash_hash, htab_hash_eq,
1274 NULL, xcalloc, free);
1276 for (k = 0; k < NDS32_CORE_COUNT; k++)
1279 nds32_add_opcode_hash_table (k);
1286 is_mapping_symbol (struct disassemble_info *info, int n,
1287 enum map_type *map_type)
1289 const char *name = NULL;
1291 /* Get symbol name. */
1292 name = bfd_asymbol_name (info->symtab[n]);
1296 *map_type = MAP_CODE;
1299 else if (name[1] == 'd' && name[2] == '0')
1301 *map_type = MAP_DATA0;
1304 else if (name[1] == 'd' && name[2] == '1')
1306 *map_type = MAP_DATA1;
1309 else if (name[1] == 'd' && name[2] == '2')
1311 *map_type = MAP_DATA2;
1314 else if (name[1] == 'd' && name[2] == '3')
1316 *map_type = MAP_DATA3;
1319 else if (name[1] == 'd' && name[2] == '4')
1321 *map_type = MAP_DATA4;
1329 get_mapping_symbol_type (struct disassemble_info *info, int n,
1330 enum map_type *map_type)
1332 /* If the symbol is in a different section, ignore it. */
1333 if (info->section != NULL
1334 && info->section != info->symtab[n]->section)
1337 return is_mapping_symbol (info, n, map_type);