1 /* Instruction opcode header for mt.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
30 /* Check applicability of instructions against machines. */
31 #define CGEN_VALIDATE_INSN_SUPPORTED
33 /* Allows reason codes to be output when assembler errors occur. */
34 #define CGEN_VERBOSE_ASSEMBLER_ERRORS
36 /* Override disassembly hashing - there are variable bits in the top
37 byte of these instructions. */
38 #define CGEN_DIS_HASH_SIZE 8
39 #define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
41 #define CGEN_ASM_HASH_SIZE 127
42 #define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
44 extern unsigned int mt_asm_hash (const char *);
46 extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
50 /* Enum declaration for mt instruction types. */
51 typedef enum cgen_insn_type {
52 MT_INSN_INVALID, MT_INSN_ADD, MT_INSN_ADDU, MT_INSN_ADDI
53 , MT_INSN_ADDUI, MT_INSN_SUB, MT_INSN_SUBU, MT_INSN_SUBI
54 , MT_INSN_SUBUI, MT_INSN_MUL, MT_INSN_MULI, MT_INSN_AND
55 , MT_INSN_ANDI, MT_INSN_OR, MT_INSN_NOP, MT_INSN_ORI
56 , MT_INSN_XOR, MT_INSN_XORI, MT_INSN_NAND, MT_INSN_NANDI
57 , MT_INSN_NOR, MT_INSN_NORI, MT_INSN_XNOR, MT_INSN_XNORI
58 , MT_INSN_LDUI, MT_INSN_LSL, MT_INSN_LSLI, MT_INSN_LSR
59 , MT_INSN_LSRI, MT_INSN_ASR, MT_INSN_ASRI, MT_INSN_BRLT
60 , MT_INSN_BRLE, MT_INSN_BREQ, MT_INSN_BRNE, MT_INSN_JMP
61 , MT_INSN_JAL, MT_INSN_DBNZ, MT_INSN_EI, MT_INSN_DI
62 , MT_INSN_SI, MT_INSN_RETI, MT_INSN_LDW, MT_INSN_STW
63 , MT_INSN_BREAK, MT_INSN_IFLUSH, MT_INSN_LDCTXT, MT_INSN_LDFB
64 , MT_INSN_STFB, MT_INSN_FBCB, MT_INSN_MFBCB, MT_INSN_FBCCI
65 , MT_INSN_FBRCI, MT_INSN_FBCRI, MT_INSN_FBRRI, MT_INSN_MFBCCI
66 , MT_INSN_MFBRCI, MT_INSN_MFBCRI, MT_INSN_MFBRRI, MT_INSN_FBCBDR
67 , MT_INSN_RCFBCB, MT_INSN_MRCFBCB, MT_INSN_CBCAST, MT_INSN_DUPCBCAST
68 , MT_INSN_WFBI, MT_INSN_WFB, MT_INSN_RCRISC, MT_INSN_FBCBINC
69 , MT_INSN_RCXMODE, MT_INSN_INTERLEAVER, MT_INSN_WFBINC, MT_INSN_MWFBINC
70 , MT_INSN_WFBINCR, MT_INSN_MWFBINCR, MT_INSN_FBCBINCS, MT_INSN_MFBCBINCS
71 , MT_INSN_FBCBINCRS, MT_INSN_MFBCBINCRS, MT_INSN_LOOP, MT_INSN_LOOPI
72 , MT_INSN_DFBC, MT_INSN_DWFB, MT_INSN_FBWFB, MT_INSN_DFBR
75 /* Index of `invalid' insn place holder. */
76 #define CGEN_INSN_INVALID MT_INSN_INVALID
78 /* Total number of insns in table. */
79 #define MAX_INSNS ((int) MT_INSN_DFBR + 1)
81 /* This struct records data prior to insertion or after extraction. */
165 #define CGEN_INIT_PARSE(od) \
168 #define CGEN_INIT_INSERT(od) \
171 #define CGEN_INIT_EXTRACT(od) \
174 #define CGEN_INIT_PRINT(od) \
179 #endif /* MT_OPC_H */