opcodes/mips-opc.c

   1 /* mips.h.  Mips opcode list for GDB, the GNU debugger.
   2    Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
   3    Contributed by Ralph Campbell and OSF
   4    Commented and modified by Ian Lance Taylor, Cygnus Support
   5
   6 This file is part of GDB, GAS, and the GNU binutils.
   7
   8 GDB, GAS, and the GNU binutils are free software; you can redistribute
   9 them and/or modify them under the terms of the GNU General Public
  10 License as published by the Free Software Foundation; either version
  11 1, or (at your option) any later version.
  12
  13 GDB, GAS, and the GNU binutils are distributed in the hope that they
  14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  16 the GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with this file; see the file COPYING.  If not, write to the Free
  20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  21
  22 #include <stdio.h>
  23 #include "ansidecl.h"
  24 #include "opcode/mips.h"
  25
  26 /* Short hand so the lines aren't too long.  */
  27
  28 #define LDD     INSN_LOAD_MEMORY_DELAY
  29 #define LCD     INSN_LOAD_COPROC_DELAY
  30 #define UBD     INSN_UNCOND_BRANCH_DELAY
  31 #define CBD     INSN_COND_BRANCH_DELAY
  32 #define COD     INSN_COPROC_MOVE_DELAY
  33 #define CLD     INSN_COPROC_MEMORY_DELAY
  34 #define CBL     INSN_COND_BRANCH_LIKELY
  35 #define TRAP    INSN_TRAP
  36 #define SM      INSN_STORE_MEMORY
  37
  38 #define WR_d    INSN_WRITE_GPR_D
  39 #define WR_t    INSN_WRITE_GPR_T
  40 #define WR_31   INSN_WRITE_GPR_31
  41 #define WR_D    INSN_WRITE_FPR_D
  42 #define WR_T    INSN_WRITE_FPR_T
  43 #define WR_S    INSN_WRITE_FPR_S
  44 #define RD_s    INSN_READ_GPR_S
  45 #define RD_b    INSN_READ_GPR_S
  46 #define RD_t    INSN_READ_GPR_T
  47 #define RD_S    INSN_READ_FPR_S
  48 #define RD_T    INSN_READ_FPR_T
  49 #define RD_R    INSN_READ_FPR_R
  50 #define WR_CC   INSN_WRITE_COND_CODE
  51 #define RD_CC   INSN_READ_COND_CODE
  52 #define RD_C0   INSN_COP
  53 #define RD_C1   INSN_COP
  54 #define RD_C2   INSN_COP
  55 #define RD_C3   INSN_COP
  56 #define WR_C0   INSN_COP
  57 #define WR_C1   INSN_COP
  58 #define WR_C2   INSN_COP
  59 #define WR_C3   INSN_COP
  60
  61 #define WR_HI   INSN_WRITE_HI
  62 #define RD_HI   INSN_READ_HI
  63 #define MOD_HI  WR_HI|RD_HI
  64
  65 #define WR_LO   INSN_WRITE_LO
  66 #define RD_LO   INSN_READ_LO
  67 #define MOD_LO  WR_LO|RD_LO
  68
  69 #define WR_HILO WR_HI|WR_LO
  70 #define RD_HILO RD_HI|RD_LO
  71 #define MOD_HILO WR_HILO|RD_HILO
  72
  73 #define IS_M    INSN_MULT
  74
  75 #define I1      INSN_ISA1
  76 #define I2      INSN_ISA2
  77 #define I3      INSN_ISA3
  78 #define I4      INSN_ISA4
  79 #define P3      INSN_4650
  80 #define L1      INSN_4010
  81 #define V1      INSN_4100
  82 #define T3      INSN_3900
  83 /* start-sanitize-tx49 */
  84 #define T4      INSN_4900
  85 /* end-sanitize-tx49 */
  86 /* start-sanitize-vr4320 */
  87 #define N4      INSN_4320
  88 /* end-sanitize-vr4320 */
  89 /* start-sanitize-cygnus */
  90 #define N5      INSN_5400
  91 /* end-sanitize-cygnus */
  92 /* start-sanitize-r5900 */
  93 #define T5      INSN_5900
  94 /* end-sanitize-r5900 */
  95
  96 #define G1      (T3                   \
  97 /* start-sanitize-tx49 */             \
  98                  | T4                 \
  99 /* end-sanitize-tx49 */               \
 100 /* start-sanitize-r5900 */            \
 101                  | T5                 \
 102 /* end-sanitize-r5900 */              \
 103                  )
 104
 105 #define G2      (T3                   \
 106 /* start-sanitize-tx49 */             \
 107                  | T4                 \
 108 /* end-sanitize-tx49 */               \
 109                  )
 110
 111 #define G3 (I4             \
 112 /* start-sanitize-tx49 */  \
 113             | T4           \
 114 /* end-sanitize-tx49 */    \
 115 /* start-sanitize-r5900 */  \
 116             | T5           \
 117 /* end-sanitize-r5900 */    \
 118             )
 119
 120 /* The order of overloaded instructions matters.  Label arguments and
 121    register arguments look the same. Instructions that can have either
 122    for arguments must apear in the correct order in this table for the
 123    assembler to pick the right one. In other words, entries with
 124    immediate operands must apear after the same instruction with
 125    registers.
 126
 127    Many instructions are short hand for other instructions (i.e., The
 128    jal <register> instruction is short for jalr <register>).  */
 129
 130 const struct mips_opcode mips_builtin_opcodes[] = {
 131 /* These instructions appear first so that the disassembler will find
 132    them first.  The assemblers uses a hash table based on the
 133    instruction name anyhow.  */
 134 /* name,        args,   mask,           match,  pinfo */
 135 {"nop",     "",         0x00000000, 0xffffffff, 0,              I1      },
 136 {"li",      "t,j",      0x24000000, 0xffe00000, WR_t,           I1      }, /* addiu */
 137 {"li",      "t,i",      0x34000000, 0xffe00000, WR_t,           I1      }, /* ori */
 138 {"li",      "t,I",      0,    (int) M_LI,       INSN_MACRO,     I1      },
 139 {"move",    "d,s",      0x0000002d, 0xfc1f07ff, WR_d|RD_s,      I3      },/* daddu */
 140 {"move",    "d,s",      0x00000021, 0xfc1f07ff, WR_d|RD_s,      I1      },/* addu */
 141 {"move",    "d,s",      0x00000025, 0xfc1f07ff, WR_d|RD_s,      I1      },/* or */
 142 {"b",       "p",        0x10000000, 0xffff0000, UBD,            I1      },/* beq 0,0 */
 143 {"b",       "p",        0x04010000, 0xffff0000, UBD,            I1      },/* bgez 0 */
 144 {"bal",     "p",        0x04110000, 0xffff0000, UBD|WR_31,      I1      },/* bgezal 0*/
 145
 146 /* start-sanitize-r5900 */
 147 {"cfc2.ni",  "t,G",     0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1      },
 148 {"cfc2.i",   "t,G",     0x48400001, 0xffe007ff, LCD|WR_t|RD_C2, I1      },
 149 {"ctc2.ni",  "t,G",     0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1      },
 150 {"ctc2.i",   "t,G",     0x48c00001, 0xffe007ff, COD|RD_t|WR_CC, I1      },
 151 {"lqc2",     "1,o(b)",  0xd8000000, 0xfc000000, 0,              T5},
 152 {"qmfc2",    "t,2",     0x48200000, 0xffe007ff, 0,              T5},
 153 {"qmfc2.ni", "t,2",     0x48200000, 0xffe007ff, 0,              T5},
 154 {"qmfc2.i",  "t,2",     0x48200001, 0xffe007ff, 0,              T5},
 155 {"qmtc2",    "t,2",     0x48a00000, 0xffe007ff, 0,              T5},
 156 {"qmtc2.ni", "t,2",     0x48a00000, 0xffe007ff, 0,              T5},
 157 {"qmtc2.i", "t,2",      0x48a00001, 0xffe007ff, 0,              T5},
 158 {"sqc2",     "1,o(b)",  0xf8000000, 0xfc000000, 0,              T5},
 159 {"vabs",   "&1K,2K",    0x4a0001fd, 0xfe0007ff, 0,              T5},
 160 {"vadd",   "&3K,2K,1K", 0x4a000028, 0xfe00003f, 0,              T5},
 161 {"vaddi",  "&3K,2K,J",  0x4a000022, 0xfe1f003f, 0,              T5},
 162 {"vaddq",  "&3K,2K,Q",  0x4a000020, 0xfe1f003f, 0,              T5},
 163 {"vaddw",  "&3K,2K,1#w",        0x4a000003, 0xfe00003f, 0,              T5},
 164 {"vaddx",  "&3K,2K,1#x",        0x4a000000, 0xfe00003f, 0,              T5},
 165 {"vaddy",  "&3K,2K,1#y",        0x4a000001, 0xfe00003f, 0,              T5},
 166 {"vaddz",  "&3K,2K,1#z",        0x4a000002, 0xfe00003f, 0,              T5},
 167 {"vadda",  "&UK,1K,2K", 0x4a0002bc, 0xfe0007ff, 0,              T5},
 168 {"vaddai", "&UK,2K,J",  0x4a00023e, 0xfe1f07ff, 0,              T5},
 169 {"vaddaq", "&UK,2K,Q",  0x4a00023c, 0xfe1f07ff, 0,              T5},
 170 {"vaddaw", "&UK,2K,1#w",        0x4a00003f, 0xfe0007ff, 0,              T5},
 171 {"vaddax", "&UK,2K,1#x",        0x4a00003c, 0xfe0007ff, 0,              T5},
 172 {"vadday", "&UK,2K,1#y",        0x4a00003d, 0xfe0007ff, 0,              T5},
 173 {"vaddaz", "&UK,2K,1#z",        0x4a00003e, 0xfe0007ff, 0,              T5},
 174 {"vcallms","O",         0x4a000038, 0xffe0003f, 0,              T5},
 175 {"vcallmsr", "9",       0x4a00d839, 0xffffffff, 0,              T5},
 176 {"vclipw","&2K,1#w",    0x4a0001ff, 0xfe0007ff, 0,              T5},
 177 {"vdiv","Q,8,7",        0x4a0003bc, 0xfe0007ff, 0,              T5},
 178 {"vftoi0", "&1K,2K",    0x4a00017c, 0xfe0007ff, 0,              T5},
 179 {"vftoi4", "&1K,2K",    0x4a00017d, 0xfe0007ff, 0,              T5},
 180 {"vftoi12", "&1K,2K",   0x4a00017e, 0xfe0007ff, 0,              T5},
 181 {"vftoi15", "&1K,2K",   0x4a00017f, 0xfe0007ff, 0,              T5},
 182 {"viadd","6,5,4",       0x4a000030, 0xffe0003f, 0,              T5},
 183 {"viaddi","4,5,0",      0x4a000032, 0xffe0003f, 0,              T5},
 184 {"viand","6,5,4",       0x4a000034, 0xffe0003f, 0,              T5},
 185 {"vilwr.w",  "4,(5)",   0x4a2003fe, 0xffe007ff, 0,              T5},
 186 {"vilwr.x",  "4,(5)",   0x4b0003fe, 0xffe007ff, 0,              T5},
 187 {"vilwr.y",  "4,(5)",   0x4a8003fe, 0xffe007ff, 0,              T5},
 188 {"vilwr.z",  "4,(5)",   0x4a4003fe, 0xffe007ff, 0,              T5},
 189 {"vior","6,5,4",        0x4a000035, 0xffe0003f, 0,              T5},
 190 {"viswr.w",  "4,(5)",   0x4a2003ff, 0xffe007ff, 0,              T5},
 191 {"viswr.x",  "4,(5)",   0x4b0003ff, 0xffe007ff, 0,              T5},
 192 {"viswr.y",  "4,(5)",   0x4a8003ff, 0xffe007ff, 0,              T5},
 193 {"viswr.z",  "4,(5)",   0x4a4003ff, 0xffe007ff, 0,              T5},
 194 {"visub","6,5,4",       0x4a000031, 0xffe0003f, 0,              T5},
 195 {"vitof0", "&1K,2K",    0x4a00013c, 0xfe0007ff, 0,              T5},
 196 {"vitof4", "&1K,2K",    0x4a00013d, 0xfe0007ff, 0,              T5},
 197 {"vitof12", "&1K,2K",   0x4a00013e, 0xfe0007ff, 0,              T5},
 198 {"vitof15", "&1K,2K",   0x4a00013f, 0xfe0007ff, 0,              T5},
 199 {"vlqd",  "&1K,(--5)K", 0x4a00037e, 0xfe0007ff, 0,              T5},
 200 {"vlqi",  "&1K,(5++)K", 0x4a00037c, 0xfe0007ff, 0,              T5},
 201 {"vmadd", "&3K,2K,1K",  0x4a000029, 0xfe00003f, 0,              T5},
 202 {"vmaddi", "&3K,2K,J",  0x4a000023, 0xfe1f003f, 0,              T5},
 203 {"vmaddq", "&3K,2K,Q",  0x4a000021, 0xfe1f003f, 0,              T5},
 204 {"vmaddw", "&3K,2K,1#w",        0x4a00000b, 0xfe00003f, 0,              T5},
 205 {"vmaddx", "&3K,2K,1#x",        0x4a000008, 0xfe00003f, 0,              T5},
 206 {"vmaddy", "&3K,2K,1#y",        0x4a000009, 0xfe00003f, 0,              T5},
 207 {"vmaddz", "&3K,2K,1#z",        0x4a00000a, 0xfe00003f, 0,              T5},
 208 {"vmadda", "&UK,2K,1K", 0x4a0002bd, 0xfe0007ff, 0,              T5},
 209 {"vmaddai", "&UK,2K,J", 0x4a00023f, 0xfe1f07ff, 0,              T5},
 210 {"vmaddaq", "&UK,2K,Q", 0x4a00023d, 0xfe1f07ff, 0,              T5},
 211 {"vmaddaw", "&UK,2K,1#w",       0x4a0000bf, 0xfe0007ff, 0,              T5},
 212 {"vmaddax", "&UK,2K,1#x",       0x4a0000bc, 0xfe0007ff, 0,              T5},
 213 {"vmadday", "&UK,2K,1#y",       0x4a0000bd, 0xfe0007ff, 0,              T5},
 214 {"vmaddaz", "&UK,2K,1#z",       0x4a0000be, 0xfe0007ff, 0,              T5},
 215 {"vmax",    "&3K,2K,1K",        0x4a00002b, 0xfe00003f, 0,              T5},
 216 {"vmaxi",   "&3K,2K,J", 0x4a00001d, 0xfe1f003f, 0,              T5},
 217 {"vmaxw",   "&3K,2K,1#w",       0x4a000013, 0xfe00003f, 0,              T5},
 218 {"vmaxx",   "&3K,2K,1#x",       0x4a000010, 0xfe00003f, 0,              T5},
 219 {"vmaxy",   "&3K,2K,1#y",       0x4a000011, 0xfe00003f, 0,              T5},
 220 {"vmaxz",   "&3K,2K,1#z",       0x4a000012, 0xfe00003f, 0,              T5},
 221 {"vmfir",   "&1K,5",    0x4a0003fd, 0xfe0007ff, 0,              T5},
 222 {"vmini",   "&3K,2K,1K",        0x4a00002f, 0xfe00003f, 0,              T5},
 223 {"vminii",  "&3K,2K,J", 0x4a00001f, 0xfe1f003f, 0,              T5},
 224 {"vminiw",  "&3K,2K,1#w",       0x4a000017, 0xfe00003f, 0,              T5},
 225 {"vminix",  "&3K,2K,1#x",       0x4a000014, 0xfe00003f, 0,              T5},
 226 {"vminiy",  "&3K,2K,1#y",       0x4a000015, 0xfe00003f, 0,              T5},
 227 {"vminiz",  "&3K,2K,1#z",       0x4a000016, 0xfe00003f, 0,              T5},
 228 {"vmove",   "&1K,2K",   0x4a00033c, 0xfe0007ff, 0,              T5},
 229 {"vmr32",   "&1K,2K",   0x4a00033d, 0xfe0007ff, 0,              T5},
 230 {"vmsub",   "&3K,2K,1K",        0x4a00002d, 0xfe00003f, 0,              T5},
 231 {"vmsubi",  "&3K,2K,J", 0x4a000027, 0xfe1f003f, 0,              T5},
 232 {"vmsubq",  "&3K,2K,Q", 0x4a000025, 0xfe1f003f, 0,              T5},
 233 {"vmsubw",  "&3K,2K,1#w",       0x4a00000f, 0xfe00003f, 0,              T5},
 234 {"vmsubx",  "&3K,2K,1#x",       0x4a00000c, 0xfe00003f, 0,              T5},
 235 {"vmsuby",  "&3K,2K,1#y",       0x4a00000d, 0xfe00003f, 0,              T5},
 236 {"vmsubz",  "&3K,2K,1#z",       0x4a00000e, 0xfe00003f, 0,              T5},
 237 {"vmsuba",  "&UK,1K,2K",        0x4a0002fd, 0xfe0007ff, 0,              T5},
 238 {"vmsubai", "&UK,2K,J", 0x4a00027f, 0xfe1f07ff, 0,              T5},
 239 {"vmsubaq", "&UK,2K,Q", 0x4a00027d, 0xfe1f07ff, 0,              T5},
 240 {"vmsubaw", "&UK,2K,1#w",       0x4a0000ff, 0xfe0007ff, 0,              T5},
 241 {"vmsubax", "&UK,2K,1#x",       0x4a0000fc, 0xfe0007ff, 0,              T5},
 242 {"vmsubay", "&UK,2K,1#y",       0x4a0000fd, 0xfe0007ff, 0,              T5},
 243 {"vmsubaz", "&UK,2K,1#z",       0x4a0000fe, 0xfe0007ff, 0,              T5},
 244 {"vmtir",   "&4,2K",    0x4a0003fc, 0xfe0007ff, 0,              T5},
 245 {"vmul",    "&3K,2K,1K",        0x4a00002a, 0xfe00003f, 0,              T5},
 246 {"vmuli",   "&3K,2K,J", 0x4a00001e, 0xfe1f003f, 0,              T5},
 247 {"vmulq",   "&3K,2K,Q", 0x4a00001c, 0xfe1f003f, 0,              T5},
 248 {"vmulw",   "&3K,2K,1#w",       0x4a00001b, 0xfe00003f, 0,              T5},
 249 {"vmulx",   "&3K,2K,1#x",       0x4a000018, 0xfe00003f, 0,              T5},
 250 {"vmuly",   "&3K,2K,1#y",       0x4a000019, 0xfe00003f, 0,              T5},
 251 {"vmulz",   "&3K,2K,1#z",       0x4a00001a, 0xfe00003f, 0,              T5},
 252 {"vmula",   "&UK,2K,1K",        0x4a0002be, 0xfe0007ff, 0,              T5},
 253 {"vmulai",  "&UK,2K,J", 0x4a0001fe, 0xfe1f07ff, 0,              T5},
 254 {"vmulaq",  "&UK,2K,Q", 0x4a0001fc, 0xfe1f07ff, 0,              T5},
 255 {"vmulaw",  "&UK,2K,1#w",       0x4a0001bf, 0xfe0007ff, 0,              T5},
 256 {"vmulax",  "&UK,2K,1#x",       0x4a0001bc, 0xfe0007ff, 0,              T5},
 257 {"vmulay",  "&UK,2K,1#y",       0x4a0001bd, 0xfe0007ff, 0,              T5},
 258 {"vmulaz",  "&UK,2K,1#z",       0x4a0001be, 0xfe0007ff, 0,              T5},
 259 {"vnop","",             0x4a0002ff, 0xffffffff, 0,              T5},
 260 {"vopmula", ";UK,2K,1K", 0x4bc002fe, 0xffe007ff,        0,      T5},
 261 {"vopmsub", ";3K,2K,1K", 0x4bc0002e, 0xffe0003f,        0,      T5},
 262 {"vrget",  "&1K,X",     0x4a00043d, 0xfe00ffff, 0,              T5},
 263 {"vrinit", "X,8",       0x4a00043e, 0xff9f07ff, 0,              T5},
 264 {"vrnext", "&1K,X",     0x4a00043c, 0xfe00ffff, 0,              T5},
 265 {"vrsqrt","Q,8,7",      0x4a0003be, 0xfe0007ff, 0,              T5},
 266 {"vrxor", "X,8",        0x4a00043f, 0xff9f07ff, 0,              T5},
 267 {"vsqd",  "&2K,(--4)K", 0x4a00037f, 0xfe0007ff, 0,              T5},
 268 {"vsqi",  "&2K,(4++)K", 0x4a00037d, 0xfe0007ff, 0,              T5},
 269 {"vsqrt", "Q,7",        0x4a2003bd, 0xfe60ffff, 0,              T5},
 270 {"vsub",  "&3K,2K,1K",  0x4a00002c, 0xfe00003f, 0,              T5},
 271 {"vsubi", "&3K,2K,J",   0x4a000026, 0xfe1f003f, 0,              T5},
 272 {"vsubq", "&3K,2K,Q",   0x4a000024, 0xfe1f003f, 0,              T5},
 273 {"vsubw", "&3K,2K,1#w", 0x4a000007, 0xfe00003f, 0,              T5},
 274 {"vsubx", "&3K,2K,1#x", 0x4a000004, 0xfe00003f, 0,              T5},
 275 {"vsuby", "&3K,2K,1#y", 0x4a000005, 0xfe00003f, 0,              T5},
 276 {"vsubz", "&3K,2K,1#z", 0x4a000006, 0xfe00003f, 0,              T5},
 277 {"vsuba", "&UK,2K,1K",  0x4a0002fc, 0xfe0007ff, 0,              T5},
 278 {"vsubai", "&UK,2K,J",  0x4a00027e, 0xfe1f07ff, 0,              T5},
 279 {"vsubaq", "&UK,2K,Q",  0x4a00027c, 0xfe1f07ff, 0,              T5},
 280 {"vsubaw", "&UK,2K,1#w",        0x4a00007f, 0xfe0007ff, 0,              T5},
 281 {"vsubax", "&UK,2K,1#x",        0x4a00007c, 0xfe0007ff, 0,              T5},
 282 {"vsubay", "&UK,2K,1#y",        0x4a00007d, 0xfe0007ff, 0,              T5},
 283 {"vsubaz", "&UK,2K,1#z",        0x4a00007e, 0xfe0007ff, 0,              T5},
 284 {"vwaitq","",           0x4a0003bf, 0xffffffff, 0,              T5},
 285
 286 /* end-sanitize-r5900 */
 287 {"abs",     "d,v",      0,    (int) M_ABS,      INSN_MACRO,     I1      },
 288 {"abs.s",   "D,V",      0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1      },
 289 {"abs.d",   "D,V",      0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1      },
 290 {"add",     "d,v,t",    0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
 291 {"add",     "t,r,I",    0,    (int) M_ADD_I,    INSN_MACRO,     I1      },
 292 {"add.s",   "D,V,T",    0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    I1},
 293 {"add.d",   "D,V,T",    0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    I1},
 294 {"addi",    "t,r,j",    0x20000000, 0xfc000000, WR_t|RD_s,      I1      },
 295 {"addiu",   "t,r,j",    0x24000000, 0xfc000000, WR_t|RD_s,      I1      },
 296 {"addu",    "d,v,t",    0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
 297 {"addu",    "t,r,I",    0,    (int) M_ADDU_I,   INSN_MACRO,     I1      },
 298 {"and",     "d,v,t",    0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
 299 {"and",     "t,r,I",    0,    (int) M_AND_I,    INSN_MACRO,     I1      },
 300 {"andi",    "t,r,i",    0x30000000, 0xfc000000, WR_t|RD_s,      I1      },
 301 /* b is at the top of the table.  */
 302 /* bal is at the top of the table.  */
 303 {"bc0f",    "p",        0x41000000, 0xffff0000, CBD|RD_CC,      I1      },
 304 {"bc0fl",   "p",        0x41020000, 0xffff0000, CBL|RD_CC,      I2|T3   },
 305 {"bc1f",    "p",        0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1      },
 306 {"bc1f",    "N,p",      0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4      },
 307 {"bc1fl",   "p",        0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3   },
 308 {"bc1fl",   "N,p",      0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4      },
 309 {"bc2f",    "p",        0x49000000, 0xffff0000, CBD|RD_CC,      I1      },
 310 {"bc2fl",   "p",        0x49020000, 0xffff0000, CBL|RD_CC,      I2|T3   },
 311 {"bc3f",    "p",        0x4d000000, 0xffff0000, CBD|RD_CC,      I1      },
 312 {"bc3fl",   "p",        0x4d020000, 0xffff0000, CBL|RD_CC,      I2|T3   },
 313 {"bc0t",    "p",        0x41010000, 0xffff0000, CBD|RD_CC,      I1      },
 314 {"bc0tl",   "p",        0x41030000, 0xffff0000, CBL|RD_CC,      I2|T3   },
 315 {"bc1t",    "p",        0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1      },
 316 {"bc1t",    "N,p",      0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4      },
 317 {"bc1tl",   "p",        0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3   },
 318 {"bc1tl",   "N,p",      0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4      },
 319 {"bc2t",    "p",        0x49010000, 0xffff0000, CBD|RD_CC,      I1      },
 320 {"bc2tl",   "p",        0x49030000, 0xffff0000, CBL|RD_CC,      I2|T3   },
 321 {"bc3t",    "p",        0x4d010000, 0xffff0000, CBD|RD_CC,      I1      },
 322 {"bc3tl",   "p",        0x4d030000, 0xffff0000, CBL|RD_CC,      I2|T3   },
 323 {"beqz",    "s,p",      0x10000000, 0xfc1f0000, CBD|RD_s,       I1      },
 324 {"beqzl",   "s,p",      0x50000000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 325 {"beq",     "s,t,p",    0x10000000, 0xfc000000, CBD|RD_s|RD_t,  I1      },
 326 {"beq",     "s,I,p",    0,    (int) M_BEQ_I,    INSN_MACRO,     I1      },
 327 {"beql",    "s,t,p",    0x50000000, 0xfc000000, CBL|RD_s|RD_t,  I2|T3   },
 328 {"beql",    "s,I,p",    0,    (int) M_BEQL_I,   INSN_MACRO,     I2      },
 329 {"bge",     "s,t,p",    0,    (int) M_BGE,      INSN_MACRO,     I1      },
 330 {"bge",     "s,I,p",    0,    (int) M_BGE_I,    INSN_MACRO,     I1      },
 331 {"bgel",    "s,t,p",    0,    (int) M_BGEL,     INSN_MACRO,     I2      },
 332 {"bgel",    "s,I,p",    0,    (int) M_BGEL_I,   INSN_MACRO,     I2      },
 333 {"bgeu",    "s,t,p",    0,    (int) M_BGEU,     INSN_MACRO,     I1      },
 334 {"bgeu",    "s,I,p",    0,    (int) M_BGEU_I,   INSN_MACRO,     I1      },
 335 {"bgeul",   "s,t,p",    0,    (int) M_BGEUL,    INSN_MACRO,     I2      },
 336 {"bgeul",   "s,I,p",    0,    (int) M_BGEUL_I,  INSN_MACRO,     I2      },
 337 {"bgez",    "s,p",      0x04010000, 0xfc1f0000, CBD|RD_s,       I1      },
 338 {"bgezl",   "s,p",      0x04030000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 339 {"bgezal",  "s,p",      0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1      },
 340 {"bgezall", "s,p",      0x04130000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 341 {"bgt",     "s,t,p",    0,    (int) M_BGT,      INSN_MACRO,     I1      },
 342 {"bgt",     "s,I,p",    0,    (int) M_BGT_I,    INSN_MACRO,     I1      },
 343 {"bgtl",    "s,t,p",    0,    (int) M_BGTL,     INSN_MACRO,     I2      },
 344 {"bgtl",    "s,I,p",    0,    (int) M_BGTL_I,   INSN_MACRO,     I2      },
 345 {"bgtu",    "s,t,p",    0,    (int) M_BGTU,     INSN_MACRO,     I1      },
 346 {"bgtu",    "s,I,p",    0,    (int) M_BGTU_I,   INSN_MACRO,     I1      },
 347 {"bgtul",   "s,t,p",    0,    (int) M_BGTUL,    INSN_MACRO,     I2      },
 348 {"bgtul",   "s,I,p",    0,    (int) M_BGTUL_I,  INSN_MACRO,     I2      },
 349 {"bgtz",    "s,p",      0x1c000000, 0xfc1f0000, CBD|RD_s,       I1      },
 350 {"bgtzl",   "s,p",      0x5c000000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 351 {"ble",     "s,t,p",    0,    (int) M_BLE,      INSN_MACRO,     I1      },
 352 {"ble",     "s,I,p",    0,    (int) M_BLE_I,    INSN_MACRO,     I1      },
 353 {"blel",    "s,t,p",    0,    (int) M_BLEL,     INSN_MACRO,     I2      },
 354 {"blel",    "s,I,p",    0,    (int) M_BLEL_I,   INSN_MACRO,     I2      },
 355 {"bleu",    "s,t,p",    0,    (int) M_BLEU,     INSN_MACRO,     I1      },
 356 {"bleu",    "s,I,p",    0,    (int) M_BLEU_I,   INSN_MACRO,     I1      },
 357 {"bleul",   "s,t,p",    0,    (int) M_BLEUL,    INSN_MACRO,     I2      },
 358 {"bleul",   "s,I,p",    0,    (int) M_BLEUL_I,  INSN_MACRO,     I2      },
 359 {"blez",    "s,p",      0x18000000, 0xfc1f0000, CBD|RD_s,       I1      },
 360 {"blezl",   "s,p",      0x58000000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 361 {"blt",     "s,t,p",    0,    (int) M_BLT,      INSN_MACRO,     I1      },
 362 {"blt",     "s,I,p",    0,    (int) M_BLT_I,    INSN_MACRO,     I1      },
 363 {"bltl",    "s,t,p",    0,    (int) M_BLTL,     INSN_MACRO,     I2      },
 364 {"bltl",    "s,I,p",    0,    (int) M_BLTL_I,   INSN_MACRO,     I2      },
 365 {"bltu",    "s,t,p",    0,    (int) M_BLTU,     INSN_MACRO,     I1      },
 366 {"bltu",    "s,I,p",    0,    (int) M_BLTU_I,   INSN_MACRO,     I1      },
 367 {"bltul",   "s,t,p",    0,    (int) M_BLTUL,    INSN_MACRO,     I2      },
 368 {"bltul",   "s,I,p",    0,    (int) M_BLTUL_I,  INSN_MACRO,     I2      },
 369 {"bltz",    "s,p",      0x04000000, 0xfc1f0000, CBD|RD_s,       I1      },
 370 {"bltzl",   "s,p",      0x04020000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 371 {"bltzal",  "s,p",      0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1      },
 372 {"bltzall", "s,p",      0x04120000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 373 {"bnez",    "s,p",      0x14000000, 0xfc1f0000, CBD|RD_s,       I1      },
 374 {"bnezl",   "s,p",      0x54000000, 0xfc1f0000, CBL|RD_s,       I2|T3   },
 375 {"bne",     "s,t,p",    0x14000000, 0xfc000000, CBD|RD_s|RD_t,  I1      },
 376 {"bne",     "s,I,p",    0,    (int) M_BNE_I,    INSN_MACRO,     I1      },
 377 {"bnel",    "s,t,p",    0x54000000, 0xfc000000, CBL|RD_s|RD_t,  I2|T3   },
 378 {"bnel",    "s,I,p",    0,    (int) M_BNEL_I,   INSN_MACRO,     I2      },
 379 {"break",   "",         0x0000000d, 0xffffffff, TRAP,           I1      },
 380 /* start-sanitize-r5900 */
 381 {"break",   "B",        0x0000000d, 0xfc00003f, TRAP,           T5      },
 382 /* end-sanitize-r5900 */
 383 {"break",   "c",        0x0000000d, 0xfc00ffff, TRAP,           I1      },
 384 {"break",   "c,q",      0x0000000d, 0xfc00003f, TRAP,           I1      },
 385 {"c.f.d",   "S,T",      0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 386 {"c.f.d",   "M,S,T",    0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 387 {"c.f.s",   "S,T",      0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 388 {"c.f.s",   "M,S,T",    0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 389 {"c.un.d",  "S,T",      0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 390 {"c.un.d",  "M,S,T",    0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 391 {"c.un.s",  "S,T",      0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 392 {"c.un.s",  "M,S,T",    0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 393 {"c.eq.d",  "S,T",      0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 394 {"c.eq.d",  "M,S,T",    0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 395 {"c.eq.s",  "S,T",      0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 396 {"c.eq.s",  "M,S,T",    0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 397 {"c.ueq.d", "S,T",      0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 398 {"c.ueq.d", "M,S,T",    0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 399 {"c.ueq.s", "S,T",      0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 400 {"c.ueq.s", "M,S,T",    0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 401 {"c.olt.d", "S,T",      0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 402 {"c.olt.d", "M,S,T",    0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 403 {"c.olt.s", "S,T",      0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 404 {"c.olt.s", "M,S,T",    0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 405 {"c.ult.d", "S,T",      0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 406 {"c.ult.d", "M,S,T",    0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 407 {"c.ult.s", "S,T",      0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 408 {"c.ult.s", "M,S,T",    0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 409 {"c.ole.d", "S,T",      0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 410 {"c.ole.d", "M,S,T",    0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 411 {"c.ole.s", "S,T",      0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 412 {"c.ole.s", "M,S,T",    0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 413 {"c.ule.d", "S,T",      0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 414 {"c.ule.d", "M,S,T",    0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 415 {"c.ule.s", "S,T",      0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 416 {"c.ule.s", "M,S,T",    0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 417 {"c.sf.d",  "S,T",      0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 418 {"c.sf.d",  "M,S,T",    0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 419 {"c.sf.s",  "S,T",      0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 420 {"c.sf.s",  "M,S,T",    0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 421 {"c.ngle.d","S,T",      0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 422 {"c.ngle.d","M,S,T",    0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 423 {"c.ngle.s","S,T",      0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 424 {"c.ngle.s","M,S,T",    0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 425 {"c.seq.d", "S,T",      0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 426 {"c.seq.d", "M,S,T",    0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 427 {"c.seq.s", "S,T",      0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 428 {"c.seq.s", "M,S,T",    0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 429 {"c.ngl.d", "S,T",      0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 430 {"c.ngl.d", "M,S,T",    0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 431 {"c.ngl.s", "S,T",      0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 432 {"c.ngl.s", "M,S,T",    0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 433 {"c.lt.d",  "S,T",      0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 434 {"c.lt.d",  "M,S,T",    0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 435 {"c.lt.s",  "S,T",      0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 436 {"c.lt.s",  "M,S,T",    0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 437 {"c.nge.d", "S,T",      0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 438 {"c.nge.d", "M,S,T",    0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 439 {"c.nge.s", "S,T",      0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 440 {"c.nge.s", "M,S,T",    0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 441 {"c.le.d",  "S,T",      0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 442 {"c.le.d",  "M,S,T",    0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 443 {"c.le.s",  "S,T",      0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 444 {"c.le.s",  "M,S,T",    0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 445 {"c.ngt.d", "S,T",      0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
 446 {"c.ngt.d", "M,S,T",    0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4      },
 447 {"c.ngt.s", "S,T",      0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
 448 {"c.ngt.s", "M,S,T",    0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4      },
 449 {"cache",   "k,o(b)",   0xbc000000, 0xfc000000, RD_b,           I3|T3   },
 450 {"ceil.l.d", "D,S",     0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3      },
 451 {"ceil.l.s", "D,S",     0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3      },
 452 {"ceil.w.d", "D,S",     0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2      },
 453 {"ceil.w.s", "D,S",     0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2      },
 454 {"cfc0",    "t,G",      0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1      },
 455 {"cfc1",    "t,G",      0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S,    I1      },
 456 {"cfc1",    "t,S",      0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S,    I1      },
 457 {"cfc2",    "t,G",      0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1      },
 458 {"cfc3",    "t,G",      0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1      },
 459   /* start-sanitize-vr4320 */
 460 {"clz",    "d,s",       0x00000035, 0xfc1f07ff, WR_d|RD_s,      N4      },
 461   /* end-sanitize-vr4320 */
 462 {"ctc0",    "t,G",      0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1      },
 463 {"ctc1",    "t,G",      0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S,    I1      },
 464 {"ctc1",    "t,S",      0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S,    I1      },
 465 {"ctc2",    "t,G",      0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1      },
 466 {"ctc3",    "t,G",      0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1      },
 467 {"cvt.d.l", "D,S",      0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3      },
 468 {"cvt.d.s", "D,S",      0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S,    I1      },
 469 {"cvt.d.w", "D,S",      0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1      },
 470 {"cvt.l.d", "D,S",      0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3      },
 471 {"cvt.l.s", "D,S",      0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3      },
 472 {"cvt.s.l", "D,S",      0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3      },
 473 {"cvt.s.d", "D,S",      0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    I1      },
 474 {"cvt.s.w", "D,S",      0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1      },
 475 {"cvt.w.d", "D,S",      0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1      },
 476 {"cvt.w.s", "D,S",      0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1      },
 477 {"dabs",    "d,v",      0,    (int) M_DABS,     INSN_MACRO,     I3      },
 478 {"dadd",    "d,v,t",    0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3      },
 479 {"dadd",    "t,r,I",    0,    (int) M_DADD_I,   INSN_MACRO,     I3      },
 480 {"daddi",   "t,r,j",    0x60000000, 0xfc000000, WR_t|RD_s,      I3      },
 481 {"daddiu",  "t,r,j",    0x64000000, 0xfc000000, WR_t|RD_s,      I3      },
 482 {"daddu",   "d,v,t",    0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3      },
 483 {"daddu",   "t,r,I",    0,    (int) M_DADDU_I,  INSN_MACRO,     I3      },
 484   /* start-sanitize-cygnus */
 485 {"dbreak",  "",         0x7000003f, 0xffffffff, 0,      N5      },
 486   /* end-sanitize-cygnus */
 487   /* start-sanitize-vr4320 */
 488 {"dclz",    "d,s",      0x0000003D, 0xfc1f07ff, WR_d|RD_s,      N4      },
 489   /* end-sanitize-vr4320 */
 490 /* dctr and dctw are used on the r5000.  */
 491 {"dctr",    "o(b)",     0xbc050000, 0xfc1f0000, RD_b,   I3      },
 492 {"dctw",    "o(b)",     0xbc090000, 0xfc1f0000, RD_b,   I3      },
 493 {"deret",   "",         0x4200001f, 0xffffffff,    0,   G2      },
 494 /* For ddiv, see the comments about div.  */
 495 {"ddiv",    "z,s,t",    0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
 496 {"ddiv",    "d,v,t",    0,    (int) M_DDIV_3,   INSN_MACRO,     I3      },
 497 {"ddiv",    "d,v,I",    0,    (int) M_DDIV_3I,  INSN_MACRO,     I3      },
 498 /* For ddivu, see the comments about div.  */
 499 {"ddivu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
 500 {"ddivu",   "d,v,t",    0,    (int) M_DDIVU_3,  INSN_MACRO,     I3      },
 501 {"ddivu",   "d,v,I",    0,    (int) M_DDIVU_3I, INSN_MACRO,     I3      },
 502 /* The MIPS assembler treats the div opcode with two operands as
 503    though the first operand appeared twice (the first operand is both
 504    a source and a destination).  To get the div machine instruction,
 505    you must use an explicit destination of $0.  */
 506 {"div",     "z,s,t",    0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I1      },
 507 {"div",     "z,t",      0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO,  I1      },
 508 {"div",     "d,v,t",    0,    (int) M_DIV_3,    INSN_MACRO,     I1      },
 509 {"div",     "d,v,I",    0,    (int) M_DIV_3I,   INSN_MACRO,     I1      },
 510   /* start-sanitize-r5900 */
 511 {"div1",    "s,t",      0x7000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  T5      },
 512   /* end-sanitize-r5900 */
 513 {"div.d",   "D,V,T",    0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    I1      },
 514 {"div.s",   "D,V,T",    0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    I1      },
 515 /* For divu, see the comments about div.  */
 516 {"divu",    "z,s,t",    0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I1      },
 517 {"divu",    "z,t",      0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO,  I1      },
 518 {"divu",    "d,v,t",    0,    (int) M_DIVU_3,   INSN_MACRO,     I1      },
 519 {"divu",    "d,v,I",    0,    (int) M_DIVU_3I,  INSN_MACRO,     I1      },
 520   /* start-sanitize-r5900 */
 521 {"divu1",   "s,t",      0x7000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  T5      },
 522   /* end-sanitize-r5900 */
 523 {"dla",     "t,A(b)",   0,    (int) M_DLA_AB,   INSN_MACRO,     I3      },
 524 {"dli",     "t,j",      0x24000000, 0xffe00000, WR_t,   I3      }, /* addiu */
 525 {"dli",     "t,i",      0x34000000, 0xffe00000, WR_t,   I3      }, /* ori */
 526 {"dli",     "t,I",      0,    (int) M_DLI,      INSN_MACRO,     I3      },
 527 {"dmadd16", "s,t",      0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO,  V1      },
 528 {"dmfc0",   "t,G",      0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3      },
 529 {"dmtc0",   "t,G",      0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC,   I3      },
 530 {"dmfc1",   "t,S",      0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     I3      },
 531 {"dmtc1",   "t,S",      0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     I3      },
 532 {"dmul",    "d,v,t",    0,    (int) M_DMUL,     INSN_MACRO,     I3      },
 533 {"dmul",    "d,v,I",    0,    (int) M_DMUL_I,   INSN_MACRO,     I3      },
 534 {"dmulo",   "d,v,t",    0,    (int) M_DMULO,    INSN_MACRO,     I3      },
 535 {"dmulo",   "d,v,I",    0,    (int) M_DMULO_I,  INSN_MACRO,     I3      },
 536 {"dmulou",  "d,v,t",    0,    (int) M_DMULOU,   INSN_MACRO,     I3      },
 537 {"dmulou",  "d,v,I",    0,    (int) M_DMULOU_I, INSN_MACRO,     I3      },
 538 {"dmult",   "s,t",      0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,      I3},
 539   /* start-sanitize-tx49 */
 540 {"dmult",   "d,s,t",    0x0000001c, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
 541   /* end-sanitize-tx49 */
 542 {"dmultu",  "s,t",      0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,      I3},
 543   /* start-sanitize-tx49 */
 544 {"dmultu",  "d,s,t",    0x0000001d, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
 545   /* end-sanitize-tx49 */
 546 {"dneg",    "d,w",      0x0000002e, 0xffe007ff, WR_d|RD_t,      I3      }, /* dsub 0 */
 547 {"dnegu",   "d,w",      0x0000002f, 0xffe007ff, WR_d|RD_t,      I3      }, /* dsubu 0*/
 548 {"drem",    "z,s,t",    0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
 549 {"drem",    "d,v,t",    3,    (int) M_DREM_3,   INSN_MACRO,     I3      },
 550 {"drem",    "d,v,I",    3,    (int) M_DREM_3I,  INSN_MACRO,     I3      },
 551 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
 552 {"dremu",   "d,v,t",    3,    (int) M_DREMU_3,  INSN_MACRO,     I3      },
 553 {"dremu",   "d,v,I",    3,    (int) M_DREMU_3I, INSN_MACRO,     I3      },
 554   /* start-sanitize-cygnus */
 555 {"dret",    "",         0x7000003e, 0xffffffff, 0,      N5      },
 556 {"drorv",   "d,t,s",    0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5      },
 557 {"dror32",  "d,w,<",    0x0020003e, 0xffe0003f, WR_d|RD_t,      N5      },
 558 {"dror",    "d,w,>",    0x0020003e, 0xffe0003f, WR_d|RD_t,      N5      },
 559 {"dror",    "d,w,<",    0x00200036, 0xffe0003f, WR_d|RD_t,      N5      },
 560   /* end-sanitize-cygnus */
 561 {"dsllv",   "d,t,s",    0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3      },
 562 {"dsll32",  "d,w,<",    0x0000003c, 0xffe0003f, WR_d|RD_t,      I3      },
 563 {"dsll",    "d,w,s",    0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3      }, /* dsllv */
 564 {"dsll",    "d,w,>",    0x0000003c, 0xffe0003f, WR_d|RD_t,      I3      }, /* dsll32 */
 565 {"dsll",    "d,w,<",    0x00000038, 0xffe0003f, WR_d|RD_t,      I3      },
 566 {"dsrav",   "d,t,s",    0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3      },
 567 {"dsra32",  "d,w,<",    0x0000003f, 0xffe0003f, WR_d|RD_t,      I3      },
 568 {"dsra",    "d,w,s",    0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3      }, /* dsrav */
 569 {"dsra",    "d,w,>",    0x0000003f, 0xffe0003f, WR_d|RD_t,      I3      }, /* dsra32 */
 570 {"dsra",    "d,w,<",    0x0000003b, 0xffe0003f, WR_d|RD_t,      I3      },
 571 {"dsrlv",   "d,t,s",    0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3      },
 572 {"dsrl32",  "d,w,<",    0x0000003e, 0xffe0003f, WR_d|RD_t,      I3      },
 573 {"dsrl",    "d,w,s",    0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3      }, /* dsrlv */
 574 {"dsrl",    "d,w,>",    0x0000003e, 0xffe0003f, WR_d|RD_t,      I3      }, /* dsrl32 */
 575 {"dsrl",    "d,w,<",    0x0000003a, 0xffe0003f, WR_d|RD_t,      I3      },
 576 {"dsub",    "d,v,t",    0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3      },
 577 {"dsub",    "d,v,I",    0,    (int) M_DSUB_I,   INSN_MACRO,     I3      },
 578 {"dsubu",   "d,v,t",    0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3      },
 579 {"dsubu",   "d,v,I",    0,    (int) M_DSUBU_I,  INSN_MACRO,     I3      },
 580 {"eret",    "",         0x42000018, 0xffffffff, 0,      I3      },
 581 {"floor.l.d", "D,S",    0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3      },
 582 {"floor.l.s", "D,S",    0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3      },
 583 {"floor.w.d", "D,S",    0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2      },
 584 {"floor.w.s", "D,S",    0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2      },
 585 {"flushi",  "",         0xbc010000, 0xffffffff, 0,              L1      },
 586 {"flushd",  "",         0xbc020000, 0xffffffff, 0, L1           },
 587 {"flushid", "",         0xbc030000, 0xffffffff, 0, L1           },
 588 {"hibernate","",        0x42000023, 0xffffffff, 0, V1   },
 589 {"jr",      "s",        0x00000008, 0xfc1fffff, UBD|RD_s,       I1      },
 590 {"j",       "s",        0x00000008, 0xfc1fffff, UBD|RD_s,       I1      }, /* jr */
 591 /* SVR4 PIC code requires special handling for j, so it must be a
 592    macro.  */
 593 {"j",       "a",        0,     (int) M_J_A,     INSN_MACRO,     I1      },
 594 /* This form of j is used by the disassembler and internally by the
 595    assembler, but will never match user input (because the line above
 596    will match first).  */
 597 {"j",       "a",        0x08000000, 0xfc000000, UBD,            I1      },
 598 {"jalr",    "s",        0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d,  I1      },
 599 {"jalr",    "d,s",      0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d,  I1      },
 600 /* SVR4 PIC code requires special handling for jal, so it must be a
 601    macro.  */
 602 {"jal",     "d,s",      0,     (int) M_JAL_2,   INSN_MACRO,     I1      },
 603 {"jal",     "s",        0,     (int) M_JAL_1,   INSN_MACRO,     I1      },
 604 {"jal",     "a",        0,     (int) M_JAL_A,   INSN_MACRO,     I1      },
 605 /* This form of jal is used by the disassembler and internally by the
 606    assembler, but will never match user input (because the line above
 607    will match first).  */
 608 {"jal",     "a",        0x0c000000, 0xfc000000, UBD|WR_31,      I1      },
 609   /* jalx really should only be avaliable if mips16 is available,
 610      but for now make it I1. */
 611 {"jalx",    "a",        0x74000000, 0xfc000000, UBD|WR_31,      I1      },
 612 {"la",      "t,A(b)",   0,    (int) M_LA_AB,    INSN_MACRO,     I1      },
 613 {"lb",      "t,o(b)",   0x80000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 614 {"lb",      "t,A(b)",   0,    (int) M_LB_AB,    INSN_MACRO,     I1      },
 615 {"lbu",     "t,o(b)",   0x90000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 616 {"lbu",     "t,A(b)",   0,    (int) M_LBU_AB,   INSN_MACRO,     I1      },
 617 {"ld",      "t,o(b)",   0xdc000000, 0xfc000000, WR_t|RD_b,      I3      },
 618 {"ld",      "t,o(b)",   0,    (int) M_LD_OB,    INSN_MACRO,     I1      },
 619 {"ld",      "t,A(b)",   0,    (int) M_LD_AB,    INSN_MACRO,     I1      },
 620 {"ldc1",    "T,o(b)",   0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     I2      },
 621 {"ldc1",    "E,o(b)",   0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     I2      },
 622 {"ldc1",    "T,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,     I2      },
 623 {"ldc1",    "E,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,     I2      },
 624 {"l.d",     "T,o(b)",   0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     I2      }, /* ldc1 */
 625 {"l.d",     "T,o(b)",   0,    (int) M_L_DOB,    INSN_MACRO,     I1      },
 626 {"l.d",     "T,A(b)",   0,    (int) M_L_DAB,    INSN_MACRO,     I1      },
 627 {"ldc2",    "E,o(b)",   0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2      },
 628 {"ldc2",    "E,A(b)",   0,    (int) M_LDC2_AB,  INSN_MACRO,     I2      },
 629 {"ldc3",    "E,o(b)",   0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2      },
 630 {"ldc3",    "E,A(b)",   0,    (int) M_LDC3_AB,  INSN_MACRO,     I2      },
 631 {"ldl",     "t,o(b)",   0x68000000, 0xfc000000, LDD|WR_t|RD_b,  I3      },
 632 {"ldl",     "t,A(b)",   0,    (int) M_LDL_AB,   INSN_MACRO,     I3      },
 633 {"ldr",     "t,o(b)",   0x6c000000, 0xfc000000, LDD|WR_t|RD_b,  I3      },
 634 {"ldr",     "t,A(b)",   0,    (int) M_LDR_AB,   INSN_MACRO,     I3      },
 635 {"ldxc1",   "D,t(b)",   0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,     I4      },
 636 {"lh",      "t,o(b)",   0x84000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 637 {"lh",      "t,A(b)",   0,    (int) M_LH_AB,    INSN_MACRO,     I1      },
 638 {"lhu",     "t,o(b)",   0x94000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 639 {"lhu",     "t,A(b)",   0,    (int) M_LHU_AB,   INSN_MACRO,     I1      },
 640 /* li is at the start of the table.  */
 641 {"li.d",    "t,F",      0,    (int) M_LI_D,     INSN_MACRO,     I1      },
 642 {"li.d",    "T,L",      0,    (int) M_LI_DD,    INSN_MACRO,     I1      },
 643 {"li.s",    "t,f",      0,    (int) M_LI_S,     INSN_MACRO,     I1      },
 644 {"li.s",    "T,l",      0,    (int) M_LI_SS,    INSN_MACRO,     I1      },
 645 {"ll",      "t,o(b)",   0xc0000000, 0xfc000000, LDD|RD_b|WR_t,  I2      },
 646 {"ll",      "t,A(b)",   0,    (int) M_LL_AB,    INSN_MACRO,     I2      },
 647 {"lld",     "t,o(b)",   0xd0000000, 0xfc000000, LDD|RD_b|WR_t,  I3      },
 648 {"lld",     "t,A(b)",   0,    (int) M_LLD_AB,   INSN_MACRO,     I3      },
 649 {"lui",     "t,u",      0x3c000000, 0xffe00000, WR_t,           I1      },
 650   /* start-sanitize-r5900 */
 651 {"lq",      "t,o(b)",   0x78000000, 0xfc000000, WR_t|RD_b,      T5      },
 652   /* end-sanitize-r5900 */
 653 {"lw",      "t,o(b)",   0x8c000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 654 {"lw",      "t,A(b)",   0,    (int) M_LW_AB,    INSN_MACRO,     I1      },
 655 {"lwc0",    "E,o(b)",   0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1      },
 656 {"lwc0",    "E,A(b)",   0,    (int) M_LWC0_AB,  INSN_MACRO,     I1      },
 657 {"lwc1",    "T,o(b)",   0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     I1      },
 658 {"lwc1",    "E,o(b)",   0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     I1      },
 659 {"lwc1",    "T,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,     I1      },
 660 {"lwc1",    "E,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,     I1      },
 661 {"l.s",     "T,o(b)",   0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     I1      }, /* lwc1 */
 662 {"l.s",     "T,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,     I1      },
 663 {"lwc2",    "E,o(b)",   0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1      },
 664 {"lwc2",    "E,A(b)",   0,    (int) M_LWC2_AB,  INSN_MACRO,     I1      },
 665 {"lwc3",    "E,o(b)",   0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1      },
 666 {"lwc3",    "E,A(b)",   0,    (int) M_LWC3_AB,  INSN_MACRO,     I1      },
 667 {"lwl",     "t,o(b)",   0x88000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 668 {"lwl",     "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,     I1      },
 669 {"lcache",  "t,o(b)",   0x88000000, 0xfc000000, LDD|RD_b|WR_t,  I2      }, /* same */
 670 {"lcache",  "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,     I2      }, /* as lwl */
 671 {"lwr",     "t,o(b)",   0x98000000, 0xfc000000, LDD|RD_b|WR_t,  I1      },
 672 {"lwr",     "t,A(b)",   0,    (int) M_LWR_AB,   INSN_MACRO,     I1      },
 673 {"flush",   "t,o(b)",   0x98000000, 0xfc000000, LDD|RD_b|WR_t,  I2      }, /* same */
 674 {"flush",   "t,A(b)",   0,    (int) M_LWR_AB,   INSN_MACRO,     I2      }, /* as lwr */
 675 {"lwu",     "t,o(b)",   0x9c000000, 0xfc000000, LDD|RD_b|WR_t,  I3      },
 676 {"lwu",     "t,A(b)",   0,    (int) M_LWU_AB,   INSN_MACRO,     I3      },
 677 {"lwxc1",   "D,t(b)",   0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,     I4      },
 678   /* start-sanitize-vr4320 */
 679 {"mac",     "s,t",      0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     N4},
 680 {"dmac",    "s,t",      0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO,       N4},
 681   /* end-sanitize-vr4320 */
 682   /* start-sanitize-vr4320 */
 683 {"macc",    "d,s,t",    0x000000A8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
 684   /* end-sanitize-vr4320 */
 685   /* start-sanitize-cygnus */
 686 {"macc",    "d,s,t",    0x00000158, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
 687   /* end-sanitize-cygnus */
 688   /* start-sanitize-vr4320 */
 689 {"maccu",   "d,s,t",    0x000000E8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
 690   /* end-sanitize-vr4320 */
 691   /* start-sanitize-cygnus */
 692 {"maccu",   "d,s,t",    0x00000159, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
 693   /* end-sanitize-cygnus */
 694   /* start-sanitize-vr4320 */
 695 {"macchi",  "d,s,t",    0x000002A8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
 696   /* end-sanitize-vr4320 */
 697   /* start-sanitize-cygnus */
 698 {"macchi",  "d,s,t",    0x00000358, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
 699   /* end-sanitize-cygnus */
 700   /* start-sanitize-vr4320 */
 701 {"macchiu", "d,s,t",    0x000002E8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
 702   /* end-sanitize-vr4320 */
 703   /* start-sanitize-cygnus */
 704 {"macchiu", "d,s,t",    0x00000359, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
 705   /* end-sanitize-cygnus */
 706 {"mad",     "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO,      P3      },
 707 {"madu",    "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO,      P3      },
 708 {"madd.d",  "D,R,S,T",  0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,       I4      },
 709 {"madd.s",  "D,R,S,T",  0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,       I4      },
 710 /* start-sanitize-r5900 */
 711 {"madd.s",  "D,S,T",    0x4600001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,            T5      },
 712   /* end-sanitize-r5900 */
 713 {"madd",    "s,t",      0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          L1      },
 714 {"madd",    "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M,             G1      },
 715 {"madd",    "d,s,t",    0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M,        G1      },
 716   /* start-sanitize-r5900 */
 717 {"madd1",   "s,t",      0x70000020, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T5      },
 718 {"madd1",   "d,s,t",    0x70000020, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T5      },
 719   /* end-sanitize-r5900 */
 720 {"maddu",   "s,t",      0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          L1      },
 721 {"maddu",   "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M,     G1},
 722 {"maddu",   "d,s,t",    0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M,        G1},
 723   /* start-sanitize-r5900 */
 724 {"maddu1",  "s,t",      0x70000021, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T5      },
 725 {"maddu1",  "d,s,t",    0x70000021, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T5      },
 726 {"adda.s",  "S,T",      0x46000018, 0xffe007ff, RD_S|RD_T|FP_S,         T5 },
 727 {"madda.s", "S,T",      0x4600001e, 0xffe007ff, RD_S|RD_T|FP_S,         T5 },
 728 {"max.s",   "D,S,T",    0x46000028, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    T5 },
 729 {"min.s",   "D,S,T",    0x46000029, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    T5 },
 730 {"msuba.s", "S,T",      0x4600001f, 0xffe007ff, RD_S|RD_T|FP_S,         T5 },
 731 {"mula.s",  "S,T",      0x4600001a, 0xffe007ff, RD_S|RD_T|FP_S,         T5 },
 732 {"suba.s",  "S,T",      0x46000019, 0xffe007ff, RD_S|RD_T|FP_S,         T5 },
 733 {"di",      "",         0x42000039, 0xffffffff, WR_C0,          T5      },
 734 {"ei",      "",         0x42000038, 0xffffffff, WR_C0,          T5      },
 735 {"mfbpc",   "t",        0x4000c000, 0xffe0ffff, RD_C0|WR_t,     T5      },
 736 {"mfdab",   "t",        0x4000c004, 0xffe0ffff, RD_C0|WR_t,     T5      },
 737 {"mfdabm",  "t",        0x4000c005, 0xffe0ffff, RD_C0|WR_t,     T5      },
 738 {"mfdvb",   "t",        0x4000c006, 0xffe0ffff, RD_C0|WR_t,     T5      },
 739 {"mfdvbm",   "t",       0x4000c007, 0xffe0ffff, RD_C0|WR_t,     T5      },
 740 {"mfiab",    "t",       0x4000c002, 0xffe0ffff, RD_C0|WR_t,     T5      },
 741 {"mfiabm",   "t",       0x4000c003, 0xffe0ffff, RD_C0|WR_t,     T5      },
 742 {"mtbpc",   "t",        0x4080c000, 0xffe0ffff, WR_C0|RD_t,     T5      },
 743 {"mtdab",   "t",        0x4080c004, 0xffe0ffff, WR_C0|RD_t,     T5      },
 744 {"mtdabm",   "t",       0x4080c005, 0xffe0ffff, WR_C0|RD_t,     T5      },
 745 {"mtdvb",    "t",       0x4080c006, 0xffe0ffff, WR_C0|RD_t,     T5      },
 746 {"mtdvbm",   "t",       0x4080c007, 0xffe0ffff, WR_C0|RD_t,     T5      },
 747 {"mtiab",    "t",       0x4080c002, 0xffe0ffff, WR_C0|RD_t,     T5      },
 748 {"mtiabm",   "t",       0x4080c003, 0xffe0ffff, WR_C0|RD_t,     T5      },
 749   /* end-sanitize-r5900 */
 750 {"madd16",  "s,t",      0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO,      V1      },
 751   /* start-sanitize-cygnus */
 752 {"mfpc",    "t,P",      0x4000c801, 0xffe0ffc1, RD_C0|WR_t,     N5      },
 753   /* end-sanitize-cygnus */
 754   /* start-sanitize-r5900 */
 755 {"mfpc",    "t,P",      0x4000c801, 0xffe0ffc1, RD_C0|WR_t,     T5      },
 756   /* end-sanitize-r5900 */
 757   /* start-sanitize-cygnus */
 758 {"mfps",    "t,P",      0x4000c800, 0xffe0ffc1, RD_C0|WR_t,     N5      },
 759   /* end-sanitize-cygnus */
 760   /* start-sanitize-r5900 */
 761 {"mfps",    "t,P",      0x4000c800, 0xffe0ffc1, RD_C0|WR_t,     T5      },
 762   /* end-sanitize-r5900 */
 763   /* start-sanitize-cygnus */
 764 {"mtpc",    "t,P",      0x4080c801, 0xffe0ffc1, WR_C0|RD_t,     N5      },
 765   /* end-sanitize-cygnus */
 766   /* start-sanitize-r5900 */
 767 {"mtpc",    "t,P",      0x4080c801, 0xffe0ffc1, WR_C0|RD_t,     T5      },
 768   /* end-sanitize-r5900 */
 769   /* start-sanitize-cygnus */
 770 {"mtps",    "t,P",      0x4080c800, 0xffe0ffc1, WR_C0|RD_t,     N5      },
 771   /* end-sanitize-cygnus */
 772   /* start-sanitize-r5900 */
 773 {"mtps",    "t,P",      0x4080c800, 0xffe0ffc1, WR_C0|RD_t,     T5      },
 774   /* end-sanitize-r5900 */
 775 {"mfc0",    "t,G",      0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1      },
 776 {"mfc1",    "t,S",      0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     I1      },
 777 {"mfc1",    "t,G",      0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     I1      },
 778 {"mfc2",    "t,G",      0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1      },
 779 {"mfc3",    "t,G",      0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1      },
 780   /* start-sanitize-cygnus */
 781 {"mfdr",    "t,G",      0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, N5      },
 782   /* end-sanitize-cygnus */
 783 {"mfhi",    "d",        0x00000010, 0xffff07ff, WR_d|RD_HI,     I1      },
 784   /* start-sanitize-r5900 */
 785 {"mfhi1",   "d",        0x70000010, 0xffff07ff, WR_d|RD_HI,     T5      },
 786   /* end-sanitize-r5900 */
 787 {"mflo",    "d",        0x00000012, 0xffff07ff, WR_d|RD_LO,     I1      },
 788   /* start-sanitize-r5900 */
 789 {"mflo1",   "d",        0x70000012, 0xffff07ff, WR_d|RD_LO,     T5      },
 790 {"mfsa",    "d",        0x00000028, 0xffff07ff, WR_d,   T5      },
 791   /* end-sanitize-r5900 */
 792 {"mov.d",   "D,S",      0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1      },
 793 {"mov.s",   "D,S",      0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1      },
 794 {"movf",    "d,s,N",    0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S,      I4      },
 795 {"movf.d",  "D,S,N",    0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   I4      },
 796 {"movf.s",  "D,S,N",    0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   I4      },
 797 {"movn",    "d,v,t",    0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4      },
 798   /* start-sanitize-r5900 */
 799 {"movn",    "d,v,t",    0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 800   /* end-sanitize-r5900 */
 801 {"ffc",     "d,v",      0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1    },
 802 {"movn.d",  "D,S,t",    0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I4      },
 803 {"movn.s",  "D,S,t",    0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    I4      },
 804 {"movt",    "d,s,N",    0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC,        I4      },
 805 {"movt.d",  "D,S,N",    0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   I4      },
 806 {"movt.s",  "D,S,N",    0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   I4      },
 807 {"movz",    "d,v,t",    0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4      },
 808   /* start-sanitize-r5900 */
 809 {"movz",    "d,v,t",    0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 810   /* end-sanitize-r5900 */
 811 {"ffs",     "d,v",      0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1    },
 812 {"movz.d",  "D,S,t",    0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I4      },
 813 {"movz.s",  "D,S,t",    0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    I4      },
 814   /* start-sanitize-cygnus */
 815 {"msac",    "d,s,t",    0x000001d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 816 {"msacu",   "d,s,t",    0x000001d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 817 {"msachi",  "d,s,t",    0x000003d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 818 {"msachiu", "d,s,t",    0x000003d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 819   /* end-sanitize-cygnus */
 820 /* move is at the top of the table.  */
 821 {"msub.d",  "D,R,S,T",  0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,       I4      },
 822 {"msub.s",  "D,R,S,T",  0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,       I4      },
 823 /* start-sanitize-r5900 */
 824 {"msub.s",  "D,S,T",    0x4600001d, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    T5      },
 825 /* end-sanitize-r5900 */
 826 {"msub",    "s,t",      0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1        },
 827 {"msubu",   "s,t",      0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1        },
 828 {"mtc0",    "t,G",      0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC,   I1      },
 829 {"mtc1",    "t,S",      0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     I1      },
 830 {"mtc1",    "t,G",      0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     I1      },
 831 {"mtc2",    "t,G",      0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC,   I1      },
 832 {"mtc3",    "t,G",      0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC,   I1      },
 833   /* start-sanitize-cygnus */
 834 {"mtdr",    "t,G",      0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, N5      },
 835   /* end-sanitize-cygnus */
 836 {"mthi",    "s",        0x00000011, 0xfc1fffff, RD_s|WR_HI,     I1      },
 837   /* start-sanitize-r5900 */
 838 {"mthi1",   "s",        0x70000011, 0xfc1fffff, RD_s|WR_HI,     T5      },
 839   /* end-sanitize-r5900 */
 840 {"mtlo",    "s",        0x00000013, 0xfc1fffff, RD_s|WR_LO,     I1      },
 841   /* start-sanitize-r5900 */
 842 {"mtlo1",   "s",        0x70000013, 0xfc1fffff, RD_s|WR_LO,     T5      },
 843 {"mtsa",    "s",        0x00000029, 0xfc1fffff, RD_s,   T5      },
 844 {"mtsab",   "s,j",      0x04180000, 0xfc1f0000, RD_s,   T5      },
 845 {"mtsah",   "s,j",      0x04190000, 0xfc1f0000, RD_s,   T5      },
 846   /* end-sanitize-r5900 */
 847 {"mul.d",   "D,V,T",    0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    I1      },
 848 {"mul.s",   "D,V,T",    0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    I1      },
 849 {"mul",     "d,v,t",    0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,P3},
 850   /* start-sanitize-vr4320 */
 851 {"mul",     "d,s,t",    0x00000128, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
 852   /* end-sanitize-vr4320 */
 853   /* start-sanitize-cygnus */
 854 {"mul",     "d,s,t",    0x00000058, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
 855   /* end-sanitize-cygnus */
 856 {"mul",     "d,v,t",    0,    (int) M_MUL,      INSN_MACRO,     I1      },
 857 {"mul",     "d,v,I",    0,    (int) M_MUL_I,    INSN_MACRO,     I1      },
 858 {"mulo",    "d,v,t",    0,    (int) M_MULO,     INSN_MACRO,     I1      },
 859 {"mulo",    "d,v,I",    0,    (int) M_MULO_I,   INSN_MACRO,     I1      },
 860 {"mulou",   "d,v,t",    0,    (int) M_MULOU,    INSN_MACRO,     I1      },
 861 {"mulou",   "d,v,I",    0,    (int) M_MULOU_I,  INSN_MACRO,     I1      },
 862   /* start-sanitize-vr4320 */
 863 {"mulu",    "d,s,t",    0x00000168, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
 864   /* end-sanitize-vr4320 */
 865   /* start-sanitize-cygnus */
 866 {"mulu",    "d,s,t",    0x00000059, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
 867   /* end-sanitize-cygnus */
 868   /* start-sanitize-vr4320 */
 869 {"mulhi",   "d,s,t",    0x00000328, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
 870   /* end-sanitize-vr4320 */
 871   /* start-sanitize-cygnus */
 872 {"mulhi",   "d,s,t",    0x00000258, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
 873   /* end-sanitize-cygnus */
 874   /* start-sanitize-vr4320 */
 875 {"mulhiu",  "d,s,t",    0x00000368, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
 876   /* end-sanitize-vr4320 */
 877   /* start-sanitize-cygnus */
 878 {"mulhiu",  "d,s,t",    0x00000259, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
 879   /* end-sanitize-cygnus */
 880   /* start-sanitize-cygnus */
 881 {"muls",    "d,s,t",    0x000000d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 882 {"mulsu",   "d,s,t",    0x000000d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 883 {"mulshi",  "d,s,t",    0x000002d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 884 {"mulshiu", "d,s,t",    0x000002d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5      },
 885   /* end-sanitize-cygnus */
 886 {"mult",    "s,t",      0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M,     I1},
 887 {"mult",    "d,s,t",    0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
 888   /* start-sanitize-r5900 */
 889 {"mult1",   "s,t",      0x70000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,      T5},
 890 {"mult1",   "d,s,t",    0x70000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
 891   /* end-sanitize-r5900 */
 892 {"multu",   "s,t",      0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M,     I1},
 893 {"multu",   "d,s,t",    0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
 894   /* start-sanitize-r5900 */
 895 {"multu1",  "s,t",      0x70000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,      T5},
 896 {"multu1",  "d,s,t",    0x70000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
 897   /* end-sanitize-r5900 */
 898 {"neg",     "d,w",      0x00000022, 0xffe007ff, WR_d|RD_t,      I1      }, /* sub 0 */
 899 {"negu",    "d,w",      0x00000023, 0xffe007ff, WR_d|RD_t,      I1      }, /* subu 0 */
 900 {"neg.d",   "D,V",      0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1      },
 901 {"neg.s",   "D,V",      0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1      },
 902 {"nmadd.d", "D,R,S,T",  0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,       I4      },
 903 {"nmadd.s", "D,R,S,T",  0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,       I4      },
 904 {"nmsub.d", "D,R,S,T",  0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,       I4      },
 905 {"nmsub.s", "D,R,S,T",  0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,       I4      },
 906 /* nop is at the start of the table.  */
 907 {"nor",     "d,v,t",    0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
 908 {"nor",     "t,r,I",    0,    (int) M_NOR_I,    INSN_MACRO,     I1      },
 909 {"not",     "d,v",      0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1      },/*nor d,s,0*/
 910 {"or",      "d,v,t",    0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
 911 {"or",      "t,r,I",    0,    (int) M_OR_I,     INSN_MACRO,     I1      },
 912 {"ori",     "t,r,i",    0x34000000, 0xfc000000, WR_t|RD_s,      I1      },
 913
 914   /* start-sanitize-r5900 */
 915 {"pabsh",   "d,t",      0x70000168, 0xffe007ff, WR_d|RD_t,      T5      },
 916 {"pabsw",   "d,t",      0x70000068, 0xffe007ff, WR_d|RD_t,      T5      },
 917 {"paddb",   "d,v,t",    0x70000208, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 918 {"paddh",   "d,v,t",    0x70000108, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 919 {"paddw",   "d,v,t",    0x70000008, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 920 {"paddsb",  "d,v,t",    0x70000608, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 921 {"paddsh",  "d,v,t",    0x70000508, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 922 {"paddsw",  "d,v,t",    0x70000408, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 923 {"paddub",  "d,v,t",    0x70000628, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 924 {"padduh",  "d,v,t",    0x70000528, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 925 {"padduw",  "d,v,t",    0x70000428, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 926 {"padsbh",  "d,v,t",    0x70000128, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 927 {"pand",    "d,v,t",    0x70000489, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 928 {"pceqb",   "d,v,t",    0x700002a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 929 {"pceqh",   "d,v,t",    0x700001a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 930 {"pceqw",   "d,v,t",    0x700000a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 931
 932 {"pcgtb",   "d,v,t",    0x70000288, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 933 {"pcgth",   "d,v,t",    0x70000188, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 934 {"pcgtw",   "d,v,t",    0x70000088, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 935
 936 {"pcpyh",   "d,t",      0x700006e9, 0xffe007ff, WR_d|RD_t,      T5      },
 937
 938 {"pcpyld",  "d,v,t",    0x70000389, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 939 {"pcpyud",  "d,v,t",    0x700003a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 940
 941 {"pdivbw",   "s,t",     0x70000749, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  T5      },
 942 {"pdivuw",   "s,t",     0x70000369, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  T5      },
 943 {"pdivw",    "s,t",     0x70000349, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  T5      },
 944
 945 {"pexch",    "d,t",     0x700006a9, 0xffe007ff, WR_d|RD_t,      T5      },
 946 {"pexcw",    "d,t",     0x700007a9, 0xffe007ff, WR_d|RD_t,      T5      },
 947 {"pexeh",    "d,t",     0x70000689, 0xffe007ff, WR_d|RD_t,      T5      },
 948 {"pexoh",    "d,t",     0x70000689, 0xffe007ff, WR_d|RD_t,      T5      },
 949 {"pexew",    "d,t",     0x70000789, 0xffe007ff, WR_d|RD_t,      T5      },
 950 {"pexow",    "d,t",     0x70000789, 0xffe007ff, WR_d|RD_t,      T5      },
 951
 952 {"pext5",    "d,t",     0x70000788, 0xffe007ff, WR_d|RD_t,      T5      },
 953
 954 {"pextlb",   "d,v,t",   0x70000688, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 955 {"pextlh",   "d,v,t",   0x70000588, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 956 {"pextlw",   "d,v,t",   0x70000488, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 957 {"pextub",   "d,v,t",   0x700006a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 958 {"pextuh",   "d,v,t",   0x700005a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 959 {"pextuw",   "d,v,t",   0x700004a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 960
 961 {"phmadh",  "d,v,t",    0x70000449, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 962 {"phmsbh",  "d,v,t",    0x70000549, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 963 {"phmaddh",  "d,v,t",   0x70000449, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 964 {"phmsubh",  "d,v,t",   0x70000549, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 965
 966 {"pinth",    "d,v,t",   0x70000289, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 967 {"pinteh",   "d,v,t",   0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 968 {"pintoh",   "d,v,t",   0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 969
 970 {"plzcw",    "d,v",     0x70000004, 0xfc1f07ff, WR_d|RD_s,      T5      },
 971
 972 {"pmaddh",   "d,v,t",   0x70000409, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 973 {"pmadduw",  "d,v,t",   0x70000029, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 974 {"pmaddw",   "d,v,t",   0x70000009, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 975
 976 {"pmaxh",    "d,v,t",   0x700001c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 977 {"pmaxw",    "d,v,t",   0x700000c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 978
 979 {"pmfhi",    "d",       0x70000209, 0xffff07ff, WR_d|RD_HI,     T5      },
 980 {"pmflo",    "d",       0x70000249, 0xffff07ff, WR_d|RD_LO,     T5      },
 981
 982 {"pmfhl.lw", "d",       0x70000030, 0xffff07ff, WR_d|RD_LO|RD_HI,       T5      },
 983 {"pmfhl.uw", "d",       0x70000070, 0xffff07ff, WR_d|RD_LO|RD_HI,       T5      },
 984 {"pmfhl.slw","d",       0x700000b0, 0xffff07ff, WR_d|RD_LO|RD_HI,       T5      },
 985 {"pmfhl.lh", "d",       0x700000f0, 0xffff07ff, WR_d|RD_LO|RD_HI,       T5      },
 986 {"pmfhl.sh", "d",       0x70000130, 0xffff07ff, WR_d|RD_LO|RD_HI,       T5      },
 987
 988 {"pminh",    "d,v,t",   0x700001e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 989 {"pminw",    "d,v,t",   0x700000e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
 990
 991 {"pmsubh",   "d,v,t",   0x70000509, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 992 {"pmsubw",   "d,v,t",   0x70000109, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
 993
 994 {"pmthi",    "v",       0x70000229, 0xfc1fffff, WR_HI|RD_s,     T5      },
 995 {"pmtlo",    "v",       0x70000269, 0xfc1fffff, WR_LO|RD_s,     T5      },
 996
 997 {"pmthl.lw", "v",       0x70000031, 0xfc1fffff, WR_HI|WR_LO|RD_s,       T5      },
 998
 999 {"pmulth",   "d,v,t",   0x70000709, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
1000 {"pmultuw",  "d,v,t",   0x70000329, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
1001 {"pmultw",   "d,v,t",   0x70000309, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,     T5      },
1002
1003 {"pnor",    "d,v,t",    0x700004e9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1004 {"por",     "d,v,t",    0x700004a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1005
1006 {"ppac5",   "d,t",      0x700007c8, 0xffe007ff, WR_d|RD_t,      T5      },
1007
1008 {"ppacb",   "d,v,t",    0x700006c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1009 {"ppach",   "d,v,t",    0x700005c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1010 {"ppacw",   "d,v,t",    0x700004c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1011
1012 {"prevh",   "d,t",      0x700006c9, 0xffe007ff, WR_d|RD_t,      T5      },
1013 {"prot3w",  "d,t",      0x700007c9, 0xffe007ff, WR_d|RD_t,      T5      },
1014
1015 {"psllh",  "d,t,<",     0x70000034, 0xffe0003f, WR_d|RD_t,      T5      },
1016 {"psllvw", "d,t,s",     0x70000089, 0xfc0007ff, WR_d|RD_t|RD_s, T5      },
1017 {"psllw",  "d,t,<",     0x7000003c, 0xffe0003f, WR_d|RD_t,      T5      },
1018
1019 {"psrah",  "d,t,<",     0x70000037, 0xffe0003f, WR_d|RD_t,      T5      },
1020 {"psravw", "d,t,s",     0x700000e9, 0xfc0007ff, WR_d|RD_t|RD_s, T5      },
1021 {"psraw",  "d,t,<",     0x7000003f, 0xffe0003f, WR_d|RD_t,      T5      },
1022
1023 {"psrlh",  "d,t,<",     0x70000036, 0xffe0003f, WR_d|RD_t,      T5      },
1024 {"psrlvw", "d,t,s",     0x700000c9, 0xfc0007ff, WR_d|RD_t|RD_s, T5      },
1025 {"psrlw",  "d,t,<",     0x7000003e, 0xffe0003f, WR_d|RD_t,      T5      },
1026
1027 {"psubb",  "d,v,t",     0x70000248, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1028 {"psubh",  "d,v,t",     0x70000148, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1029 {"psubsb", "d,v,t",     0x70000648, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1030 {"psubsh", "d,v,t",     0x70000548, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1031 {"psubsw", "d,v,t",     0x70000448, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1032 {"psubub", "d,v,t",     0x70000668, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1033 {"psubuh", "d,v,t",     0x70000568, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1034 {"psubuw", "d,v,t",     0x70000468, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1035 {"psubw",  "d,v,t",     0x70000048, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1036
1037 {"pxor",   "d,v,t",     0x700004c9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1038   /* end-sanitize-r5900 */
1039
1040 {"pref",    "k,o(b)",   0xcc000000, 0xfc000000, RD_b,           G3      },
1041 {"prefx",   "h,t(b)",   0x4c00000f, 0xfc0007ff, RD_b|RD_t,      I4      },
1042
1043   /* start-sanitize-r5900 */
1044 {"qfsrv",   "d,v,t",    0x700006e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
1045   /* end-sanitize-r5900 */
1046
1047 {"recip.d", "D,S",      0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4      },
1048 {"recip.s", "D,S",      0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4      },
1049 {"rem",     "z,s,t",    0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I1 },
1050 {"rem",     "d,v,t",    0,    (int) M_REM_3,    INSN_MACRO,     I1      },
1051 {"rem",     "d,v,I",    0,    (int) M_REM_3I,   INSN_MACRO,     I1      },
1052 {"remu",    "z,s,t",    0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I1 },
1053 {"remu",    "d,v,t",    0,    (int) M_REMU_3,   INSN_MACRO,     I1      },
1054 {"remu",    "d,v,I",    0,    (int) M_REMU_3I,  INSN_MACRO,     I1      },
1055 {"rfe",     "",         0x42000010, 0xffffffff, 0,      I1|T3           },
1056 {"rol",     "d,v,t",    0,    (int) M_ROL,      INSN_MACRO,     I1      },
1057 {"rol",     "d,v,I",    0,    (int) M_ROL_I,    INSN_MACRO,     I1      },
1058   /* start-sanitize-cygnus */
1059 {"ror",     "d,t,<",    0x00200002, 0xffe0003f, WR_d|RD_t,      N5      },
1060   /* end-sanitize-cygnus */
1061 {"ror",     "d,v,t",    0,    (int) M_ROR,      INSN_MACRO,     I1      },
1062 {"ror",     "d,v,I",    0,    (int) M_ROR_I,    INSN_MACRO,     I1      },
1063   /* start-sanitize-cygnus */
1064 {"rorv",    "d,t,s",    0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5      },
1065   /* end-sanitize-cygnus */
1066 {"round.l.d", "D,S",    0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3      },
1067 {"round.l.s", "D,S",    0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3      },
1068 {"round.w.d", "D,S",    0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2      },
1069 {"round.w.s", "D,S",    0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2      },
1070 {"rsqrt.d", "D,S",      0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4      },
1071 {"rsqrt.s", "D,S",      0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4      },
1072 /* start-sanitize-r5900 */
1073 {"rsqrt.s", "D,S,T",    0x46000016, 0xffe0003f, WR_D|RD_S|FP_S, T5      },
1074 /* end-sanitize-r5900 */
1075 {"sb",      "t,o(b)",   0xa0000000, 0xfc000000, SM|RD_t|RD_b,   I1      },
1076 {"sb",      "t,A(b)",   0,    (int) M_SB_AB,    INSN_MACRO,     I1      },
1077 {"sc",      "t,o(b)",   0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,      I2      },
1078 {"sc",      "t,A(b)",   0,    (int) M_SC_AB,    INSN_MACRO,     I2      },
1079 {"scd",     "t,o(b)",   0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,      I3      },
1080 {"scd",     "t,A(b)",   0,    (int) M_SCD_AB,   INSN_MACRO,     I3      },
1081 {"sd",      "t,o(b)",   0xfc000000, 0xfc000000, SM|RD_t|RD_b,   I3      },
1082 {"sd",      "t,o(b)",   0,    (int) M_SD_OB,    INSN_MACRO,     I1      },
1083 {"sd",      "t,A(b)",   0,    (int) M_SD_AB,    INSN_MACRO,     I1      },
1084 {"sdbbp",   "",         0x0000000e, 0xffffffff, TRAP,           G2      },
1085 {"sdbbp",   "c",        0x0000000e, 0xfc00ffff, TRAP,           G2      },
1086 {"sdbbp",   "c,q",      0x0000000e, 0xfc00003f, TRAP,           G2      },
1087 {"sdc1",    "T,o(b)",   0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      I2      },
1088 {"sdc1",    "E,o(b)",   0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      I2      },
1089 {"sdc1",    "T,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,     I2      },
1090 {"sdc1",    "E,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,     I2      },
1091 {"sdc2",    "E,o(b)",   0xf8000000, 0xfc000000, SM|RD_C2|RD_b,  I2      },
1092 {"sdc2",    "E,A(b)",   0,    (int) M_SDC2_AB,  INSN_MACRO,     I2      },
1093 {"sdc3",    "E,o(b)",   0xfc000000, 0xfc000000, SM|RD_C3|RD_b,  I2      },
1094 {"sdc3",    "E,A(b)",   0,    (int) M_SDC3_AB,  INSN_MACRO,     I2      },
1095 {"s.d",     "T,o(b)",   0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      I2      },
1096 {"s.d",     "T,o(b)",   0,    (int) M_S_DOB,    INSN_MACRO,     I1      },
1097 {"s.d",     "T,A(b)",   0,    (int) M_S_DAB,    INSN_MACRO,     I1      },
1098 {"sdl",     "t,o(b)",   0xb0000000, 0xfc000000, SM|RD_t|RD_b,   I3      },
1099 {"sdl",     "t,A(b)",   0,    (int) M_SDL_AB,   INSN_MACRO,     I3      },
1100 {"sdr",     "t,o(b)",   0xb4000000, 0xfc000000, SM|RD_t|RD_b,   I3      },
1101 {"sdr",     "t,A(b)",   0,    (int) M_SDR_AB,   INSN_MACRO,     I3      },
1102 {"sdxc1",   "S,t(b)",   0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b,      I4      },
1103 {"selsl",   "d,v,t",    0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1       },
1104 {"selsr",   "d,v,t",    0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1       },
1105 {"seq",     "d,v,t",    0,    (int) M_SEQ,      INSN_MACRO,     I1      },
1106 {"seq",     "d,v,I",    0,    (int) M_SEQ_I,    INSN_MACRO,     I1      },
1107 {"sge",     "d,v,t",    0,    (int) M_SGE,      INSN_MACRO,     I1      },
1108 {"sge",     "d,v,I",    0,    (int) M_SGE_I,    INSN_MACRO,     I1      },
1109 {"sgeu",    "d,v,t",    0,    (int) M_SGEU,     INSN_MACRO,     I1      },
1110 {"sgeu",    "d,v,I",    0,    (int) M_SGEU_I,   INSN_MACRO,     I1      },
1111 {"sgt",     "d,v,t",    0,    (int) M_SGT,      INSN_MACRO,     I1      },
1112 {"sgt",     "d,v,I",    0,    (int) M_SGT_I,    INSN_MACRO,     I1      },
1113 {"sgtu",    "d,v,t",    0,    (int) M_SGTU,     INSN_MACRO,     I1      },
1114 {"sgtu",    "d,v,I",    0,    (int) M_SGTU_I,   INSN_MACRO,     I1      },
1115 {"sh",      "t,o(b)",   0xa4000000, 0xfc000000, SM|RD_t|RD_b,   I1      },
1116 {"sh",      "t,A(b)",   0,    (int) M_SH_AB,    INSN_MACRO,     I1      },
1117 {"sle",     "d,v,t",    0,    (int) M_SLE,      INSN_MACRO,     I1      },
1118 {"sle",     "d,v,I",    0,    (int) M_SLE_I,    INSN_MACRO,     I1      },
1119 {"sleu",    "d,v,t",    0,    (int) M_SLEU,     INSN_MACRO,     I1      },
1120 {"sleu",    "d,v,I",    0,    (int) M_SLEU_I,   INSN_MACRO,     I1      },
1121 {"sllv",    "d,t,s",    0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1      },
1122 {"sll",     "d,w,s",    0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1      }, /* sllv */
1123 {"sll",     "d,w,<",    0x00000000, 0xffe0003f, WR_d|RD_t,      I1      },
1124 {"slt",     "d,v,t",    0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
1125 {"slt",     "d,v,I",    0,    (int) M_SLT_I,    INSN_MACRO,     I1      },
1126 {"slti",    "t,r,j",    0x28000000, 0xfc000000, WR_t|RD_s,      I1      },
1127 {"sltiu",   "t,r,j",    0x2c000000, 0xfc000000, WR_t|RD_s,      I1      },
1128 {"sltu",    "d,v,t",    0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
1129 {"sltu",    "d,v,I",    0,    (int) M_SLTU_I,   INSN_MACRO,     I1      },
1130 {"sne",     "d,v,t",    0,    (int) M_SNE,      INSN_MACRO,     I1      },
1131 {"sne",     "d,v,I",    0,    (int) M_SNE_I,    INSN_MACRO,     I1      },
1132   /* start-sanitize-r5900 */
1133 {"sq",      "t,o(b)",   0x7c000000, 0xfc000000, SM|RD_t|RD_b,   T5      },
1134   /* end-sanitize-r5900 */
1135 {"sqrt.d",  "D,S",      0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2      },
1136 /* start-sanitize-r5900 */
1137 {"sqrt.s",  "D,T",      0x46000004, 0xffe0f83f, WR_D|RD_S|FP_S, T5      },
1138 /* end-sanitize-r5900 */
1139 {"sqrt.s",  "D,S",      0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2      },
1140 {"srav",    "d,t,s",    0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1      },
1141 {"sra",     "d,w,s",    0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1      }, /* srav */
1142 {"sra",     "d,w,<",    0x00000003, 0xffe0003f, WR_d|RD_t,      I1      },
1143 {"srlv",    "d,t,s",    0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1      },
1144 {"srl",     "d,w,s",    0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1      }, /* srlv */
1145 {"srl",     "d,w,<",    0x00000002, 0xffe0003f, WR_d|RD_t,      I1      },
1146 {"standby", "",         0x42000021, 0xffffffff, 0,              V1      },
1147 {"sub",     "d,v,t",    0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
1148 {"sub",     "d,v,I",    0,    (int) M_SUB_I,    INSN_MACRO,     I1      },
1149 {"sub.d",   "D,V,T",    0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    I1      },
1150 {"sub.s",   "D,V,T",    0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    I1      },
1151 {"subu",    "d,v,t",    0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
1152 {"subu",    "d,v,I",    0,    (int) M_SUBU_I,   INSN_MACRO,     I1      },
1153 {"suspend", "",         0x42000022, 0xffffffff, 0,              V1      },
1154 {"sw",      "t,o(b)",   0xac000000, 0xfc000000, SM|RD_t|RD_b,   I1      },
1155 {"sw",      "t,A(b)",   0,    (int) M_SW_AB,    INSN_MACRO,     I1      },
1156 {"swc0",    "E,o(b)",   0xe0000000, 0xfc000000, SM|RD_C0|RD_b,  I1      },
1157 {"swc0",    "E,A(b)",   0,    (int) M_SWC0_AB,  INSN_MACRO,     I1      },
1158 {"swc1",    "T,o(b)",   0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      I1      },
1159 {"swc1",    "E,o(b)",   0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      I1      },
1160 {"swc1",    "T,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,     I1      },
1161 {"swc1",    "E,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,     I1      },
1162 {"s.s",     "T,o(b)",   0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      I1      }, /* swc1 */
1163 {"s.s",     "T,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,     I1      },
1164 {"swc2",    "E,o(b)",   0xe8000000, 0xfc000000, SM|RD_C2|RD_b,  I1      },
1165 {"swc2",    "E,A(b)",   0,    (int) M_SWC2_AB,  INSN_MACRO,     I1      },
1166 {"swc3",    "E,o(b)",   0xec000000, 0xfc000000, SM|RD_C3|RD_b,  I1      },
1167 {"swc3",    "E,A(b)",   0,    (int) M_SWC3_AB,  INSN_MACRO,     I1      },
1168 {"swl",     "t,o(b)",   0xa8000000, 0xfc000000, SM|RD_t|RD_b,   I1      },
1169 {"swl",     "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,     I1      },
1170 {"scache",  "t,o(b)",   0xa8000000, 0xfc000000, RD_t|RD_b,      I2      }, /* same */
1171 {"scache",  "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,     I2      }, /* as swl */
1172 {"swr",     "t,o(b)",   0xb8000000, 0xfc000000, SM|RD_t|RD_b,   I1      },
1173 {"swr",     "t,A(b)",   0,    (int) M_SWR_AB,   INSN_MACRO,     I1      },
1174 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b,      I2      }, /* same */
1175 {"invalidate", "t,A(b)",0,    (int) M_SWR_AB,   INSN_MACRO,     I2      }, /* as swr */
1176 {"swxc1",   "S,t(b)",   0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b,      I4      },
1177 {"sync",    "",         0x0000000f, 0xffffffff, 0,              I2|T3   },
1178 {"sync.p",  "",         0x0000000f, 0xffffffff, 0,              I2      },
1179 {"sync.l",  "",         0x0000040f, 0xffffffff, 0,              I2      },
1180 {"syscall", "",         0x0000000c, 0xffffffff, TRAP,   I1              },
1181 {"syscall", "B",        0x0000000c, 0xfc00003f, TRAP,   I1              },
1182 {"teqi",    "s,j",      0x040c0000, 0xfc1f0000, RD_s|TRAP,      I2      },
1183 {"teq",     "s,t",      0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2      },
1184 {"teq",     "s,t,q",    0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2      },
1185 {"teq",     "s,j",      0x040c0000, 0xfc1f0000, RD_s|TRAP,      I2      }, /* teqi */
1186 {"teq",     "s,I",      0,    (int) M_TEQ_I,    INSN_MACRO,     I2      },
1187 {"tgei",    "s,j",      0x04080000, 0xfc1f0000, RD_s|TRAP,      I2      },
1188 {"tge",     "s,t",      0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2      },
1189 {"tge",     "s,t,q",    0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2      },
1190 {"tge",     "s,j",      0x04080000, 0xfc1f0000, RD_s|TRAP,      I2      }, /* tgei */
1191 {"tge",     "s,I",      0,    (int) M_TGE_I,    INSN_MACRO,     I2      },
1192 {"tgeiu",   "s,j",      0x04090000, 0xfc1f0000, RD_s|TRAP,      I2              },
1193 {"tgeu",    "s,t",      0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2       },
1194 {"tgeu",    "s,t,q",    0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2       },
1195 {"tgeu",    "s,j",      0x04090000, 0xfc1f0000, RD_s|TRAP,      I2              }, /* tgeiu */
1196 {"tgeu",    "s,I",      0,    (int) M_TGEU_I,   INSN_MACRO,     I2      },
1197 {"tlbp",    "",         0x42000008, 0xffffffff, INSN_TLB,       I1      },
1198 {"tlbr",    "",         0x42000001, 0xffffffff, INSN_TLB,       I1      },
1199 {"tlbwi",   "",         0x42000002, 0xffffffff, INSN_TLB,       I1      },
1200 {"tlbwr",   "",         0x42000006, 0xffffffff, INSN_TLB,       I1      },
1201 {"tlti",    "s,j",      0x040a0000, 0xfc1f0000, RD_s|TRAP,      I2              },
1202 {"tlt",     "s,t",      0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2       },
1203 {"tlt",     "s,t,q",    0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2       },
1204 {"tlt",     "s,j",      0x040a0000, 0xfc1f0000, RD_s|TRAP,      I2              }, /* tlti */
1205 {"tlt",     "s,I",      0,    (int) M_TLT_I,    INSN_MACRO,     I2      },
1206 {"tltiu",   "s,j",      0x040b0000, 0xfc1f0000, RD_s|TRAP,      I2              },
1207 {"tltu",    "s,t",      0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2       },
1208 {"tltu",    "s,t,q",    0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2       },
1209 {"tltu",    "s,j",      0x040b0000, 0xfc1f0000, RD_s|TRAP,      I2              }, /* tltiu */
1210 {"tltu",    "s,I",      0,    (int) M_TLTU_I,   INSN_MACRO,     I2      },
1211 {"tnei",    "s,j",      0x040e0000, 0xfc1f0000, RD_s|TRAP,      I2              },
1212 {"tne",     "s,t",      0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2       },
1213 {"tne",     "s,t,q",    0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2       },
1214 {"tne",     "s,j",      0x040e0000, 0xfc1f0000, RD_s|TRAP,      I2              }, /* tnei */
1215 {"tne",     "s,I",      0,    (int) M_TNE_I,    INSN_MACRO,     I2      },
1216 {"trunc.l.d", "D,S",    0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3      },
1217 {"trunc.l.s", "D,S",    0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3      },
1218 {"trunc.w.d", "D,S",    0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2      },
1219 {"trunc.w.d", "D,S,x",  0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2      },
1220 {"trunc.w.d", "D,S,t",  0,    (int) M_TRUNCWD,  INSN_MACRO,     I1      },
1221 {"trunc.w.s", "D,S",    0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2      },
1222 {"trunc.w.s", "D,S,x",  0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2      },
1223 {"trunc.w.s", "D,S,t",  0,    (int) M_TRUNCWS,  INSN_MACRO,     I1      },
1224 {"uld",     "t,o(b)",   0,    (int) M_ULD,      INSN_MACRO,     I3      },
1225 {"uld",     "t,A(b)",   0,    (int) M_ULD_A,    INSN_MACRO,     I3      },
1226 {"ulh",     "t,o(b)",   0,    (int) M_ULH,      INSN_MACRO,     I1      },
1227 {"ulh",     "t,A(b)",   0,    (int) M_ULH_A,    INSN_MACRO,     I1      },
1228 {"ulhu",    "t,o(b)",   0,    (int) M_ULHU,     INSN_MACRO,     I1      },
1229 {"ulhu",    "t,A(b)",   0,    (int) M_ULHU_A,   INSN_MACRO,     I1      },
1230 {"ulw",     "t,o(b)",   0,    (int) M_ULW,      INSN_MACRO,     I1      },
1231 {"ulw",     "t,A(b)",   0,    (int) M_ULW_A,    INSN_MACRO,     I1      },
1232 {"usd",     "t,o(b)",   0,    (int) M_USD,      INSN_MACRO,     I3      },
1233 {"usd",     "t,A(b)",   0,    (int) M_USD_A,    INSN_MACRO,     I3      },
1234 {"ush",     "t,o(b)",   0,    (int) M_USH,      INSN_MACRO,     I1      },
1235 {"ush",     "t,A(b)",   0,    (int) M_USH_A,    INSN_MACRO,     I1      },
1236 {"usw",     "t,o(b)",   0,    (int) M_USW,      INSN_MACRO,     I1      },
1237 {"usw",     "t,A(b)",   0,    (int) M_USW_A,    INSN_MACRO,     I1      },
1238 {"xor",     "d,v,t",    0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1      },
1239 {"xor",     "t,r,I",    0,    (int) M_XOR_I,    INSN_MACRO,     I1      },
1240 {"xori",    "t,r,i",    0x38000000, 0xfc000000, WR_t|RD_s,      I1      },
1241 {"wait",    "",         0x42000020, 0xffffffff, TRAP,   I3      },
1242 {"waiti",   "",         0x42000020, 0xffffffff, TRAP,   L1      },
1243 {"wb",      "o(b)",     0xbc040000, 0xfc1f0000, SM|RD_b,        L1      },
1244   /* start-sanitize-cygnus */
1245 {"add.ob",  "D,S,T",    0x4ac0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1246 {"add.ob",  "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1247 {"add.ob",  "D,S,k",    0x4bc0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1248 {"alni.ob", "D,S,T,%",  0x48000018, 0xff00003f, WR_D|RD_S|RD_T, N5      },
1249 {"and.ob",  "D,S,T",    0x4ac0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1250 {"and.ob",  "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1251 {"and.ob",  "D,S,k",    0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1252 {"c.eq.ob", "S,T",      0x4ac00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1253 {"c.eq.ob", "S,T[e]",   0x48000001, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1254 {"c.eq.ob", "S,k",      0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1255 {"c.le.ob", "S,T",      0x4ac00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1256 {"c.le.ob", "S,T[e]",   0x48000005, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1257 {"c.le.ob", "S,k",      0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1258 {"c.lt.ob", "S,T",      0x4ac00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1259 {"c.lt.ob", "S,T[e]",   0x48000004, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1260 {"c.lt.ob", "S,k",      0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1261 {"max.ob",  "D,S,T",    0x4ac00007, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1262 {"max.ob",  "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1263 {"max.ob",  "D,S,k",    0x4bc00007, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1264 {"min.ob",  "D,S,T",    0x4ac00006, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1265 {"min.ob",  "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1266 {"min.ob",  "D,S,k",    0x4bc00006, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1267 {"mul.ob",  "D,S,T",    0x4ac00030, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1268 {"mul.ob",  "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1269 {"mul.ob",  "D,S,k",    0x4bc00030, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1270 {"mula.ob", "S,T",      0x4ac00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1271 {"mula.ob", "S,T[e]",   0x48000033, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1272 {"mula.ob", "S,k",      0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1273 {"mull.ob", "S,T",      0x4ac00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1274 {"mull.ob", "S,T[e]",   0x48000433, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1275 {"mull.ob", "S,k",      0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1276 {"muls.ob", "S,T",      0x4ac00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1277 {"muls.ob", "S,T[e]",   0x48000032, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1278 {"muls.ob", "S,k",      0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1279 {"mulsl.ob","S,T",      0x4ac00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1280 {"mulsl.ob","S,T[e]",   0x48000432, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
1281 {"mulsl.ob","S,k",      0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
1282 {"nor.ob",  "D,S,T",    0x4ac0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1283 {"nor.ob",  "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1284 {"nor.ob",  "D,S,k",    0x4bc0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1285 {"or.ob",   "D,S,T",    0x4ac0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1286 {"or.ob",   "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1287 {"or.ob",   "D,S,k",    0x4bc0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1288 {"pickf.ob", "D,S,T",   0x4ac00002, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1289 {"pickf.ob", "D,S,T[e]", 0x48000002, 0xfe20003f, WR_D|RD_S|RD_T,        N5      },
1290 {"pickf.ob", "D,S,k",   0x4bc00002, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1291 {"pickt.ob", "D,S,T",   0x4ac00003, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1292 {"pickt.ob", "D,S,T[e]", 0x48000003, 0xfe20003f, WR_D|RD_S|RD_T,        N5      },
1293 {"pickt.ob", "D,S,k",   0x4bc00003, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1294 {"rach.ob", "D",        0x4a00003f, 0xfffff83f, WR_D, N5        },
1295 {"racl.ob", "D",        0x4800003f, 0xfffff83f, WR_D, N5        },
1296 {"racm.ob", "D",        0x4900003f, 0xfffff83f, WR_D, N5        },
1297 {"rzu.ob",  "D,k",      0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T, N5      },
1298 {"shfl.mixh.ob","D,S,T",0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1299 {"shfl.mixl.ob","D,S,T",0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1300 {"shfl.pach.ob","D,S,T",0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1301 {"shfl.pacl.ob","D,S,T",0x4940001f, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1302 {"sll.ob",  "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1303 {"sll.ob",  "D,S,k",    0x4bc00010, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1304 {"srl.ob",  "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1305 {"srl.ob",  "D,S,k",    0x4bc00012, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1306 {"sub.ob",  "D,S,T",    0x4ac0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1307 {"sub.ob",  "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1308 {"sub.ob",  "D,S,k",    0x4bc0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1309 {"wach.ob", "S",        0x4a00003e, 0xffff07ff, RD_S, N5        },
1310 {"wacl.ob", "S,T",      0x4800003e, 0xffe007ff, RD_S|RD_T, N5   },
1311 {"xor.ob",  "D,S,T",    0x4ac0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1312 {"xor.ob",  "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D|RD_S|RD_T, N5      },
1313 {"xor.ob",  "D,S,k",    0x4bc0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5      },
1314   /* end-sanitize-cygnus */
1315 /* No hazard protection on coprocessor instructions--they shouldn't
1316    change the state of the processor and if they do it's up to the
1317    user to put in nops as necessary.  These are at the end so that the
1318    disasembler recognizes more specific versions first.  */
1319 {"c0",      "C",        0x42000000, 0xfe000000, 0,      I1              },
1320 {"c1",      "C",        0x46000000, 0xfe000000, 0,      I1              },
1321 {"c2",      "C",        0x4a000000, 0xfe000000, 0,      I1              },
1322 {"c3",      "C",        0x4e000000, 0xfe000000, 0,      I1              },
1323 {"cop0",     "C",       0,    (int) M_COP0,     INSN_MACRO,     I1      },
1324 {"cop1",     "C",       0,    (int) M_COP1,     INSN_MACRO,     I1      },
1325 {"cop2",     "C",       0,    (int) M_COP2,     INSN_MACRO,     I1      },
1326 {"cop3",     "C",       0,    (int) M_COP3,     INSN_MACRO,     I1      },
1327
1328   /* Conflicts with the 4650's "mul" instruction.  Nobody's using the
1329      4010 any more, so move this insn out of the way.  If the object
1330      format gave us more info, we could do this right.  */
1331 {"addciu",  "t,r,j",    0x70000000, 0xfc000000, WR_t|RD_s,L1    },
1332 };
1333
1334 #define MIPS_NUM_OPCODES \
1335         ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1336 const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
1337
1338 /* const removed from the following to allow for dynamic extensions to the
1339  * built-in instruction set. */
1340 struct mips_opcode *mips_opcodes =
1341   (struct mips_opcode *) mips_builtin_opcodes;
1342 int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
1343 #undef MIPS_NUM_OPCODES
1344