* mips-opc.c (MT32): New define.
[external/binutils.git] / opcodes / mips-opc.c
1 /* mips-opc.c -- MIPS opcode list.
2    Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3    2003, 2004, 2005 Free Software Foundation, Inc.
4    Contributed by Ralph Campbell and OSF
5    Commented and modified by Ian Lance Taylor, Cygnus Support
6    Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
7    MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom
8    Corporation (SiByte).
9
10 This file is part of GDB, GAS, and the GNU binutils.
11
12 GDB, GAS, and the GNU binutils are free software; you can redistribute
13 them and/or modify them under the terms of the GNU General Public
14 License as published by the Free Software Foundation; either version
15 1, or (at your option) any later version.
16
17 GDB, GAS, and the GNU binutils are distributed in the hope that they
18 will be useful, but WITHOUT ANY WARRANTY; without even the implied
19 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
20 the GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this file; see the file COPYING.  If not, write to the Free
24 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
25
26 #include <stdio.h>
27 #include "sysdep.h"
28 #include "opcode/mips.h"
29
30 /* Short hand so the lines aren't too long.  */
31
32 #define LDD     INSN_LOAD_MEMORY_DELAY
33 #define LCD     INSN_LOAD_COPROC_DELAY
34 #define UBD     INSN_UNCOND_BRANCH_DELAY
35 #define CBD     INSN_COND_BRANCH_DELAY
36 #define COD     INSN_COPROC_MOVE_DELAY
37 #define CLD     INSN_COPROC_MEMORY_DELAY
38 #define CBL     INSN_COND_BRANCH_LIKELY
39 #define TRAP    INSN_TRAP
40 #define SM      INSN_STORE_MEMORY
41
42 #define WR_d    INSN_WRITE_GPR_D
43 #define WR_t    INSN_WRITE_GPR_T
44 #define WR_31   INSN_WRITE_GPR_31
45 #define WR_D    INSN_WRITE_FPR_D
46 #define WR_T    INSN_WRITE_FPR_T
47 #define WR_S    INSN_WRITE_FPR_S
48 #define RD_s    INSN_READ_GPR_S
49 #define RD_b    INSN_READ_GPR_S
50 #define RD_t    INSN_READ_GPR_T
51 #define RD_S    INSN_READ_FPR_S
52 #define RD_T    INSN_READ_FPR_T
53 #define RD_R    INSN_READ_FPR_R
54 #define WR_CC   INSN_WRITE_COND_CODE
55 #define RD_CC   INSN_READ_COND_CODE
56 #define RD_C0   INSN_COP
57 #define RD_C1   INSN_COP
58 #define RD_C2   INSN_COP
59 #define RD_C3   INSN_COP
60 #define WR_C0   INSN_COP
61 #define WR_C1   INSN_COP
62 #define WR_C2   INSN_COP
63 #define WR_C3   INSN_COP
64
65 #define WR_HI   INSN_WRITE_HI
66 #define RD_HI   INSN_READ_HI
67 #define MOD_HI  WR_HI|RD_HI
68
69 #define WR_LO   INSN_WRITE_LO
70 #define RD_LO   INSN_READ_LO
71 #define MOD_LO  WR_LO|RD_LO
72
73 #define WR_HILO WR_HI|WR_LO
74 #define RD_HILO RD_HI|RD_LO
75 #define MOD_HILO WR_HILO|RD_HILO
76
77 #define IS_M    INSN_MULT
78
79 #define WR_MACC INSN2_WRITE_MDMX_ACC
80 #define RD_MACC INSN2_READ_MDMX_ACC
81
82 #define I1      INSN_ISA1
83 #define I2      INSN_ISA2
84 #define I3      INSN_ISA3
85 #define I4      INSN_ISA4
86 #define I5      INSN_ISA5
87 #define I32     INSN_ISA32
88 #define I64     INSN_ISA64
89 #define I33     INSN_ISA32R2
90 #define I65     INSN_ISA64R2
91
92 /* MIPS64 MIPS-3D ASE support.  */
93 #define I16     INSN_MIPS16
94
95 /* MIPS64 MIPS-3D ASE support.  */
96 #define M3D     INSN_MIPS3D
97
98 /* MIPS64 MDMX ASE support.  */
99 #define MX      INSN_MDMX
100
101 #define P3      INSN_4650
102 #define L1      INSN_4010
103 #define V1      (INSN_4100 | INSN_4111 | INSN_4120)
104 #define T3      INSN_3900
105 #define M1      INSN_10000
106 #define SB1     INSN_SB1
107 #define N411    INSN_4111
108 #define N412    INSN_4120
109 #define N5      (INSN_5400 | INSN_5500)
110 #define N54     INSN_5400
111 #define N55     INSN_5500
112
113 #define G1      (T3             \
114                  )
115
116 #define G2      (T3             \
117                  )
118
119 #define G3      (I4             \
120                  )
121
122 /* MIPS DSP ASE support.
123    NOTE:
124    1. MIPS DSP ASE includes 4 accumulators ($ac0 - $ac3).  $ac0 is the pair
125    of original HI and LO.  $ac1, $ac2 and $ac3 are new registers, and have
126    the same structure as $ac0 (HI + LO).  For DSP instructions that write or
127    read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a
128    (RD_HILO) attritubes, such that HILO dependences are maintained
129    conservatively.
130
131    2. For some mul. instructions that use integer registers as destinations
132    but destroy HI+LO as side-effect, we add WR_HILO to their attritubes.
133
134    3. MIPS DSP ASE includes a new DSP control register, which has 6 fields
135    (ccond, outflag, EFI, c, scount, pos).  Many DSP instructions read or write
136    certain fields of the DSP control register.  For simplicity, we decide not
137    to track dependences of these fields.
138    However, "bposge32" is a branch instruction that depends on the "pos"
139    field.  In order to make sure that GAS does not reorder DSP instructions
140    that writes the "pos" field and "bposge32", we add DSP_VOLA (INSN_TRAP)
141    attritube to those instructions that write the "pos" field.  */
142
143 #define WR_a    WR_HILO /* Write dsp accumulators (reuse WR_HILO)  */
144 #define RD_a    RD_HILO /* Read dsp accumulators (reuse RD_HILO)  */
145 #define MOD_a   WR_a|RD_a
146 #define DSP_VOLA        INSN_TRAP
147 #define D32     (INSN_DSP)
148
149 /* MIPS MT ASE support.  */
150 #define MT32    (INSN_MT)
151
152 /* The order of overloaded instructions matters.  Label arguments and
153    register arguments look the same. Instructions that can have either
154    for arguments must apear in the correct order in this table for the
155    assembler to pick the right one. In other words, entries with
156    immediate operands must apear after the same instruction with
157    registers.
158
159    Because of the lookup algorithm used, entries with the same opcode
160    name must be contiguous.
161  
162    Many instructions are short hand for other instructions (i.e., The
163    jal <register> instruction is short for jalr <register>).  */
164
165 const struct mips_opcode mips_builtin_opcodes[] =
166 {
167 /* These instructions appear first so that the disassembler will find
168    them first.  The assemblers uses a hash table based on the
169    instruction name anyhow.  */
170 /* name,    args,       match,      mask,       pinfo,                  pinfo2,         membership */
171 {"pref",    "k,o(b)",   0xcc000000, 0xfc000000, RD_b,                   0,              I4|I32|G3       },
172 {"prefx",   "h,t(b)",   0x4c00000f, 0xfc0007ff, RD_b|RD_t,              0,              I4      },
173 {"nop",     "",         0x00000000, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
174 {"ssnop",   "",         0x00000040, 0xffffffff, 0,                      INSN2_ALIAS,    I32|N55 }, /* sll */
175 {"ehb",     "",         0x000000c0, 0xffffffff, 0,                      INSN2_ALIAS,    I33     }, /* sll */
176 {"li",      "t,j",      0x24000000, 0xffe00000, WR_t,                   INSN2_ALIAS,    I1      }, /* addiu */
177 {"li",      "t,i",      0x34000000, 0xffe00000, WR_t,                   INSN2_ALIAS,    I1      }, /* ori */
178 {"li",      "t,I",      0,    (int) M_LI,       INSN_MACRO,             0,              I1      },
179 {"move",    "d,s",      0,    (int) M_MOVE,     INSN_MACRO,             0,              I1      },
180 {"move",    "d,s",      0x0000002d, 0xfc1f07ff, WR_d|RD_s,              INSN2_ALIAS,    I3      },/* daddu */
181 {"move",    "d,s",      0x00000021, 0xfc1f07ff, WR_d|RD_s,              INSN2_ALIAS,    I1      },/* addu */
182 {"move",    "d,s",      0x00000025, 0xfc1f07ff, WR_d|RD_s,              INSN2_ALIAS,    I1      },/* or */
183 {"b",       "p",        0x10000000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1      },/* beq 0,0 */
184 {"b",       "p",        0x04010000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1      },/* bgez 0 */
185 {"bal",     "p",        0x04110000, 0xffff0000, UBD|WR_31,              INSN2_ALIAS,    I1      },/* bgezal 0*/
186
187 {"abs",     "d,v",      0,    (int) M_ABS,      INSN_MACRO,             0,              I1      },
188 {"abs.s",   "D,V",      0x46000005, 0xffff003f, WR_D|RD_S|FP_S,         0,              I1      },
189 {"abs.d",   "D,V",      0x46200005, 0xffff003f, WR_D|RD_S|FP_D,         0,              I1      },
190 {"abs.ps",  "D,V",      0x46c00005, 0xffff003f, WR_D|RD_S|FP_D,         0,              I5      },
191 {"add",     "d,v,t",    0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
192 {"add",     "t,r,I",    0,    (int) M_ADD_I,    INSN_MACRO,             0,              I1      },
193 {"add.s",   "D,V,T",    0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
194 {"add.d",   "D,V,T",    0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
195 {"add.ob",  "X,Y,Q",    0x7800000b, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
196 {"add.ob",  "D,S,T",    0x4ac0000b, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
197 {"add.ob",  "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
198 {"add.ob",  "D,S,k",    0x4bc0000b, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
199 {"add.ps",  "D,V,T",    0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
200 {"add.qh",  "X,Y,Q",    0x7820000b, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
201 {"adda.ob", "Y,Q",      0x78000037, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
202 {"adda.qh", "Y,Q",      0x78200037, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
203 {"addi",    "t,r,j",    0x20000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
204 {"addiu",   "t,r,j",    0x24000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
205 {"addl.ob", "Y,Q",      0x78000437, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
206 {"addl.qh", "Y,Q",      0x78200437, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
207 {"addr.ps", "D,S,T",    0x46c00018, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              M3D     },
208 {"addu",    "d,v,t",    0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
209 {"addu",    "t,r,I",    0,    (int) M_ADDU_I,   INSN_MACRO,             0,              I1      },
210 {"alni.ob", "X,Y,Z,O",  0x78000018, 0xff00003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
211 {"alni.ob", "D,S,T,%",  0x48000018, 0xff00003f, WR_D|RD_S|RD_T,         0,              N54     },
212 {"alni.qh", "X,Y,Z,O",  0x7800001a, 0xff00003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
213 {"alnv.ps", "D,V,T,s",  0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
214 {"alnv.ob", "X,Y,Z,s",  0x78000019, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, 0,            MX|SB1  },
215 {"alnv.qh", "X,Y,Z,s",  0x7800001b, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, 0,            MX      },
216 {"and",     "d,v,t",    0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
217 {"and",     "t,r,I",    0,    (int) M_AND_I,    INSN_MACRO,             0,              I1      },
218 {"and.ob",  "X,Y,Q",    0x7800000c, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
219 {"and.ob",  "D,S,T",    0x4ac0000c, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
220 {"and.ob",  "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
221 {"and.ob",  "D,S,k",    0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
222 {"and.qh",  "X,Y,Q",    0x7820000c, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
223 {"andi",    "t,r,i",    0x30000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
224 /* b is at the top of the table.  */
225 /* bal is at the top of the table.  */
226 /* bc0[tf]l? are at the bottom of the table.  */
227 {"bc1any2f", "N,p",     0x45200000, 0xffe30000, CBD|RD_CC|FP_S,         0,              M3D     },
228 {"bc1any2t", "N,p",     0x45210000, 0xffe30000, CBD|RD_CC|FP_S,         0,              M3D     },
229 {"bc1any4f", "N,p",     0x45400000, 0xffe30000, CBD|RD_CC|FP_S,         0,              M3D     },
230 {"bc1any4t", "N,p",     0x45410000, 0xffe30000, CBD|RD_CC|FP_S,         0,              M3D     },
231 {"bc1f",    "p",        0x45000000, 0xffff0000, CBD|RD_CC|FP_S,         0,              I1      },
232 {"bc1f",    "N,p",      0x45000000, 0xffe30000, CBD|RD_CC|FP_S,         0,              I4|I32  },
233 {"bc1fl",   "p",        0x45020000, 0xffff0000, CBL|RD_CC|FP_S,         0,              I2|T3   },
234 {"bc1fl",   "N,p",      0x45020000, 0xffe30000, CBL|RD_CC|FP_S,         0,              I4|I32  },
235 {"bc1t",    "p",        0x45010000, 0xffff0000, CBD|RD_CC|FP_S,         0,              I1      },
236 {"bc1t",    "N,p",      0x45010000, 0xffe30000, CBD|RD_CC|FP_S,         0,              I4|I32  },
237 {"bc1tl",   "p",        0x45030000, 0xffff0000, CBL|RD_CC|FP_S,         0,              I2|T3   },
238 {"bc1tl",   "N,p",      0x45030000, 0xffe30000, CBL|RD_CC|FP_S,         0,              I4|I32  },
239 /* bc2* are at the bottom of the table.  */
240 {"bc3f",    "p",        0x4d000000, 0xffff0000, CBD|RD_CC,              0,              I1      },
241 {"bc3fl",   "p",        0x4d020000, 0xffff0000, CBL|RD_CC,              0,              I2|T3   },
242 {"bc3t",    "p",        0x4d010000, 0xffff0000, CBD|RD_CC,              0,              I1      },
243 {"bc3tl",   "p",        0x4d030000, 0xffff0000, CBL|RD_CC,              0,              I2|T3   },
244 {"beqz",    "s,p",      0x10000000, 0xfc1f0000, CBD|RD_s,               0,              I1      },
245 {"beqzl",   "s,p",      0x50000000, 0xfc1f0000, CBL|RD_s,               0,              I2|T3   },
246 {"beq",     "s,t,p",    0x10000000, 0xfc000000, CBD|RD_s|RD_t,          0,              I1      },
247 {"beq",     "s,I,p",    0,    (int) M_BEQ_I,    INSN_MACRO,             0,              I1      },
248 {"beql",    "s,t,p",    0x50000000, 0xfc000000, CBL|RD_s|RD_t,          0,              I2|T3   },
249 {"beql",    "s,I,p",    0,    (int) M_BEQL_I,   INSN_MACRO,             0,              I2|T3   },
250 {"bge",     "s,t,p",    0,    (int) M_BGE,      INSN_MACRO,             0,              I1      },
251 {"bge",     "s,I,p",    0,    (int) M_BGE_I,    INSN_MACRO,             0,              I1      },
252 {"bgel",    "s,t,p",    0,    (int) M_BGEL,     INSN_MACRO,             0,              I2|T3   },
253 {"bgel",    "s,I,p",    0,    (int) M_BGEL_I,   INSN_MACRO,             0,              I2|T3   },
254 {"bgeu",    "s,t,p",    0,    (int) M_BGEU,     INSN_MACRO,             0,              I1      },
255 {"bgeu",    "s,I,p",    0,    (int) M_BGEU_I,   INSN_MACRO,             0,              I1      },
256 {"bgeul",   "s,t,p",    0,    (int) M_BGEUL,    INSN_MACRO,             0,              I2|T3   },
257 {"bgeul",   "s,I,p",    0,    (int) M_BGEUL_I,  INSN_MACRO,             0,              I2|T3   },
258 {"bgez",    "s,p",      0x04010000, 0xfc1f0000, CBD|RD_s,               0,              I1      },
259 {"bgezl",   "s,p",      0x04030000, 0xfc1f0000, CBL|RD_s,               0,              I2|T3   },
260 {"bgezal",  "s,p",      0x04110000, 0xfc1f0000, CBD|RD_s|WR_31,         0,              I1      },
261 {"bgezall", "s,p",      0x04130000, 0xfc1f0000, CBL|RD_s|WR_31,         0,              I2|T3   },
262 {"bgt",     "s,t,p",    0,    (int) M_BGT,      INSN_MACRO,             0,              I1      },
263 {"bgt",     "s,I,p",    0,    (int) M_BGT_I,    INSN_MACRO,             0,              I1      },
264 {"bgtl",    "s,t,p",    0,    (int) M_BGTL,     INSN_MACRO,             0,              I2|T3   },
265 {"bgtl",    "s,I,p",    0,    (int) M_BGTL_I,   INSN_MACRO,             0,              I2|T3   },
266 {"bgtu",    "s,t,p",    0,    (int) M_BGTU,     INSN_MACRO,             0,              I1      },
267 {"bgtu",    "s,I,p",    0,    (int) M_BGTU_I,   INSN_MACRO,             0,              I1      },
268 {"bgtul",   "s,t,p",    0,    (int) M_BGTUL,    INSN_MACRO,             0,              I2|T3   },
269 {"bgtul",   "s,I,p",    0,    (int) M_BGTUL_I,  INSN_MACRO,             0,              I2|T3   },
270 {"bgtz",    "s,p",      0x1c000000, 0xfc1f0000, CBD|RD_s,               0,              I1      },
271 {"bgtzl",   "s,p",      0x5c000000, 0xfc1f0000, CBL|RD_s,               0,              I2|T3   },
272 {"ble",     "s,t,p",    0,    (int) M_BLE,      INSN_MACRO,             0,              I1      },
273 {"ble",     "s,I,p",    0,    (int) M_BLE_I,    INSN_MACRO,             0,              I1      },
274 {"blel",    "s,t,p",    0,    (int) M_BLEL,     INSN_MACRO,             0,              I2|T3   },
275 {"blel",    "s,I,p",    0,    (int) M_BLEL_I,   INSN_MACRO,             0,              I2|T3   },
276 {"bleu",    "s,t,p",    0,    (int) M_BLEU,     INSN_MACRO,             0,              I1      },
277 {"bleu",    "s,I,p",    0,    (int) M_BLEU_I,   INSN_MACRO,             0,              I1      },
278 {"bleul",   "s,t,p",    0,    (int) M_BLEUL,    INSN_MACRO,             0,              I2|T3   },
279 {"bleul",   "s,I,p",    0,    (int) M_BLEUL_I,  INSN_MACRO,             0,              I2|T3   },
280 {"blez",    "s,p",      0x18000000, 0xfc1f0000, CBD|RD_s,               0,              I1      },
281 {"blezl",   "s,p",      0x58000000, 0xfc1f0000, CBL|RD_s,               0,              I2|T3   },
282 {"blt",     "s,t,p",    0,    (int) M_BLT,      INSN_MACRO,             0,              I1      },
283 {"blt",     "s,I,p",    0,    (int) M_BLT_I,    INSN_MACRO,             0,              I1      },
284 {"bltl",    "s,t,p",    0,    (int) M_BLTL,     INSN_MACRO,             0,              I2|T3   },
285 {"bltl",    "s,I,p",    0,    (int) M_BLTL_I,   INSN_MACRO,             0,              I2|T3   },
286 {"bltu",    "s,t,p",    0,    (int) M_BLTU,     INSN_MACRO,             0,              I1      },
287 {"bltu",    "s,I,p",    0,    (int) M_BLTU_I,   INSN_MACRO,             0,              I1      },
288 {"bltul",   "s,t,p",    0,    (int) M_BLTUL,    INSN_MACRO,             0,              I2|T3   },
289 {"bltul",   "s,I,p",    0,    (int) M_BLTUL_I,  INSN_MACRO,             0,              I2|T3   },
290 {"bltz",    "s,p",      0x04000000, 0xfc1f0000, CBD|RD_s,               0,              I1      },
291 {"bltzl",   "s,p",      0x04020000, 0xfc1f0000, CBL|RD_s,               0,              I2|T3   },
292 {"bltzal",  "s,p",      0x04100000, 0xfc1f0000, CBD|RD_s|WR_31,         0,              I1      },
293 {"bltzall", "s,p",      0x04120000, 0xfc1f0000, CBL|RD_s|WR_31,         0,              I2|T3   },
294 {"bnez",    "s,p",      0x14000000, 0xfc1f0000, CBD|RD_s,               0,              I1      },
295 {"bnezl",   "s,p",      0x54000000, 0xfc1f0000, CBL|RD_s,               0,              I2|T3   },
296 {"bne",     "s,t,p",    0x14000000, 0xfc000000, CBD|RD_s|RD_t,          0,              I1      },
297 {"bne",     "s,I,p",    0,    (int) M_BNE_I,    INSN_MACRO,             0,              I1      },
298 {"bnel",    "s,t,p",    0x54000000, 0xfc000000, CBL|RD_s|RD_t,          0,              I2|T3   },
299 {"bnel",    "s,I,p",    0,    (int) M_BNEL_I,   INSN_MACRO,             0,              I2|T3   },
300 {"break",   "",         0x0000000d, 0xffffffff, TRAP,                   0,              I1      },
301 {"break",   "c",        0x0000000d, 0xfc00ffff, TRAP,                   0,              I1      },
302 {"break",   "c,q",      0x0000000d, 0xfc00003f, TRAP,                   0,              I1      },
303 {"c.f.d",   "S,T",      0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
304 {"c.f.d",   "M,S,T",    0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
305 {"c.f.s",   "S,T",      0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
306 {"c.f.s",   "M,S,T",    0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
307 {"c.f.ps",  "S,T",      0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
308 {"c.f.ps",  "M,S,T",    0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
309 {"c.un.d",  "S,T",      0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
310 {"c.un.d",  "M,S,T",    0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
311 {"c.un.s",  "S,T",      0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
312 {"c.un.s",  "M,S,T",    0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
313 {"c.un.ps", "S,T",      0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
314 {"c.un.ps", "M,S,T",    0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
315 {"c.eq.d",  "S,T",      0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
316 {"c.eq.d",  "M,S,T",    0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
317 {"c.eq.s",  "S,T",      0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
318 {"c.eq.s",  "M,S,T",    0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
319 {"c.eq.ob", "Y,Q",      0x78000001, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D,   0,              MX|SB1  },
320 {"c.eq.ob", "S,T",      0x4ac00001, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
321 {"c.eq.ob", "S,T[e]",   0x48000001, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
322 {"c.eq.ob", "S,k",      0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
323 {"c.eq.ps", "S,T",      0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
324 {"c.eq.ps", "M,S,T",    0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
325 {"c.eq.qh", "Y,Q",      0x78200001, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D,   0,              MX      },
326 {"c.ueq.d", "S,T",      0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
327 {"c.ueq.d", "M,S,T",    0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
328 {"c.ueq.s", "S,T",      0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
329 {"c.ueq.s", "M,S,T",    0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
330 {"c.ueq.ps","S,T",      0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
331 {"c.ueq.ps","M,S,T",    0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
332 {"c.olt.d", "S,T",      0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
333 {"c.olt.d", "M,S,T",    0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
334 {"c.olt.s", "S,T",      0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
335 {"c.olt.s", "M,S,T",    0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
336 {"c.olt.ps","S,T",      0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
337 {"c.olt.ps","M,S,T",    0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
338 {"c.ult.d", "S,T",      0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
339 {"c.ult.d", "M,S,T",    0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
340 {"c.ult.s", "S,T",      0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
341 {"c.ult.s", "M,S,T",    0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
342 {"c.ult.ps","S,T",      0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
343 {"c.ult.ps","M,S,T",    0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
344 {"c.ole.d", "S,T",      0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
345 {"c.ole.d", "M,S,T",    0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
346 {"c.ole.s", "S,T",      0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
347 {"c.ole.s", "M,S,T",    0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
348 {"c.ole.ps","S,T",      0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
349 {"c.ole.ps","M,S,T",    0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
350 {"c.ule.d", "S,T",      0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
351 {"c.ule.d", "M,S,T",    0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
352 {"c.ule.s", "S,T",      0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
353 {"c.ule.s", "M,S,T",    0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
354 {"c.ule.ps","S,T",      0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
355 {"c.ule.ps","M,S,T",    0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
356 {"c.sf.d",  "S,T",      0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
357 {"c.sf.d",  "M,S,T",    0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
358 {"c.sf.s",  "S,T",      0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
359 {"c.sf.s",  "M,S,T",    0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
360 {"c.sf.ps", "S,T",      0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
361 {"c.sf.ps", "M,S,T",    0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
362 {"c.ngle.d","S,T",      0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
363 {"c.ngle.d","M,S,T",    0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
364 {"c.ngle.s","S,T",      0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
365 {"c.ngle.s","M,S,T",    0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
366 {"c.ngle.ps","S,T",     0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
367 {"c.ngle.ps","M,S,T",   0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
368 {"c.seq.d", "S,T",      0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
369 {"c.seq.d", "M,S,T",    0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
370 {"c.seq.s", "S,T",      0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
371 {"c.seq.s", "M,S,T",    0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
372 {"c.seq.ps","S,T",      0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
373 {"c.seq.ps","M,S,T",    0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
374 {"c.ngl.d", "S,T",      0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
375 {"c.ngl.d", "M,S,T",    0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
376 {"c.ngl.s", "S,T",      0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
377 {"c.ngl.s", "M,S,T",    0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
378 {"c.ngl.ps","S,T",      0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
379 {"c.ngl.ps","M,S,T",    0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
380 {"c.lt.d",  "S,T",      0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
381 {"c.lt.d",  "M,S,T",    0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
382 {"c.lt.s",  "S,T",      0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
383 {"c.lt.s",  "M,S,T",    0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
384 {"c.lt.ob", "Y,Q",      0x78000004, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D,   0,              MX|SB1  },
385 {"c.lt.ob", "S,T",      0x4ac00004, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
386 {"c.lt.ob", "S,T[e]",   0x48000004, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
387 {"c.lt.ob", "S,k",      0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
388 {"c.lt.ps", "S,T",      0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
389 {"c.lt.ps", "M,S,T",    0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
390 {"c.lt.qh", "Y,Q",      0x78200004, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D,   0,              MX      },
391 {"c.nge.d", "S,T",      0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
392 {"c.nge.d", "M,S,T",    0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
393 {"c.nge.s", "S,T",      0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
394 {"c.nge.s", "M,S,T",    0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
395 {"c.nge.ps","S,T",      0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
396 {"c.nge.ps","M,S,T",    0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
397 {"c.le.d",  "S,T",      0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
398 {"c.le.d",  "M,S,T",    0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
399 {"c.le.s",  "S,T",      0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
400 {"c.le.s",  "M,S,T",    0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
401 {"c.le.ob", "Y,Q",      0x78000005, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D,   0,              MX|SB1  },
402 {"c.le.ob", "S,T",      0x4ac00005, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
403 {"c.le.ob", "S,T[e]",   0x48000005, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
404 {"c.le.ob", "S,k",      0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
405 {"c.le.ps", "S,T",      0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
406 {"c.le.ps", "M,S,T",    0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
407 {"c.le.qh", "Y,Q",      0x78200005, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D,   0,              MX      },
408 {"c.ngt.d", "S,T",      0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
409 {"c.ngt.d", "M,S,T",    0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I4|I32  },
410 {"c.ngt.s", "S,T",      0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
411 {"c.ngt.s", "M,S,T",    0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              I4|I32  },
412 {"c.ngt.ps","S,T",      0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
413 {"c.ngt.ps","M,S,T",    0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              I5      },
414 {"cabs.eq.d",  "M,S,T", 0x46200072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
415 {"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
416 {"cabs.eq.s",  "M,S,T", 0x46000072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
417 {"cabs.f.d",   "M,S,T", 0x46200070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
418 {"cabs.f.ps",  "M,S,T", 0x46c00070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
419 {"cabs.f.s",   "M,S,T", 0x46000070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
420 {"cabs.le.d",  "M,S,T", 0x4620007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
421 {"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
422 {"cabs.le.s",  "M,S,T", 0x4600007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
423 {"cabs.lt.d",  "M,S,T", 0x4620007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
424 {"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
425 {"cabs.lt.s",  "M,S,T", 0x4600007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
426 {"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
427 {"cabs.nge.ps","M,S,T", 0x46c0007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
428 {"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
429 {"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
430 {"cabs.ngl.ps","M,S,T", 0x46c0007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
431 {"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
432 {"cabs.ngle.d","M,S,T", 0x46200079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
433 {"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
434 {"cabs.ngle.s","M,S,T", 0x46000079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
435 {"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
436 {"cabs.ngt.ps","M,S,T", 0x46c0007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
437 {"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
438 {"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
439 {"cabs.ole.ps","M,S,T", 0x46c00076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
440 {"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
441 {"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
442 {"cabs.olt.ps","M,S,T", 0x46c00074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
443 {"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
444 {"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
445 {"cabs.seq.ps","M,S,T", 0x46c0007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
446 {"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
447 {"cabs.sf.d",  "M,S,T", 0x46200078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
448 {"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
449 {"cabs.sf.s",  "M,S,T", 0x46000078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
450 {"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
451 {"cabs.ueq.ps","M,S,T", 0x46c00073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
452 {"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
453 {"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
454 {"cabs.ule.ps","M,S,T", 0x46c00077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
455 {"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
456 {"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
457 {"cabs.ult.ps","M,S,T", 0x46c00075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
458 {"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
459 {"cabs.un.d",  "M,S,T", 0x46200071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
460 {"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   0,              M3D     },
461 {"cabs.un.s",  "M,S,T", 0x46000071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   0,              M3D     },
462 {"cache",   "k,o(b)",   0xbc000000, 0xfc000000, RD_b,                   0,              I3|I32|T3},
463 {"ceil.l.d", "D,S",     0x4620000a, 0xffff003f, WR_D|RD_S|FP_D,         0,              I3      },
464 {"ceil.l.s", "D,S",     0x4600000a, 0xffff003f, WR_D|RD_S|FP_S,         0,              I3      },
465 {"ceil.w.d", "D,S",     0x4620000e, 0xffff003f, WR_D|RD_S|FP_D,         0,              I2      },
466 {"ceil.w.s", "D,S",     0x4600000e, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
467 {"cfc0",    "t,G",      0x40400000, 0xffe007ff, LCD|WR_t|RD_C0,         0,              I1      },
468 {"cfc1",    "t,G",      0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S,    0,              I1      },
469 {"cfc1",    "t,S",      0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S,    0,              I1      },
470 /* cfc2 is at the bottom of the table.  */
471 {"cfc3",    "t,G",      0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3,         0,              I1      },
472 {"cftc1",   "d,E",      0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0,            MT32    },
473 {"cftc1",   "d,T",      0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0,            MT32    },
474 {"cftc2",   "d,E",      0x41000025, 0xffe007ff, TRAP|LCD|WR_d|RD_C2,    0,              MT32    },
475 {"clo",     "U,s",      0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s,         0,              I32|N55 },
476 {"clz",     "U,s",      0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s,         0,              I32|N55 },
477 {"ctc0",    "t,G",      0x40c00000, 0xffe007ff, COD|RD_t|WR_CC,         0,              I1      },
478 {"ctc1",    "t,G",      0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S,    0,              I1      },
479 {"ctc1",    "t,S",      0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S,    0,              I1      },
480 /* ctc2 is at the bottom of the table.  */
481 {"ctc3",    "t,G",      0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC,         0,              I1      },
482 {"cttc1",   "t,g",      0x41800023, 0xffe007ff, TRAP|COD|RD_t|WR_CC|FP_S, 0,            MT32    },
483 {"cttc1",   "t,S",      0x41800023, 0xffe007ff, TRAP|COD|RD_t|WR_CC|FP_S, 0,            MT32    },
484 {"cttc2",   "t,g",      0x41800025, 0xffe007ff, TRAP|COD|RD_t|WR_CC,    0,              MT32    },
485 {"cvt.d.l", "D,S",      0x46a00021, 0xffff003f, WR_D|RD_S|FP_D,         0,              I3      },
486 {"cvt.d.s", "D,S",      0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S,    0,              I1      },
487 {"cvt.d.w", "D,S",      0x46800021, 0xffff003f, WR_D|RD_S|FP_D,         0,              I1      },
488 {"cvt.l.d", "D,S",      0x46200025, 0xffff003f, WR_D|RD_S|FP_D,         0,              I3      },
489 {"cvt.l.s", "D,S",      0x46000025, 0xffff003f, WR_D|RD_S|FP_S,         0,              I3      },
490 {"cvt.s.l", "D,S",      0x46a00020, 0xffff003f, WR_D|RD_S|FP_S,         0,              I3      },
491 {"cvt.s.d", "D,S",      0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              I1      },
492 {"cvt.s.w", "D,S",      0x46800020, 0xffff003f, WR_D|RD_S|FP_S,         0,              I1      },
493 {"cvt.s.pl","D,S",      0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              I5      },
494 {"cvt.s.pu","D,S",      0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              I5      },
495 {"cvt.w.d", "D,S",      0x46200024, 0xffff003f, WR_D|RD_S|FP_D,         0,              I1      },
496 {"cvt.w.s", "D,S",      0x46000024, 0xffff003f, WR_D|RD_S|FP_S,         0,              I1      },
497 {"cvt.ps.pw", "D,S",    0x46800026, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              M3D     },
498 {"cvt.ps.s","D,V,T",    0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
499 {"cvt.pw.ps", "D,S",    0x46c00024, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              M3D     },
500 {"dabs",    "d,v",      0,    (int) M_DABS,     INSN_MACRO,             0,              I3      },
501 {"dadd",    "d,v,t",    0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
502 {"dadd",    "t,r,I",    0,    (int) M_DADD_I,   INSN_MACRO,             0,              I3      },
503 {"daddi",   "t,r,j",    0x60000000, 0xfc000000, WR_t|RD_s,              0,              I3      },
504 {"daddiu",  "t,r,j",    0x64000000, 0xfc000000, WR_t|RD_s,              0,              I3      },
505 {"daddu",   "d,v,t",    0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
506 {"daddu",   "t,r,I",    0,    (int) M_DADDU_I,  INSN_MACRO,             0,              I3      },
507 {"dbreak",  "",         0x7000003f, 0xffffffff, 0,                      0,              N5      },
508 {"dclo",    "U,s",      0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t,         0,              I64|N55 },
509 {"dclz",    "U,s",      0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t,         0,              I64|N55 },
510 /* dctr and dctw are used on the r5000.  */
511 {"dctr",    "o(b)",     0xbc050000, 0xfc1f0000, RD_b,                   0,              I3      },
512 {"dctw",    "o(b)",     0xbc090000, 0xfc1f0000, RD_b,                   0,              I3      },
513 {"deret",   "",         0x4200001f, 0xffffffff, 0,                      0,              I32|G2  },
514 {"dext",    "t,r,I,+I", 0,    (int) M_DEXT,     INSN_MACRO,             0,              I65     },
515 {"dext",    "t,r,+A,+C", 0x7c000003, 0xfc00003f, WR_t|RD_s,             0,              I65     },
516 {"dextm",   "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_t|RD_s,             0,              I65     },
517 {"dextu",   "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_t|RD_s,             0,              I65     },
518 /* For ddiv, see the comments about div.  */
519 {"ddiv",    "z,s,t",    0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
520 {"ddiv",    "d,v,t",    0,    (int) M_DDIV_3,   INSN_MACRO,             0,              I3      },
521 {"ddiv",    "d,v,I",    0,    (int) M_DDIV_3I,  INSN_MACRO,             0,              I3      },
522 /* For ddivu, see the comments about div.  */
523 {"ddivu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
524 {"ddivu",   "d,v,t",    0,    (int) M_DDIVU_3,  INSN_MACRO,             0,              I3      },
525 {"ddivu",   "d,v,I",    0,    (int) M_DDIVU_3I, INSN_MACRO,             0,              I3      },
526 {"di",      "",         0x41606000, 0xffffffff, WR_t|WR_C0,             0,              I33     },
527 {"di",      "t",        0x41606000, 0xffe0ffff, WR_t|WR_C0,             0,              I33     },
528 {"dins",    "t,r,I,+I", 0,    (int) M_DINS,     INSN_MACRO,             0,              I65     },
529 {"dins",    "t,r,+A,+B", 0x7c000007, 0xfc00003f, WR_t|RD_s,             0,              I65     },
530 {"dinsm",   "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_t|RD_s,             0,              I65     },
531 {"dinsu",   "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_t|RD_s,             0,              I65     },
532 /* The MIPS assembler treats the div opcode with two operands as
533    though the first operand appeared twice (the first operand is both
534    a source and a destination).  To get the div machine instruction,
535    you must use an explicit destination of $0.  */
536 {"div",     "z,s,t",    0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
537 {"div",     "z,t",      0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
538 {"div",     "d,v,t",    0,    (int) M_DIV_3,    INSN_MACRO,             0,              I1      },
539 {"div",     "d,v,I",    0,    (int) M_DIV_3I,   INSN_MACRO,             0,              I1      },
540 {"div.d",   "D,V,T",    0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
541 {"div.s",   "D,V,T",    0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
542 {"div.ps",  "D,V,T",    0x46c00003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              SB1     },
543 /* For divu, see the comments about div.  */
544 {"divu",    "z,s,t",    0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
545 {"divu",    "z,t",      0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
546 {"divu",    "d,v,t",    0,    (int) M_DIVU_3,   INSN_MACRO,             0,              I1      },
547 {"divu",    "d,v,I",    0,    (int) M_DIVU_3I,  INSN_MACRO,             0,              I1      },
548 {"dla",     "t,A(b)",   0,    (int) M_DLA_AB,   INSN_MACRO,             0,              I3      },
549 {"dlca",    "t,A(b)",   0,    (int) M_DLCA_AB,  INSN_MACRO,             0,              I3      },
550 {"dli",     "t,j",      0x24000000, 0xffe00000, WR_t,                   0,              I3      }, /* addiu */
551 {"dli",     "t,i",      0x34000000, 0xffe00000, WR_t,                   0,              I3      }, /* ori */
552 {"dli",     "t,I",      0,    (int) M_DLI,      INSN_MACRO,             0,              I3      },
553 {"dmacc",   "d,s,t",    0x00000029, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
554 {"dmacchi", "d,s,t",    0x00000229, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
555 {"dmacchis", "d,s,t",   0x00000629, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
556 {"dmacchiu", "d,s,t",   0x00000269, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
557 {"dmacchius", "d,s,t",  0x00000669, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
558 {"dmaccs",  "d,s,t",    0x00000429, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
559 {"dmaccu",  "d,s,t",    0x00000069, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
560 {"dmaccus", "d,s,t",    0x00000469, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,   0,              N412    },
561 {"dmadd16", "s,t",      0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO,       0,              N411    },
562 {"dmfc0",   "t,G",      0x40200000, 0xffe007ff, LCD|WR_t|RD_C0,         0,              I3      },
563 {"dmfc0",   "t,+D",     0x40200000, 0xffe007f8, LCD|WR_t|RD_C0,         0,              I64     },
564 {"dmfc0",   "t,G,H",    0x40200000, 0xffe007f8, LCD|WR_t|RD_C0,         0,              I64     },
565 {"dmt",     "",         0x41600bc1, 0xffffffff, TRAP,                   0,              MT32    },
566 {"dmt",     "t",        0x41600bc1, 0xffe0ffff, TRAP|WR_t,              0,              MT32    },
567 {"dmtc0",   "t,G",      0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC,   0,              I3      },
568 {"dmtc0",   "t,+D",     0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   0,              I64     },
569 {"dmtc0",   "t,G,H",    0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   0,              I64     },
570 {"dmfc1",   "t,S",      0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     0,              I3      },
571 {"dmfc1",   "t,G",      0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     0,              I3      },
572 {"dmtc1",   "t,S",      0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     0,              I3      },
573 {"dmtc1",   "t,G",      0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     0,              I3      },
574 /* dmfc2 is at the bottom of the table.  */
575 /* dmtc2 is at the bottom of the table.  */
576 {"dmfc3",   "t,G",      0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3,         0,              I3      },
577 {"dmfc3",   "t,G,H",    0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3,         0,              I64     },
578 {"dmtc3",   "t,G",      0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC,   0,              I3      },
579 {"dmtc3",   "t,G,H",    0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC,   0,              I64     },
580 {"dmul",    "d,v,t",    0,    (int) M_DMUL,     INSN_MACRO,             0,              I3      },
581 {"dmul",    "d,v,I",    0,    (int) M_DMUL_I,   INSN_MACRO,             0,              I3      },
582 {"dmulo",   "d,v,t",    0,    (int) M_DMULO,    INSN_MACRO,             0,              I3      },
583 {"dmulo",   "d,v,I",    0,    (int) M_DMULO_I,  INSN_MACRO,             0,              I3      },
584 {"dmulou",  "d,v,t",    0,    (int) M_DMULOU,   INSN_MACRO,             0,              I3      },
585 {"dmulou",  "d,v,I",    0,    (int) M_DMULOU_I, INSN_MACRO,             0,              I3      },
586 {"dmult",   "s,t",      0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
587 {"dmultu",  "s,t",      0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
588 {"dneg",    "d,w",      0x0000002e, 0xffe007ff, WR_d|RD_t,              0,              I3      }, /* dsub 0 */
589 {"dnegu",   "d,w",      0x0000002f, 0xffe007ff, WR_d|RD_t,              0,              I3      }, /* dsubu 0*/
590 {"drem",    "z,s,t",    0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
591 {"drem",    "d,v,t",    3,    (int) M_DREM_3,   INSN_MACRO,             0,              I3      },
592 {"drem",    "d,v,I",    3,    (int) M_DREM_3I,  INSN_MACRO,             0,              I3      },
593 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
594 {"dremu",   "d,v,t",    3,    (int) M_DREMU_3,  INSN_MACRO,             0,              I3      },
595 {"dremu",   "d,v,I",    3,    (int) M_DREMU_3I, INSN_MACRO,             0,              I3      },
596 {"dret",    "",         0x7000003e, 0xffffffff, 0,                      0,              N5      },
597 {"drol",    "d,v,t",    0,    (int) M_DROL,     INSN_MACRO,             0,              I3      },
598 {"drol",    "d,v,I",    0,    (int) M_DROL_I,   INSN_MACRO,             0,              I3      },
599 {"dror",    "d,v,t",    0,    (int) M_DROR,     INSN_MACRO,             0,              I3      },
600 {"dror",    "d,v,I",    0,    (int) M_DROR_I,   INSN_MACRO,             0,              I3      },
601 {"dror",    "d,w,<",    0x0020003a, 0xffe0003f, WR_d|RD_t,              0,              N5|I65  },
602 {"drorv",   "d,t,s",    0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              N5|I65  },
603 {"dror32",  "d,w,<",    0x0020003e, 0xffe0003f, WR_d|RD_t,              0,              N5|I65  },
604 {"drotl",   "d,v,t",    0,    (int) M_DROL,     INSN_MACRO,             0,              I65     },
605 {"drotl",   "d,v,I",    0,    (int) M_DROL_I,   INSN_MACRO,             0,              I65     },
606 {"drotr",   "d,v,t",    0,    (int) M_DROR,     INSN_MACRO,             0,              I65     },
607 {"drotr",   "d,v,I",    0,    (int) M_DROR_I,   INSN_MACRO,             0,              I65     },
608 {"drotrv",  "d,t,s",    0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              I65     },
609 {"drotr32", "d,w,<",    0x0020003e, 0xffe0003f, WR_d|RD_t,              0,              I65     },
610 {"dsbh",    "d,w",      0x7c0000a4, 0xffe007ff, WR_d|RD_t,              0,              I65     },
611 {"dshd",    "d,w",      0x7c000164, 0xffe007ff, WR_d|RD_t,              0,              I65     },
612 {"dsllv",   "d,t,s",    0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      },
613 {"dsll32",  "d,w,<",    0x0000003c, 0xffe0003f, WR_d|RD_t,              0,              I3      },
614 {"dsll",    "d,w,s",    0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      }, /* dsllv */
615 {"dsll",    "d,w,>",    0x0000003c, 0xffe0003f, WR_d|RD_t,              0,              I3      }, /* dsll32 */
616 {"dsll",    "d,w,<",    0x00000038, 0xffe0003f, WR_d|RD_t,              0,              I3      },
617 {"dsrav",   "d,t,s",    0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      },
618 {"dsra32",  "d,w,<",    0x0000003f, 0xffe0003f, WR_d|RD_t,              0,              I3      },
619 {"dsra",    "d,w,s",    0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      }, /* dsrav */
620 {"dsra",    "d,w,>",    0x0000003f, 0xffe0003f, WR_d|RD_t,              0,              I3      }, /* dsra32 */
621 {"dsra",    "d,w,<",    0x0000003b, 0xffe0003f, WR_d|RD_t,              0,              I3      },
622 {"dsrlv",   "d,t,s",    0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      },
623 {"dsrl32",  "d,w,<",    0x0000003e, 0xffe0003f, WR_d|RD_t,              0,              I3      },
624 {"dsrl",    "d,w,s",    0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      }, /* dsrlv */
625 {"dsrl",    "d,w,>",    0x0000003e, 0xffe0003f, WR_d|RD_t,              0,              I3      }, /* dsrl32 */
626 {"dsrl",    "d,w,<",    0x0000003a, 0xffe0003f, WR_d|RD_t,              0,              I3      },
627 {"dsub",    "d,v,t",    0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
628 {"dsub",    "d,v,I",    0,    (int) M_DSUB_I,   INSN_MACRO,             0,              I3      },
629 {"dsubu",   "d,v,t",    0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
630 {"dsubu",   "d,v,I",    0,    (int) M_DSUBU_I,  INSN_MACRO,             0,              I3      },
631 {"dvpe",    "",         0x41600001, 0xffffffff, TRAP,                   0,              MT32    },
632 {"dvpe",    "t",        0x41600001, 0xffe0ffff, TRAP|WR_t,              0,              MT32    },
633 {"ei",      "",         0x41606020, 0xffffffff, WR_t|WR_C0,             0,              I33     },
634 {"ei",      "t",        0x41606020, 0xffe0ffff, WR_t|WR_C0,             0,              I33     },
635 {"emt",     "",         0x41600be1, 0xffffffff, TRAP,                   0,              MT32    },
636 {"emt",     "t",        0x41600be1, 0xffe0ffff, TRAP|WR_t,              0,              MT32    },
637 {"eret",    "",         0x42000018, 0xffffffff, 0,                      0,              I3|I32  },
638 {"evpe",    "",         0x41600021, 0xffffffff, TRAP,                   0,              MT32    },
639 {"evpe",    "t",        0x41600021, 0xffe0ffff, TRAP|WR_t,              0,              MT32    },
640 {"ext",     "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s,             0,              I33     },
641 {"floor.l.d", "D,S",    0x4620000b, 0xffff003f, WR_D|RD_S|FP_D,         0,              I3      },
642 {"floor.l.s", "D,S",    0x4600000b, 0xffff003f, WR_D|RD_S|FP_S,         0,              I3      },
643 {"floor.w.d", "D,S",    0x4620000f, 0xffff003f, WR_D|RD_S|FP_D,         0,              I2      },
644 {"floor.w.s", "D,S",    0x4600000f, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
645 {"flushi",  "",         0xbc010000, 0xffffffff, 0,                      0,              L1      },
646 {"flushd",  "",         0xbc020000, 0xffffffff, 0,                      0,              L1      },
647 {"flushid", "",         0xbc030000, 0xffffffff, 0,                      0,              L1      },
648 {"hibernate","",        0x42000023, 0xffffffff, 0,                      0,              V1      },
649 {"ins",     "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s,             0,              I33     },
650 {"jr",      "s",        0x00000008, 0xfc1fffff, UBD|RD_s,               0,              I1      },
651 {"jr.hb",   "s",        0x00000408, 0xfc1fffff, UBD|RD_s,               0,              I33     },
652 {"j",       "s",        0x00000008, 0xfc1fffff, UBD|RD_s,               0,              I1      }, /* jr */
653 /* SVR4 PIC code requires special handling for j, so it must be a
654    macro.  */
655 {"j",       "a",        0,     (int) M_J_A,     INSN_MACRO,             0,              I1      },
656 /* This form of j is used by the disassembler and internally by the
657    assembler, but will never match user input (because the line above
658    will match first).  */
659 {"j",       "a",        0x08000000, 0xfc000000, UBD,                    0,              I1      },
660 {"jalr",    "s",        0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d,          0,              I1      },
661 {"jalr",    "d,s",      0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d,          0,              I1      },
662 {"jalr.hb", "s",        0x0000fc09, 0xfc1fffff, UBD|RD_s|WR_d,          0,              I33     },
663 {"jalr.hb", "d,s",      0x00000409, 0xfc1f07ff, UBD|RD_s|WR_d,          0,              I33     },
664 /* SVR4 PIC code requires special handling for jal, so it must be a
665    macro.  */
666 {"jal",     "d,s",      0,     (int) M_JAL_2,   INSN_MACRO,             0,              I1      },
667 {"jal",     "s",        0,     (int) M_JAL_1,   INSN_MACRO,             0,              I1      },
668 {"jal",     "a",        0,     (int) M_JAL_A,   INSN_MACRO,             0,              I1      },
669 /* This form of jal is used by the disassembler and internally by the
670    assembler, but will never match user input (because the line above
671    will match first).  */
672 {"jal",     "a",        0x0c000000, 0xfc000000, UBD|WR_31,              0,              I1      },
673 {"jalx",    "a",        0x74000000, 0xfc000000, UBD|WR_31,              0,              I16     },
674 {"la",      "t,A(b)",   0,    (int) M_LA_AB,    INSN_MACRO,             0,              I1      },
675 {"lb",      "t,o(b)",   0x80000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
676 {"lb",      "t,A(b)",   0,    (int) M_LB_AB,    INSN_MACRO,             0,              I1      },
677 {"lbu",     "t,o(b)",   0x90000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
678 {"lbu",     "t,A(b)",   0,    (int) M_LBU_AB,   INSN_MACRO,             0,              I1      },
679 {"lca",     "t,A(b)",   0,    (int) M_LCA_AB,   INSN_MACRO,             0,              I1      },
680 {"ld",      "t,o(b)",   0xdc000000, 0xfc000000, WR_t|RD_b,              0,              I3      },
681 {"ld",      "t,o(b)",   0,    (int) M_LD_OB,    INSN_MACRO,             0,              I1      },
682 {"ld",      "t,A(b)",   0,    (int) M_LD_AB,    INSN_MACRO,             0,              I1      },
683 {"ldc1",    "T,o(b)",   0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     0,              I2      },
684 {"ldc1",    "E,o(b)",   0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     0,              I2      },
685 {"ldc1",    "T,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,             0,              I2      },
686 {"ldc1",    "E,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,             0,              I2      },
687 {"l.d",     "T,o(b)",   0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     0,              I2      }, /* ldc1 */
688 {"l.d",     "T,o(b)",   0,    (int) M_L_DOB,    INSN_MACRO,             0,              I1      },
689 {"l.d",     "T,A(b)",   0,    (int) M_L_DAB,    INSN_MACRO,             0,              I1      },
690 {"ldc2",    "E,o(b)",   0xd8000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I2      },
691 {"ldc2",    "E,A(b)",   0,    (int) M_LDC2_AB,  INSN_MACRO,             0,              I2      },
692 {"ldc3",    "E,o(b)",   0xdc000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I2      },
693 {"ldc3",    "E,A(b)",   0,    (int) M_LDC3_AB,  INSN_MACRO,             0,              I2      },
694 {"ldl",     "t,o(b)",   0x68000000, 0xfc000000, LDD|WR_t|RD_b,          0,              I3      },
695 {"ldl",     "t,A(b)",   0,    (int) M_LDL_AB,   INSN_MACRO,             0,              I3      },
696 {"ldr",     "t,o(b)",   0x6c000000, 0xfc000000, LDD|WR_t|RD_b,          0,              I3      },
697 {"ldr",     "t,A(b)",   0,    (int) M_LDR_AB,   INSN_MACRO,             0,              I3      },
698 {"ldxc1",   "D,t(b)",   0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,     0,              I4      },
699 {"lh",      "t,o(b)",   0x84000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
700 {"lh",      "t,A(b)",   0,    (int) M_LH_AB,    INSN_MACRO,             0,              I1      },
701 {"lhu",     "t,o(b)",   0x94000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
702 {"lhu",     "t,A(b)",   0,    (int) M_LHU_AB,   INSN_MACRO,             0,              I1      },
703 /* li is at the start of the table.  */
704 {"li.d",    "t,F",      0,    (int) M_LI_D,     INSN_MACRO,             0,              I1      },
705 {"li.d",    "T,L",      0,    (int) M_LI_DD,    INSN_MACRO,             0,              I1      },
706 {"li.s",    "t,f",      0,    (int) M_LI_S,     INSN_MACRO,             0,              I1      },
707 {"li.s",    "T,l",      0,    (int) M_LI_SS,    INSN_MACRO,             0,              I1      },
708 {"ll",      "t,o(b)",   0xc0000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I2      },
709 {"ll",      "t,A(b)",   0,    (int) M_LL_AB,    INSN_MACRO,             0,              I2      },
710 {"lld",     "t,o(b)",   0xd0000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I3      },
711 {"lld",     "t,A(b)",   0,    (int) M_LLD_AB,   INSN_MACRO,             0,              I3      },
712 {"lui",     "t,u",      0x3c000000, 0xffe00000, WR_t,                   0,              I1      },
713 {"luxc1",   "D,t(b)",   0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,     0,              I5|N55  },
714 {"lw",      "t,o(b)",   0x8c000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
715 {"lw",      "t,A(b)",   0,    (int) M_LW_AB,    INSN_MACRO,             0,              I1      },
716 {"lwc0",    "E,o(b)",   0xc0000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I1      },
717 {"lwc0",    "E,A(b)",   0,    (int) M_LWC0_AB,  INSN_MACRO,             0,              I1      },
718 {"lwc1",    "T,o(b)",   0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     0,              I1      },
719 {"lwc1",    "E,o(b)",   0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     0,              I1      },
720 {"lwc1",    "T,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,             0,              I1      },
721 {"lwc1",    "E,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,             0,              I1      },
722 {"l.s",     "T,o(b)",   0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     0,              I1      }, /* lwc1 */
723 {"l.s",     "T,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,             0,              I1      },
724 {"lwc2",    "E,o(b)",   0xc8000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I1      },
725 {"lwc2",    "E,A(b)",   0,    (int) M_LWC2_AB,  INSN_MACRO,             0,              I1      },
726 {"lwc3",    "E,o(b)",   0xcc000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I1      },
727 {"lwc3",    "E,A(b)",   0,    (int) M_LWC3_AB,  INSN_MACRO,             0,              I1      },
728 {"lwl",     "t,o(b)",   0x88000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
729 {"lwl",     "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,             0,              I1      },
730 {"lcache",  "t,o(b)",   0x88000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I2      }, /* same */
731 {"lcache",  "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,             0,              I2      }, /* as lwl */
732 {"lwr",     "t,o(b)",   0x98000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
733 {"lwr",     "t,A(b)",   0,    (int) M_LWR_AB,   INSN_MACRO,             0,              I1      },
734 {"flush",   "t,o(b)",   0x98000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I2      }, /* same */
735 {"flush",   "t,A(b)",   0,    (int) M_LWR_AB,   INSN_MACRO,             0,              I2      }, /* as lwr */
736 {"fork",    "d,s,t",    0x7c000008, 0xfc0007ff, TRAP|WR_d|RD_s|RD_t,    0,              MT32    },
737 {"lwu",     "t,o(b)",   0x9c000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I3      },
738 {"lwu",     "t,A(b)",   0,    (int) M_LWU_AB,   INSN_MACRO,             0,              I3      },
739 {"lwxc1",   "D,t(b)",   0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,     0,              I4      },
740 {"macc",    "d,s,t",    0x00000028, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
741 {"macc",    "d,s,t",    0x00000158, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
742 {"maccs",   "d,s,t",    0x00000428, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
743 {"macchi",  "d,s,t",    0x00000228, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
744 {"macchi",  "d,s,t",    0x00000358, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
745 {"macchis", "d,s,t",    0x00000628, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
746 {"macchiu", "d,s,t",    0x00000268, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
747 {"macchiu", "d,s,t",    0x00000359, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
748 {"macchius","d,s,t",    0x00000668, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
749 {"maccu",   "d,s,t",    0x00000068, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
750 {"maccu",   "d,s,t",    0x00000159, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
751 {"maccus",  "d,s,t",    0x00000468, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N412    },
752 {"mad",     "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              P3      },
753 {"madu",    "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              P3      },
754 {"madd.d",  "D,R,S,T",  0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,    0,         I4      },
755 {"madd.s",  "D,R,S,T",  0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,    0,         I4      },
756 {"madd.ps", "D,R,S,T",  0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,    0,         I5      },
757 {"madd",    "s,t",      0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO,           0,         L1 },
758 {"madd",    "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO,          0,         I32|N55},
759 {"madd",    "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M,      0,         G1 },
760 {"madd",    "d,s,t",    0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, 0,         G1 },
761 {"maddu",   "s,t",      0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO,           0,         L1 },
762 {"maddu",   "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO,          0,         I32|N55},
763 {"maddu",   "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M,      0,         G1      },
764 {"maddu",   "d,s,t",    0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, 0,         G1      },
765 {"madd16",  "s,t",      0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              N411    },
766 {"max.ob",  "X,Y,Q",    0x78000007, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
767 {"max.ob",  "D,S,T",    0x4ac00007, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
768 {"max.ob",  "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
769 {"max.ob",  "D,S,k",    0x4bc00007, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
770 {"max.qh",  "X,Y,Q",    0x78200007, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
771 {"mfpc",    "t,P",      0x4000c801, 0xffe0ffc1, LCD|WR_t|RD_C0,         0,              M1|N5   },
772 {"mfps",    "t,P",      0x4000c800, 0xffe0ffc1, LCD|WR_t|RD_C0,         0,              M1|N5   },
773 {"mftacx",  "d",        0x41020021, 0xffff07ff, TRAP|WR_d|RD_a,         0,              MT32    },
774 {"mftacx",  "d,*",      0x41020021, 0xfff307ff, TRAP|WR_d|RD_a,         0,              MT32    },
775 {"mftc0",   "d,+t",     0x41000000, 0xffe007ff, TRAP|LCD|WR_d|RD_C0,    0,              MT32    },
776 {"mftc0",   "d,+T",     0x41000000, 0xffe007f8, TRAP|LCD|WR_d|RD_C0,    0,              MT32    },
777 {"mftc0",   "d,E,H",    0x41000000, 0xffe007f8, TRAP|LCD|WR_d|RD_C0,    0,              MT32    },
778 {"mftc1",   "d,T",      0x41000022, 0xffe007ff, TRAP|LCD|WR_d|RD_T|FP_S, 0,             MT32    },
779 {"mftc1",   "d,E",      0x41000022, 0xffe007ff, TRAP|LCD|WR_d|RD_T|FP_S, 0,             MT32    },
780 {"mftc2",   "d,E",      0x41000024, 0xffe007ff, TRAP|LCD|WR_d|RD_C2,    0,              MT32    },
781 {"mftdsp",  "d",        0x41100021, 0xffff07ff, TRAP|WR_d,              0,              MT32    },
782 {"mftgpr",  "d,t",      0x41000020, 0xffe007ff, TRAP|WR_d|RD_t,         0,              MT32    },
783 {"mfthc1",  "d,T",      0x41000032, 0xffe007ff, TRAP|LCD|WR_d|RD_T|FP_D, 0,             MT32    },
784 {"mfthc1",  "d,E",      0x41000032, 0xffe007ff, TRAP|LCD|WR_d|RD_T|FP_D, 0,             MT32    },
785 {"mfthc2",  "d,E",      0x41000034, 0xffe007ff, TRAP|LCD|WR_d|RD_C2,    0,              MT32    },
786 {"mfthi",   "d",        0x41010021, 0xffff07ff, TRAP|WR_d|RD_a,         0,              MT32    },
787 {"mfthi",   "d,*",      0x41010021, 0xfff307ff, TRAP|WR_d|RD_a,         0,              MT32    },
788 {"mftlo",   "d",        0x41000021, 0xffff07ff, TRAP|WR_d|RD_a,         0,              MT32    },
789 {"mftlo",   "d,*",      0x41000021, 0xfff307ff, TRAP|WR_d|RD_a,         0,              MT32    },
790 {"mftr",    "t,d,!,H,$", 0x41000000, 0xffe007c8, TRAP|WR_d,             0,              MT32    },
791 {"mfc0",    "t,G",      0x40000000, 0xffe007ff, LCD|WR_t|RD_C0,         0,              I1      },
792 {"mfc0",    "t,+D",     0x40000000, 0xffe007f8, LCD|WR_t|RD_C0,         0,              I32     },
793 {"mfc0",    "t,G,H",    0x40000000, 0xffe007f8, LCD|WR_t|RD_C0,         0,              I32     },
794 {"mfc1",    "t,S",      0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     0,              I1      },
795 {"mfc1",    "t,G",      0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     0,              I1      },
796 {"mfhc1",   "t,S",      0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     0,              I33     },
797 {"mfhc1",   "t,G",      0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     0,              I33     },
798 /* mfc2 is at the bottom of the table.  */
799 /* mfhc2 is at the bottom of the table.  */
800 {"mfc3",    "t,G",      0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3,         0,              I1      },
801 {"mfc3",    "t,G,H",    0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3,         0,              I32     },
802 {"mfdr",    "t,G",      0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0,         0,              N5      },
803 {"mfhi",    "d",        0x00000010, 0xffff07ff, WR_d|RD_HI,             0,              I1      },
804 {"mfhi",    "d,9",      0x00000010, 0xff9f07ff, WR_d|RD_HI,             0,              D32     },
805 {"mflo",    "d",        0x00000012, 0xffff07ff, WR_d|RD_LO,             0,              I1      },
806 {"mflo",    "d,9",      0x00000012, 0xff9f07ff, WR_d|RD_LO,             0,              D32     },
807 {"min.ob",  "X,Y,Q",    0x78000006, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
808 {"min.ob",  "D,S,T",    0x4ac00006, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
809 {"min.ob",  "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
810 {"min.ob",  "D,S,k",    0x4bc00006, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
811 {"min.qh",  "X,Y,Q",    0x78200006, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
812 {"mov.d",   "D,S",      0x46200006, 0xffff003f, WR_D|RD_S|FP_D,         0,              I1      },
813 {"mov.s",   "D,S",      0x46000006, 0xffff003f, WR_D|RD_S|FP_S,         0,              I1      },
814 {"mov.ps",  "D,S",      0x46c00006, 0xffff003f, WR_D|RD_S|FP_D,         0,              I5      },
815 {"movf",    "d,s,N",    0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, 0,           I4|I32},
816 {"movf.d",  "D,S,N",    0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              I4|I32  },
817 {"movf.l",  "D,S,N",    0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              MX|SB1  },
818 {"movf.l",  "X,Y,N",    0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              MX|SB1  },
819 {"movf.s",  "D,S,N",    0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   0,              I4|I32  },
820 {"movf.ps", "D,S,N",    0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              I5      },
821 {"movn",    "d,v,t",    0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I4|I32  },
822 {"ffc",     "d,v",      0x0000000b, 0xfc1f07ff, WR_d|RD_s,              0,              L1      },
823 {"movn.d",  "D,S,t",    0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              I4|I32  },
824 {"movn.l",  "D,S,t",    0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              MX|SB1  },
825 {"movn.l",  "X,Y,t",    0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              MX|SB1  },
826 {"movn.s",  "D,S,t",    0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    0,              I4|I32  },
827 {"movn.ps", "D,S,t",    0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              I5      },
828 {"movt",    "d,s,N",    0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC,        0,              I4|I32  },
829 {"movt.d",  "D,S,N",    0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              I4|I32  },
830 {"movt.l",  "D,S,N",    0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              MX|SB1  },
831 {"movt.l",  "X,Y,N",    0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              MX|SB1  },
832 {"movt.s",  "D,S,N",    0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   0,              I4|I32  },
833 {"movt.ps", "D,S,N",    0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   0,              I5      },
834 {"movz",    "d,v,t",    0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I4|I32  },
835 {"ffs",     "d,v",      0x0000000a, 0xfc1f07ff, WR_d|RD_s,              0,              L1      },
836 {"movz.d",  "D,S,t",    0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              I4|I32  },
837 {"movz.l",  "D,S,t",    0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              MX|SB1  },
838 {"movz.l",  "X,Y,t",    0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              MX|SB1  },
839 {"movz.s",  "D,S,t",    0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    0,              I4|I32  },
840 {"movz.ps", "D,S,t",    0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    0,              I5      },
841 {"msac",    "d,s,t",    0x000001d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
842 {"msacu",   "d,s,t",    0x000001d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
843 {"msachi",  "d,s,t",    0x000003d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
844 {"msachiu", "d,s,t",    0x000003d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
845 /* move is at the top of the table.  */
846 {"msgn.qh", "X,Y,Q",    0x78200000, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
847 {"msub.d",  "D,R,S,T",  0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I4      },
848 {"msub.s",  "D,R,S,T",  0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I4      },
849 {"msub.ps", "D,R,S,T",  0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I5      },
850 {"msub",    "s,t",      0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              L1      },
851 {"msub",    "s,t",      0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              I32|N55 },
852 {"msubu",   "s,t",      0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              L1      },
853 {"msubu",   "s,t",      0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              I32|N55 },
854 {"mtpc",    "t,P",      0x4080c801, 0xffe0ffc1, COD|RD_t|WR_C0,         0,              M1|N5   },
855 {"mtps",    "t,P",      0x4080c800, 0xffe0ffc1, COD|RD_t|WR_C0,         0,              M1|N5   },
856 {"mtc0",    "t,G",      0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC,   0,              I1      },
857 {"mtc0",    "t,+D",     0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   0,              I32     },
858 {"mtc0",    "t,G,H",    0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   0,              I32     },
859 {"mtc1",    "t,S",      0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     0,              I1      },
860 {"mtc1",    "t,G",      0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     0,              I1      },
861 {"mthc1",   "t,S",      0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     0,              I33     },
862 {"mthc1",   "t,G",      0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     0,              I33     },
863 /* mtc2 is at the bottom of the table.  */
864 /* mthc2 is at the bottom of the table.  */
865 {"mtc3",    "t,G",      0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC,   0,              I1      },
866 {"mtc3",    "t,G,H",    0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC,   0,              I32     },
867 {"mtdr",    "t,G",      0x7080003d, 0xffe007ff, COD|RD_t|WR_C0,         0,              N5      },
868 {"mthi",    "s",        0x00000011, 0xfc1fffff, RD_s|WR_HI,             0,              I1      },
869 {"mthi",    "s,7",      0x00000011, 0xfc1fe7ff, RD_s|WR_HI,             0,              D32     },
870 {"mtlo",    "s",        0x00000013, 0xfc1fffff, RD_s|WR_LO,             0,              I1      },
871 {"mtlo",    "s,7",      0x00000013, 0xfc1fe7ff, RD_s|WR_LO,             0,              D32     },
872 {"mttc0",   "t,G",      0x41800000, 0xffe007ff, TRAP|COD|RD_t|WR_C0|WR_CC, 0,           MT32    },
873 {"mttc0",   "t,+D",     0x41800000, 0xffe007f8, TRAP|COD|RD_t|WR_C0|WR_CC, 0,           MT32    },
874 {"mttc0",   "t,G,H",    0x41800000, 0xffe007f8, TRAP|COD|RD_t|WR_C0|WR_CC, 0,           MT32    },
875 {"mttc1",   "t,S",      0x41800022, 0xffe007ff, TRAP|COD|RD_t|WR_S|FP_S, 0,             MT32    },
876 {"mttc1",   "t,G",      0x41800022, 0xffe007ff, TRAP|COD|RD_t|WR_S|FP_S, 0,             MT32    },
877 {"mttc2",   "t,g",      0x41800024, 0xffe007ff, TRAP|COD|RD_t|WR_C2|WR_CC, 0,           MT32    },
878 {"mttacx",  "t",        0x41801021, 0xffe0ffff, TRAP|WR_a|RD_t,         0,              MT32    },
879 {"mttacx",  "t,&",      0x41801021, 0xffe09fff, TRAP|WR_a|RD_t,         0,              MT32    },
880 {"mttdsp",  "t",        0x41808021, 0xffe0ffff, TRAP|RD_t,              0,              MT32    },
881 {"mttgpr",  "t,d",      0x41800020, 0xffe007ff, TRAP|WR_d|RD_t,         0,              MT32    },
882 {"mtthc1",  "t,S",      0x41800032, 0xffe007ff, TRAP|COD|RD_t|WR_S|FP_D, 0,             MT32    },
883 {"mtthc1",  "t,G",      0x41800032, 0xffe007ff, TRAP|COD|RD_t|WR_S|FP_D, 0,             MT32    },
884 {"mtthc2",  "t,g",      0x41800034, 0xffe007ff, TRAP|COD|RD_t|WR_C2|WR_CC, 0,           MT32    },
885 {"mtthi",   "t",        0x41800821, 0xffe0ffff, TRAP|WR_a|RD_t,         0,              MT32    },
886 {"mtthi",   "t,&",      0x41800821, 0xffe09fff, TRAP|WR_a|RD_t,         0,              MT32    },
887 {"mttlo",   "t",        0x41800021, 0xffe0ffff, TRAP|WR_a|RD_t,         0,              MT32    },
888 {"mttlo",   "t,&",      0x41800021, 0xffe09fff, TRAP|WR_a|RD_t,         0,              MT32    },
889 {"mttr",    "t,d,!,H,$", 0x41800000, 0xffe007c8, TRAP|RD_t,             0,              MT32    },
890 {"mul.d",   "D,V,T",    0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
891 {"mul.s",   "D,V,T",    0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
892 {"mul.ob",  "X,Y,Q",    0x78000030, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
893 {"mul.ob",  "D,S,T",    0x4ac00030, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
894 {"mul.ob",  "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
895 {"mul.ob",  "D,S,k",    0x4bc00030, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
896 {"mul.ps",  "D,V,T",    0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
897 {"mul.qh",  "X,Y,Q",    0x78200030, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
898 {"mul",     "d,v,t",    0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,              I32|P3|N55},
899 {"mul",     "d,s,t",    0x00000058, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N54     },
900 {"mul",     "d,v,t",    0,    (int) M_MUL,      INSN_MACRO,             0,              I1      },
901 {"mul",     "d,v,I",    0,    (int) M_MUL_I,    INSN_MACRO,             0,              I1      },
902 {"mula.ob", "Y,Q",      0x78000033, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
903 {"mula.ob", "S,T",      0x4ac00033, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
904 {"mula.ob", "S,T[e]",   0x48000033, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
905 {"mula.ob", "S,k",      0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
906 {"mula.qh", "Y,Q",      0x78200033, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
907 {"mulhi",   "d,s,t",    0x00000258, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
908 {"mulhiu",  "d,s,t",    0x00000259, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
909 {"mull.ob", "Y,Q",      0x78000433, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
910 {"mull.ob", "S,T",      0x4ac00433, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
911 {"mull.ob", "S,T[e]",   0x48000433, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
912 {"mull.ob", "S,k",      0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
913 {"mull.qh", "Y,Q",      0x78200433, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
914 {"mulo",    "d,v,t",    0,    (int) M_MULO,     INSN_MACRO,             0,              I1      },
915 {"mulo",    "d,v,I",    0,    (int) M_MULO_I,   INSN_MACRO,             0,              I1      },
916 {"mulou",   "d,v,t",    0,    (int) M_MULOU,    INSN_MACRO,             0,              I1      },
917 {"mulou",   "d,v,I",    0,    (int) M_MULOU_I,  INSN_MACRO,             0,              I1      },
918 {"mulr.ps", "D,S,T",    0x46c0001a, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              M3D     },
919 {"muls",    "d,s,t",    0x000000d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
920 {"mulsu",   "d,s,t",    0x000000d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
921 {"mulshi",  "d,s,t",    0x000002d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
922 {"mulshiu", "d,s,t",    0x000002d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
923 {"muls.ob", "Y,Q",      0x78000032, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
924 {"muls.ob", "S,T",      0x4ac00032, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
925 {"muls.ob", "S,T[e]",   0x48000032, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
926 {"muls.ob", "S,k",      0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
927 {"muls.qh", "Y,Q",      0x78200032, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
928 {"mulsl.ob", "Y,Q",     0x78000432, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
929 {"mulsl.ob", "S,T",     0x4ac00432, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
930 {"mulsl.ob", "S,T[e]",  0x48000432, 0xfe2007ff, WR_CC|RD_S|RD_T,        0,              N54     },
931 {"mulsl.ob", "S,k",     0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T,        0,              N54     },
932 {"mulsl.qh", "Y,Q",     0x78200432, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
933 {"mult",    "s,t",      0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0,              I1      },
934 {"mult",    "d,s,t",    0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, 0,         G1      },
935 {"multu",   "s,t",      0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0,              I1      },
936 {"multu",   "d,s,t",    0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, 0,         G1      },
937 {"mulu",    "d,s,t",    0x00000059, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0,              N5      },
938 {"neg",     "d,w",      0x00000022, 0xffe007ff, WR_d|RD_t,              0,              I1      }, /* sub 0 */
939 {"negu",    "d,w",      0x00000023, 0xffe007ff, WR_d|RD_t,              0,              I1      }, /* subu 0 */
940 {"neg.d",   "D,V",      0x46200007, 0xffff003f, WR_D|RD_S|FP_D,         0,              I1      },
941 {"neg.s",   "D,V",      0x46000007, 0xffff003f, WR_D|RD_S|FP_S,         0,              I1      },
942 {"neg.ps",  "D,V",      0x46c00007, 0xffff003f, WR_D|RD_S|FP_D,         0,              I5      },
943 {"nmadd.d", "D,R,S,T",  0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I4      },
944 {"nmadd.s", "D,R,S,T",  0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I4      },
945 {"nmadd.ps","D,R,S,T",  0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I5      },
946 {"nmsub.d", "D,R,S,T",  0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I4      },
947 {"nmsub.s", "D,R,S,T",  0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I4      },
948 {"nmsub.ps","D,R,S,T",  0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I5      },
949 /* nop is at the start of the table.  */
950 {"nor",     "d,v,t",    0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
951 {"nor",     "t,r,I",    0,    (int) M_NOR_I,    INSN_MACRO,             0,              I1      },
952 {"nor.ob",  "X,Y,Q",    0x7800000f, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
953 {"nor.ob",  "D,S,T",    0x4ac0000f, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
954 {"nor.ob",  "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
955 {"nor.ob",  "D,S,k",    0x4bc0000f, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
956 {"nor.qh",  "X,Y,Q",    0x7820000f, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
957 {"not",     "d,v",      0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t,         0,              I1      },/*nor d,s,0*/
958 {"or",      "d,v,t",    0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
959 {"or",      "t,r,I",    0,    (int) M_OR_I,     INSN_MACRO,             0,              I1      },
960 {"or.ob",   "X,Y,Q",    0x7800000e, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
961 {"or.ob",   "D,S,T",    0x4ac0000e, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
962 {"or.ob",   "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
963 {"or.ob",   "D,S,k",    0x4bc0000e, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
964 {"or.qh",   "X,Y,Q",    0x7820000e, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
965 {"ori",     "t,r,i",    0x34000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
966 {"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              SB1     },
967 {"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        SB1     },
968 {"pavg.ob", "X,Y,Q",    0x78000008, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              SB1     },
969 {"pickf.ob", "X,Y,Q",   0x78000002, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
970 {"pickf.ob", "D,S,T",   0x4ac00002, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
971 {"pickf.ob", "D,S,T[e]",0x48000002, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
972 {"pickf.ob", "D,S,k",   0x4bc00002, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
973 {"pickf.qh", "X,Y,Q",   0x78200002, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
974 {"pickt.ob", "X,Y,Q",   0x78000003, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
975 {"pickt.ob", "D,S,T",   0x4ac00003, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
976 {"pickt.ob", "D,S,T[e]",0x48000003, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
977 {"pickt.ob", "D,S,k",   0x4bc00003, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
978 {"pickt.qh", "X,Y,Q",   0x78200003, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
979 {"pll.ps",  "D,V,T",    0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
980 {"plu.ps",  "D,V,T",    0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
981   /* pref and prefx are at the start of the table.  */
982 {"pul.ps",  "D,V,T",    0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
983 {"puu.ps",  "D,V,T",    0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
984 {"rach.ob", "X",        0x7a00003f, 0xfffff83f, WR_D|FP_D,              RD_MACC,        MX|SB1  },
985 {"rach.ob", "D",        0x4a00003f, 0xfffff83f, WR_D,                   0,              N54     },
986 {"rach.qh", "X",        0x7a20003f, 0xfffff83f, WR_D|FP_D,              RD_MACC,        MX      },
987 {"racl.ob", "X",        0x7800003f, 0xfffff83f, WR_D|FP_D,              RD_MACC,        MX|SB1  },
988 {"racl.ob", "D",        0x4800003f, 0xfffff83f, WR_D,                   0,              N54     },
989 {"racl.qh", "X",        0x7820003f, 0xfffff83f, WR_D|FP_D,              RD_MACC,        MX      },
990 {"racm.ob", "X",        0x7900003f, 0xfffff83f, WR_D|FP_D,              RD_MACC,        MX|SB1  },
991 {"racm.ob", "D",        0x4900003f, 0xfffff83f, WR_D,                   0,              N54     },
992 {"racm.qh", "X",        0x7920003f, 0xfffff83f, WR_D|FP_D,              RD_MACC,        MX      },
993 {"recip.d", "D,S",      0x46200015, 0xffff003f, WR_D|RD_S|FP_D,         0,              I4      },
994 {"recip.ps","D,S",      0x46c00015, 0xffff003f, WR_D|RD_S|FP_D,         0,              SB1     },
995 {"recip.s", "D,S",      0x46000015, 0xffff003f, WR_D|RD_S|FP_S,         0,              I4      },
996 {"recip1.d",  "D,S",    0x4620001d, 0xffff003f, WR_D|RD_S|FP_D,         0,              M3D     },
997 {"recip1.ps", "D,S",    0x46c0001d, 0xffff003f, WR_D|RD_S|FP_S,         0,              M3D     },
998 {"recip1.s",  "D,S",    0x4600001d, 0xffff003f, WR_D|RD_S|FP_S,         0,              M3D     },
999 {"recip2.d",  "D,S,T",  0x4620001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              M3D     },
1000 {"recip2.ps", "D,S,T",  0x46c0001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              M3D     },
1001 {"recip2.s",  "D,S,T",  0x4600001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              M3D     },
1002 {"rem",     "z,s,t",    0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
1003 {"rem",     "d,v,t",    0,    (int) M_REM_3,    INSN_MACRO,             0,              I1      },
1004 {"rem",     "d,v,I",    0,    (int) M_REM_3I,   INSN_MACRO,             0,              I1      },
1005 {"remu",    "z,s,t",    0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
1006 {"remu",    "d,v,t",    0,    (int) M_REMU_3,   INSN_MACRO,             0,              I1      },
1007 {"remu",    "d,v,I",    0,    (int) M_REMU_3I,  INSN_MACRO,             0,              I1      },
1008 {"rdhwr",   "t,K",      0x7c00003b, 0xffe007ff, WR_t,                   0,              I33     },
1009 {"rdpgpr",  "d,w",      0x41400000, 0xffe007ff, WR_d,                   0,              I33     },
1010 {"rfe",     "",         0x42000010, 0xffffffff, 0,                      0,              I1|T3   },
1011 {"rnas.qh", "X,Q",      0x78200025, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX      },
1012 {"rnau.ob", "X,Q",      0x78000021, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX|SB1  },
1013 {"rnau.qh", "X,Q",      0x78200021, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX      },
1014 {"rnes.qh", "X,Q",      0x78200026, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX      },
1015 {"rneu.ob", "X,Q",      0x78000022, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX|SB1  },
1016 {"rneu.qh", "X,Q",      0x78200022, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX      },
1017 {"rol",     "d,v,t",    0,    (int) M_ROL,      INSN_MACRO,             0,              I1      },
1018 {"rol",     "d,v,I",    0,    (int) M_ROL_I,    INSN_MACRO,             0,              I1      },
1019 {"ror",     "d,v,t",    0,    (int) M_ROR,      INSN_MACRO,             0,              I1      },
1020 {"ror",     "d,v,I",    0,    (int) M_ROR_I,    INSN_MACRO,             0,              I1      },
1021 {"ror",     "d,w,<",    0x00200002, 0xffe0003f, WR_d|RD_t,              0,              N5|I33  },
1022 {"rorv",    "d,t,s",    0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              N5|I33  },
1023 {"rotl",    "d,v,t",    0,    (int) M_ROL,      INSN_MACRO,             0,              I33     },
1024 {"rotl",    "d,v,I",    0,    (int) M_ROL_I,    INSN_MACRO,             0,              I33     },
1025 {"rotr",    "d,v,t",    0,    (int) M_ROR,      INSN_MACRO,             0,              I33     },
1026 {"rotr",    "d,v,I",    0,    (int) M_ROR_I,    INSN_MACRO,             0,              I33     },
1027 {"rotrv",   "d,t,s",    0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              I33     },
1028 {"round.l.d", "D,S",    0x46200008, 0xffff003f, WR_D|RD_S|FP_D,         0,              I3      },
1029 {"round.l.s", "D,S",    0x46000008, 0xffff003f, WR_D|RD_S|FP_S,         0,              I3      },
1030 {"round.w.d", "D,S",    0x4620000c, 0xffff003f, WR_D|RD_S|FP_D,         0,              I2      },
1031 {"round.w.s", "D,S",    0x4600000c, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
1032 {"rsqrt.d", "D,S",      0x46200016, 0xffff003f, WR_D|RD_S|FP_D,         0,              I4      },
1033 {"rsqrt.ps","D,S",      0x46c00016, 0xffff003f, WR_D|RD_S|FP_D,         0,              SB1     },
1034 {"rsqrt.s", "D,S",      0x46000016, 0xffff003f, WR_D|RD_S|FP_S,         0,              I4      },
1035 {"rsqrt1.d",  "D,S",    0x4620001e, 0xffff003f, WR_D|RD_S|FP_D,         0,              M3D     },
1036 {"rsqrt1.ps", "D,S",    0x46c0001e, 0xffff003f, WR_D|RD_S|FP_S,         0,              M3D     },
1037 {"rsqrt1.s",  "D,S",    0x4600001e, 0xffff003f, WR_D|RD_S|FP_S,         0,              M3D     },
1038 {"rsqrt2.d",  "D,S,T",  0x4620001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              M3D     },
1039 {"rsqrt2.ps", "D,S,T",  0x46c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              M3D     },
1040 {"rsqrt2.s",  "D,S,T",  0x4600001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              M3D     },
1041 {"rzs.qh",  "X,Q",      0x78200024, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX      },
1042 {"rzu.ob",  "X,Q",      0x78000020, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX|SB1  },
1043 {"rzu.ob",  "D,k",      0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T,         0,              N54     },
1044 {"rzu.qh",  "X,Q",      0x78200020, 0xfc20f83f, WR_D|RD_T|FP_D,         RD_MACC,        MX      },
1045 {"sb",      "t,o(b)",   0xa0000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
1046 {"sb",      "t,A(b)",   0,    (int) M_SB_AB,    INSN_MACRO,             0,              I1      },
1047 {"sc",      "t,o(b)",   0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,      0,              I2      },
1048 {"sc",      "t,A(b)",   0,    (int) M_SC_AB,    INSN_MACRO,             0,              I2      },
1049 {"scd",     "t,o(b)",   0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,      0,              I3      },
1050 {"scd",     "t,A(b)",   0,    (int) M_SCD_AB,   INSN_MACRO,             0,              I3      },
1051 {"sd",      "t,o(b)",   0xfc000000, 0xfc000000, SM|RD_t|RD_b,           0,              I3      },
1052 {"sd",      "t,o(b)",   0,    (int) M_SD_OB,    INSN_MACRO,             0,              I1      },
1053 {"sd",      "t,A(b)",   0,    (int) M_SD_AB,    INSN_MACRO,             0,              I1      },
1054 {"sdbbp",   "",         0x0000000e, 0xffffffff, TRAP,                   0,              G2      },
1055 {"sdbbp",   "c",        0x0000000e, 0xfc00ffff, TRAP,                   0,              G2      },
1056 {"sdbbp",   "c,q",      0x0000000e, 0xfc00003f, TRAP,                   0,              G2      },
1057 {"sdbbp",   "",         0x7000003f, 0xffffffff, TRAP,                   0,              I32     },
1058 {"sdbbp",   "B",        0x7000003f, 0xfc00003f, TRAP,                   0,              I32     },
1059 {"sdc1",    "T,o(b)",   0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I2      },
1060 {"sdc1",    "E,o(b)",   0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I2      },
1061 {"sdc1",    "T,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,             0,              I2      },
1062 {"sdc1",    "E,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,             0,              I2      },
1063 {"sdc2",    "E,o(b)",   0xf8000000, 0xfc000000, SM|RD_C2|RD_b,          0,              I2      },
1064 {"sdc2",    "E,A(b)",   0,    (int) M_SDC2_AB,  INSN_MACRO,             0,              I2      },
1065 {"sdc3",    "E,o(b)",   0xfc000000, 0xfc000000, SM|RD_C3|RD_b,          0,              I2      },
1066 {"sdc3",    "E,A(b)",   0,    (int) M_SDC3_AB,  INSN_MACRO,             0,              I2      },
1067 {"s.d",     "T,o(b)",   0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I2      },
1068 {"s.d",     "T,o(b)",   0,    (int) M_S_DOB,    INSN_MACRO,             0,              I1      },
1069 {"s.d",     "T,A(b)",   0,    (int) M_S_DAB,    INSN_MACRO,             0,              I1      },
1070 {"sdl",     "t,o(b)",   0xb0000000, 0xfc000000, SM|RD_t|RD_b,           0,              I3      },
1071 {"sdl",     "t,A(b)",   0,    (int) M_SDL_AB,   INSN_MACRO,             0,              I3      },
1072 {"sdr",     "t,o(b)",   0xb4000000, 0xfc000000, SM|RD_t|RD_b,           0,              I3      },
1073 {"sdr",     "t,A(b)",   0,    (int) M_SDR_AB,   INSN_MACRO,             0,              I3      },
1074 {"sdxc1",   "S,t(b)",   0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b,      0,              I4      },
1075 {"seb",     "d,w",      0x7c000420, 0xffe007ff, WR_d|RD_t,              0,              I33     },
1076 {"seh",     "d,w",      0x7c000620, 0xffe007ff, WR_d|RD_t,              0,              I33     },
1077 {"selsl",   "d,v,t",    0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              L1      },
1078 {"selsr",   "d,v,t",    0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              L1      },
1079 {"seq",     "d,v,t",    0,    (int) M_SEQ,      INSN_MACRO,             0,              I1      },
1080 {"seq",     "d,v,I",    0,    (int) M_SEQ_I,    INSN_MACRO,             0,              I1      },
1081 {"sge",     "d,v,t",    0,    (int) M_SGE,      INSN_MACRO,             0,              I1      },
1082 {"sge",     "d,v,I",    0,    (int) M_SGE_I,    INSN_MACRO,             0,              I1      },
1083 {"sgeu",    "d,v,t",    0,    (int) M_SGEU,     INSN_MACRO,             0,              I1      },
1084 {"sgeu",    "d,v,I",    0,    (int) M_SGEU_I,   INSN_MACRO,             0,              I1      },
1085 {"sgt",     "d,v,t",    0,    (int) M_SGT,      INSN_MACRO,             0,              I1      },
1086 {"sgt",     "d,v,I",    0,    (int) M_SGT_I,    INSN_MACRO,             0,              I1      },
1087 {"sgtu",    "d,v,t",    0,    (int) M_SGTU,     INSN_MACRO,             0,              I1      },
1088 {"sgtu",    "d,v,I",    0,    (int) M_SGTU_I,   INSN_MACRO,             0,              I1      },
1089 {"sh",      "t,o(b)",   0xa4000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
1090 {"sh",      "t,A(b)",   0,    (int) M_SH_AB,    INSN_MACRO,             0,              I1      },
1091 {"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX      },
1092 {"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX|SB1  },
1093 {"shfl.mixh.ob", "D,S,T", 0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T,       0,              N54     },
1094 {"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX      },
1095 {"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX|SB1  },
1096 {"shfl.mixl.ob", "D,S,T", 0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T,       0,              N54     },
1097 {"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX      },
1098 {"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX|SB1  },
1099 {"shfl.pach.ob", "D,S,T", 0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T,       0,              N54     },
1100 {"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX      },
1101 {"shfl.pacl.ob", "D,S,T", 0x4940001f, 0xffe0003f, WR_D|RD_S|RD_T,       0,              N54     },
1102 {"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX      },
1103 {"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX      },
1104 {"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,  0,              MX|SB1  },
1105 {"sle",     "d,v,t",    0,    (int) M_SLE,      INSN_MACRO,             0,              I1      },
1106 {"sle",     "d,v,I",    0,    (int) M_SLE_I,    INSN_MACRO,             0,              I1      },
1107 {"sleu",    "d,v,t",    0,    (int) M_SLEU,     INSN_MACRO,             0,              I1      },
1108 {"sleu",    "d,v,I",    0,    (int) M_SLEU_I,   INSN_MACRO,             0,              I1      },
1109 {"sllv",    "d,t,s",    0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      },
1110 {"sll",     "d,w,s",    0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* sllv */
1111 {"sll",     "d,w,<",    0x00000000, 0xffe0003f, WR_d|RD_t,              0,              I1      },
1112 {"sll.ob",  "X,Y,Q",    0x78000010, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
1113 {"sll.ob",  "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
1114 {"sll.ob",  "D,S,k",    0x4bc00010, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
1115 {"sll.qh",  "X,Y,Q",    0x78200010, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
1116 {"slt",     "d,v,t",    0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
1117 {"slt",     "d,v,I",    0,    (int) M_SLT_I,    INSN_MACRO,             0,              I1      },
1118 {"slti",    "t,r,j",    0x28000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
1119 {"sltiu",   "t,r,j",    0x2c000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
1120 {"sltu",    "d,v,t",    0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
1121 {"sltu",    "d,v,I",    0,    (int) M_SLTU_I,   INSN_MACRO,             0,              I1      },
1122 {"sne",     "d,v,t",    0,    (int) M_SNE,      INSN_MACRO,             0,              I1      },
1123 {"sne",     "d,v,I",    0,    (int) M_SNE_I,    INSN_MACRO,             0,              I1      },
1124 {"sqrt.d",  "D,S",      0x46200004, 0xffff003f, WR_D|RD_S|FP_D,         0,              I2      },
1125 {"sqrt.s",  "D,S",      0x46000004, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
1126 {"sqrt.ps", "D,S",      0x46c00004, 0xffff003f, WR_D|RD_S|FP_D,         0,              SB1     },
1127 {"srav",    "d,t,s",    0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      },
1128 {"sra",     "d,w,s",    0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* srav */
1129 {"sra",     "d,w,<",    0x00000003, 0xffe0003f, WR_d|RD_t,              0,              I1      },
1130 {"sra.qh",  "X,Y,Q",    0x78200013, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
1131 {"srlv",    "d,t,s",    0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      },
1132 {"srl",     "d,w,s",    0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* srlv */
1133 {"srl",     "d,w,<",    0x00000002, 0xffe0003f, WR_d|RD_t,              0,              I1      },
1134 {"srl.ob",  "X,Y,Q",    0x78000012, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
1135 {"srl.ob",  "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
1136 {"srl.ob",  "D,S,k",    0x4bc00012, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
1137 {"srl.qh",  "X,Y,Q",    0x78200012, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
1138 /* ssnop is at the start of the table.  */
1139 {"standby", "",         0x42000021, 0xffffffff, 0,                      0,              V1      },
1140 {"sub",     "d,v,t",    0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
1141 {"sub",     "d,v,I",    0,    (int) M_SUB_I,    INSN_MACRO,             0,              I1      },
1142 {"sub.d",   "D,V,T",    0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
1143 {"sub.s",   "D,V,T",    0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
1144 {"sub.ob",  "X,Y,Q",    0x7800000a, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
1145 {"sub.ob",  "D,S,T",    0x4ac0000a, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
1146 {"sub.ob",  "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
1147 {"sub.ob",  "D,S,k",    0x4bc0000a, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
1148 {"sub.ps",  "D,V,T",    0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,    0,              I5      },
1149 {"sub.qh",  "X,Y,Q",    0x7820000a, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
1150 {"suba.ob", "Y,Q",      0x78000036, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
1151 {"suba.qh", "Y,Q",      0x78200036, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
1152 {"subl.ob", "Y,Q",      0x78000436, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
1153 {"subl.qh", "Y,Q",      0x78200436, 0xfc2007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
1154 {"subu",    "d,v,t",    0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
1155 {"subu",    "d,v,I",    0,    (int) M_SUBU_I,   INSN_MACRO,             0,              I1      },
1156 {"suspend", "",         0x42000022, 0xffffffff, 0,                      0,              V1      },
1157 {"suxc1",   "S,t(b)",   0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b,      0,              I5|N55  },
1158 {"sw",      "t,o(b)",   0xac000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
1159 {"sw",      "t,A(b)",   0,    (int) M_SW_AB,    INSN_MACRO,             0,              I1      },
1160 {"swc0",    "E,o(b)",   0xe0000000, 0xfc000000, SM|RD_C0|RD_b,          0,              I1      },
1161 {"swc0",    "E,A(b)",   0,    (int) M_SWC0_AB,  INSN_MACRO,             0,              I1      },
1162 {"swc1",    "T,o(b)",   0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
1163 {"swc1",    "E,o(b)",   0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
1164 {"swc1",    "T,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,             0,              I1      },
1165 {"swc1",    "E,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,             0,              I1      },
1166 {"s.s",     "T,o(b)",   0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      }, /* swc1 */
1167 {"s.s",     "T,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,             0,              I1      },
1168 {"swc2",    "E,o(b)",   0xe8000000, 0xfc000000, SM|RD_C2|RD_b,          0,              I1      },
1169 {"swc2",    "E,A(b)",   0,    (int) M_SWC2_AB,  INSN_MACRO,             0,              I1      },
1170 {"swc3",    "E,o(b)",   0xec000000, 0xfc000000, SM|RD_C3|RD_b,          0,              I1      },
1171 {"swc3",    "E,A(b)",   0,    (int) M_SWC3_AB,  INSN_MACRO,             0,              I1      },
1172 {"swl",     "t,o(b)",   0xa8000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
1173 {"swl",     "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,             0,              I1      },
1174 {"scache",  "t,o(b)",   0xa8000000, 0xfc000000, RD_t|RD_b,              0,              I2      }, /* same */
1175 {"scache",  "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,             0,              I2      }, /* as swl */
1176 {"swr",     "t,o(b)",   0xb8000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
1177 {"swr",     "t,A(b)",   0,    (int) M_SWR_AB,   INSN_MACRO,             0,              I1      },
1178 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b,              0,              I2      }, /* same */
1179 {"invalidate", "t,A(b)",0,    (int) M_SWR_AB,   INSN_MACRO,             0,              I2      }, /* as swr */
1180 {"swxc1",   "S,t(b)",   0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b,      0,              I4      },
1181 {"sync",    "",         0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2|G1   },
1182 {"sync.p",  "",         0x0000040f, 0xffffffff, INSN_SYNC,              0,              I2      },
1183 {"sync.l",  "",         0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2      },
1184 {"synci",   "o(b)",     0x041f0000, 0xfc1f0000, SM|RD_b,                0,              I33     },
1185 {"syscall", "",         0x0000000c, 0xffffffff, TRAP,                   0,              I1      },
1186 {"syscall", "B",        0x0000000c, 0xfc00003f, TRAP,                   0,              I1      },
1187 {"teqi",    "s,j",      0x040c0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },
1188 {"teq",     "s,t",      0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I2      },
1189 {"teq",     "s,t,q",    0x00000034, 0xfc00003f, RD_s|RD_t|TRAP,         0,              I2      },
1190 {"teq",     "s,j",      0x040c0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      }, /* teqi */
1191 {"teq",     "s,I",      0,    (int) M_TEQ_I,    INSN_MACRO,             0,              I2      },
1192 {"tgei",    "s,j",      0x04080000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },
1193 {"tge",     "s,t",      0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I2      },
1194 {"tge",     "s,t,q",    0x00000030, 0xfc00003f, RD_s|RD_t|TRAP,         0,              I2      },
1195 {"tge",     "s,j",      0x04080000, 0xfc1f0000, RD_s|TRAP,              0,              I2      }, /* tgei */
1196 {"tge",     "s,I",      0,    (int) M_TGE_I,    INSN_MACRO,             0,              I2      },
1197 {"tgeiu",   "s,j",      0x04090000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },
1198 {"tgeu",    "s,t",      0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I2      },
1199 {"tgeu",    "s,t,q",    0x00000031, 0xfc00003f, RD_s|RD_t|TRAP,         0,              I2      },
1200 {"tgeu",    "s,j",      0x04090000, 0xfc1f0000, RD_s|TRAP,              0,              I2      }, /* tgeiu */
1201 {"tgeu",    "s,I",      0,    (int) M_TGEU_I,   INSN_MACRO,             0,              I2      },
1202 {"tlbp",    "",         0x42000008, 0xffffffff, INSN_TLB,               0,              I1      },
1203 {"tlbr",    "",         0x42000001, 0xffffffff, INSN_TLB,               0,              I1      },
1204 {"tlbwi",   "",         0x42000002, 0xffffffff, INSN_TLB,               0,              I1      },
1205 {"tlbwr",   "",         0x42000006, 0xffffffff, INSN_TLB,               0,              I1      },
1206 {"tlti",    "s,j",      0x040a0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },
1207 {"tlt",     "s,t",      0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I2      },
1208 {"tlt",     "s,t,q",    0x00000032, 0xfc00003f, RD_s|RD_t|TRAP,         0,              I2      },
1209 {"tlt",     "s,j",      0x040a0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      }, /* tlti */
1210 {"tlt",     "s,I",      0,    (int) M_TLT_I,    INSN_MACRO,             0,              I2      },
1211 {"tltiu",   "s,j",      0x040b0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },
1212 {"tltu",    "s,t",      0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I2      },
1213 {"tltu",    "s,t,q",    0x00000033, 0xfc00003f, RD_s|RD_t|TRAP,         0,              I2      },
1214 {"tltu",    "s,j",      0x040b0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      }, /* tltiu */
1215 {"tltu",    "s,I",      0,    (int) M_TLTU_I,   INSN_MACRO,             0,              I2      },
1216 {"tnei",    "s,j",      0x040e0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },
1217 {"tne",     "s,t",      0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I2      },
1218 {"tne",     "s,t,q",    0x00000036, 0xfc00003f, RD_s|RD_t|TRAP,         0,              I2      },
1219 {"tne",     "s,j",      0x040e0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      }, /* tnei */
1220 {"tne",     "s,I",      0,    (int) M_TNE_I,    INSN_MACRO,             0,              I2      },
1221 {"trunc.l.d", "D,S",    0x46200009, 0xffff003f, WR_D|RD_S|FP_D,         0,              I3      },
1222 {"trunc.l.s", "D,S",    0x46000009, 0xffff003f, WR_D|RD_S|FP_S,         0,              I3      },
1223 {"trunc.w.d", "D,S",    0x4620000d, 0xffff003f, WR_D|RD_S|FP_D,         0,              I2      },
1224 {"trunc.w.d", "D,S,x",  0x4620000d, 0xffff003f, WR_D|RD_S|FP_D,         0,              I2      },
1225 {"trunc.w.d", "D,S,t",  0,    (int) M_TRUNCWD,  INSN_MACRO,             0,              I1      },
1226 {"trunc.w.s", "D,S",    0x4600000d, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
1227 {"trunc.w.s", "D,S,x",  0x4600000d, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
1228 {"trunc.w.s", "D,S,t",  0,    (int) M_TRUNCWS,  INSN_MACRO,             0,              I1      },
1229 {"uld",     "t,o(b)",   0,    (int) M_ULD,      INSN_MACRO,             0,              I3      },
1230 {"uld",     "t,A(b)",   0,    (int) M_ULD_A,    INSN_MACRO,             0,              I3      },
1231 {"ulh",     "t,o(b)",   0,    (int) M_ULH,      INSN_MACRO,             0,              I1      },
1232 {"ulh",     "t,A(b)",   0,    (int) M_ULH_A,    INSN_MACRO,             0,              I1      },
1233 {"ulhu",    "t,o(b)",   0,    (int) M_ULHU,     INSN_MACRO,             0,              I1      },
1234 {"ulhu",    "t,A(b)",   0,    (int) M_ULHU_A,   INSN_MACRO,             0,              I1      },
1235 {"ulw",     "t,o(b)",   0,    (int) M_ULW,      INSN_MACRO,             0,              I1      },
1236 {"ulw",     "t,A(b)",   0,    (int) M_ULW_A,    INSN_MACRO,             0,              I1      },
1237 {"usd",     "t,o(b)",   0,    (int) M_USD,      INSN_MACRO,             0,              I3      },
1238 {"usd",     "t,A(b)",   0,    (int) M_USD_A,    INSN_MACRO,             0,              I3      },
1239 {"ush",     "t,o(b)",   0,    (int) M_USH,      INSN_MACRO,             0,              I1      },
1240 {"ush",     "t,A(b)",   0,    (int) M_USH_A,    INSN_MACRO,             0,              I1      },
1241 {"usw",     "t,o(b)",   0,    (int) M_USW,      INSN_MACRO,             0,              I1      },
1242 {"usw",     "t,A(b)",   0,    (int) M_USW_A,    INSN_MACRO,             0,              I1      },
1243 {"wach.ob", "Y",        0x7a00003e, 0xffff07ff, RD_S|FP_D,              WR_MACC,        MX|SB1  },
1244 {"wach.ob", "S",        0x4a00003e, 0xffff07ff, RD_S,                   0,              N54     },
1245 {"wach.qh", "Y",        0x7a20003e, 0xffff07ff, RD_S|FP_D,              WR_MACC,        MX      },
1246 {"wacl.ob", "Y,Z",      0x7800003e, 0xffe007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX|SB1  },
1247 {"wacl.ob", "S,T",      0x4800003e, 0xffe007ff, RD_S|RD_T,              0,              N54     },
1248 {"wacl.qh", "Y,Z",      0x7820003e, 0xffe007ff, RD_S|RD_T|FP_D,         WR_MACC,        MX      },
1249 {"wait",    "",         0x42000020, 0xffffffff, TRAP,                   0,              I3|I32  },
1250 {"wait",    "J",        0x42000020, 0xfe00003f, TRAP,                   0,              I32|N55 },
1251 {"waiti",   "",         0x42000020, 0xffffffff, TRAP,                   0,              L1      },
1252 {"wb",      "o(b)",     0xbc040000, 0xfc1f0000, SM|RD_b,                0,              L1      },
1253 {"wrpgpr",  "d,w",      0x41c00000, 0xffe007ff, RD_t,                   0,              I33     },
1254 {"wsbh",    "d,w",      0x7c0000a0, 0xffe007ff, WR_d|RD_t,              0,              I33     },
1255 {"xor",     "d,v,t",    0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
1256 {"xor",     "t,r,I",    0,    (int) M_XOR_I,    INSN_MACRO,             0,              I1      },
1257 {"xor.ob",  "X,Y,Q",    0x7800000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX|SB1  },
1258 {"xor.ob",  "D,S,T",    0x4ac0000d, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
1259 {"xor.ob",  "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D|RD_S|RD_T,         0,              N54     },
1260 {"xor.ob",  "D,S,k",    0x4bc0000d, 0xffe0003f, WR_D|RD_S|RD_T,         0,              N54     },
1261 {"xor.qh",  "X,Y,Q",    0x7820000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D,    0,              MX      },
1262 {"xori",    "t,r,i",    0x38000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
1263 {"yield",   "s",        0x7c000009, 0xfc1fffff, TRAP|RD_s,              0,              MT32    },
1264 {"yield",   "d,s",      0x7c000009, 0xfc1f07ff, TRAP|WR_d|RD_s,         0,              MT32    },
1265
1266 /* Coprocessor 2 move/branch operations overlap with VR5400 .ob format
1267    instructions so they are here for the latters to take precedence.  */
1268 {"bc2f",    "p",        0x49000000, 0xffff0000, CBD|RD_CC,              0,              I1      },
1269 {"bc2fl",   "p",        0x49020000, 0xffff0000, CBL|RD_CC,              0,              I2|T3   },
1270 {"bc2t",    "p",        0x49010000, 0xffff0000, CBD|RD_CC,              0,              I1      },
1271 {"bc2tl",   "p",        0x49030000, 0xffff0000, CBL|RD_CC,              0,              I2|T3   },
1272 {"cfc2",    "t,G",      0x48400000, 0xffe007ff, LCD|WR_t|RD_C2,         0,              I1      },
1273 {"ctc2",    "t,G",      0x48c00000, 0xffe007ff, COD|RD_t|WR_CC,         0,              I1      },
1274 {"dmfc2",   "t,G",      0x48200000, 0xffe007ff, LCD|WR_t|RD_C2,         0,              I3      },
1275 {"dmfc2",   "t,G,H",    0x48200000, 0xffe007f8, LCD|WR_t|RD_C2,         0,              I64     },
1276 {"dmtc2",   "t,G",      0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC,   0,              I3      },
1277 {"dmtc2",   "t,G,H",    0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC,   0,              I64     },
1278 {"mfc2",    "t,G",      0x48000000, 0xffe007ff, LCD|WR_t|RD_C2,         0,              I1      },
1279 {"mfc2",    "t,G,H",    0x48000000, 0xffe007f8, LCD|WR_t|RD_C2,         0,              I32     },
1280 {"mfhc2",   "t,i",      0x48600000, 0xffe00000, LCD|WR_t|RD_C2,         0,              I33     },
1281 {"mtc2",    "t,G",      0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC,   0,              I1      },
1282 {"mtc2",    "t,G,H",    0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC,   0,              I32     },
1283 {"mthc2",   "t,i",      0x48e00000, 0xffe00000, COD|RD_t|WR_C2|WR_CC,   0,              I33     },
1284
1285 /* No hazard protection on coprocessor instructions--they shouldn't
1286    change the state of the processor and if they do it's up to the
1287    user to put in nops as necessary.  These are at the end so that the
1288    disassembler recognizes more specific versions first.  */
1289 {"c0",      "C",        0x42000000, 0xfe000000, 0,                      0,              I1      },
1290 {"c1",      "C",        0x46000000, 0xfe000000, 0,                      0,              I1      },
1291 {"c2",      "C",        0x4a000000, 0xfe000000, 0,                      0,              I1      },
1292 {"c3",      "C",        0x4e000000, 0xfe000000, 0,                      0,              I1      },
1293 {"cop0",     "C",       0,    (int) M_COP0,     INSN_MACRO,             0,              I1      },
1294 {"cop1",     "C",       0,    (int) M_COP1,     INSN_MACRO,             0,              I1      },
1295 {"cop2",     "C",       0,    (int) M_COP2,     INSN_MACRO,             0,              I1      },
1296 {"cop3",     "C",       0,    (int) M_COP3,     INSN_MACRO,             0,              I1      },
1297
1298   /* Conflicts with the 4650's "mul" instruction.  Nobody's using the
1299      4010 any more, so move this insn out of the way.  If the object
1300      format gave us more info, we could do this right.  */
1301 {"addciu",  "t,r,j",    0x70000000, 0xfc000000, WR_t|RD_s,              0,              L1      },
1302 /* MIPS DSP ASE */
1303 {"absq_s.ph", "d,t",    0x7c000252, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1304 {"absq_s.w", "d,t",     0x7c000452, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1305 {"addq.ph", "d,s,t",    0x7c000290, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1306 {"addq_s.ph", "d,s,t",  0x7c000390, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1307 {"addq_s.w", "d,s,t",   0x7c000590, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1308 {"addsc",   "d,s,t",    0x7c000410, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1309 {"addu.qb", "d,s,t",    0x7c000010, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1310 {"addu_s.qb", "d,s,t",  0x7c000110, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1311 {"addwc",   "d,s,t",    0x7c000450, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1312 {"bitrev",  "d,t",      0x7c0006d2, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1313 {"bposge32", "p",       0x041c0000, 0xffff0000, CBD,                    0,              D32     },
1314 {"cmp.eq.ph", "s,t",    0x7c000211, 0xfc00ffff, RD_s|RD_t,              0,              D32     },
1315 {"cmpgu.eq.qb", "d,s,t", 0x7c000111, 0xfc0007ff, WR_d|RD_s|RD_t,        0,              D32     },
1316 {"cmpgu.le.qb", "d,s,t", 0x7c000191, 0xfc0007ff, WR_d|RD_s|RD_t,        0,              D32     },
1317 {"cmpgu.lt.qb", "d,s,t", 0x7c000151, 0xfc0007ff, WR_d|RD_s|RD_t,        0,              D32     },
1318 {"cmp.le.ph", "s,t",    0x7c000291, 0xfc00ffff, RD_s|RD_t,              0,              D32     },
1319 {"cmp.lt.ph", "s,t",    0x7c000251, 0xfc00ffff, RD_s|RD_t,              0,              D32     },
1320 {"cmpu.eq.qb", "s,t",   0x7c000011, 0xfc00ffff, RD_s|RD_t,              0,              D32     },
1321 {"cmpu.le.qb", "s,t",   0x7c000091, 0xfc00ffff, RD_s|RD_t,              0,              D32     },
1322 {"cmpu.lt.qb", "s,t",   0x7c000051, 0xfc00ffff, RD_s|RD_t,              0,              D32     },
1323 {"dpaq_sa.l.w", "7,s,t", 0x7c000330, 0xfc00e7ff, MOD_a|RD_s|RD_t,       0,              D32     },
1324 {"dpaq_s.w.ph", "7,s,t", 0x7c000130, 0xfc00e7ff, MOD_a|RD_s|RD_t,       0,              D32     },
1325 {"dpau.h.qbl", "7,s,t", 0x7c0000f0, 0xfc00e7ff, MOD_a|RD_s|RD_t,        0,              D32     },
1326 {"dpau.h.qbr", "7,s,t", 0x7c0001f0, 0xfc00e7ff, MOD_a|RD_s|RD_t,        0,              D32     },
1327 {"dpsq_sa.l.w", "7,s,t", 0x7c000370, 0xfc00e7ff, MOD_a|RD_s|RD_t,       0,              D32     },
1328 {"dpsq_s.w.ph", "7,s,t", 0x7c000170, 0xfc00e7ff, MOD_a|RD_s|RD_t,       0,              D32     },
1329 {"dpsu.h.qbl", "7,s,t", 0x7c0002f0, 0xfc00e7ff, MOD_a|RD_s|RD_t,        0,              D32     },
1330 {"dpsu.h.qbr", "7,s,t", 0x7c0003f0, 0xfc00e7ff, MOD_a|RD_s|RD_t,        0,              D32     },
1331 {"extpdp",  "t,7,6",    0x7c0002b8, 0xfc00e7ff, WR_t|RD_a|DSP_VOLA,     0,              D32     },
1332 {"extpdpv", "t,7,s",    0x7c0002f8, 0xfc00e7ff, WR_t|RD_a|RD_s|DSP_VOLA, 0,             D32     },
1333 {"extp",    "t,7,6",    0x7c0000b8, 0xfc00e7ff, WR_t|RD_a,              0,              D32     },
1334 {"extpv",   "t,7,s",    0x7c0000f8, 0xfc00e7ff, WR_t|RD_a|RD_s,         0,              D32     },
1335 {"extr_rs.w", "t,7,6",  0x7c0001b8, 0xfc00e7ff, WR_t|RD_a,              0,              D32     },
1336 {"extr_r.w", "t,7,6",   0x7c000138, 0xfc00e7ff, WR_t|RD_a,              0,              D32     },
1337 {"extr_s.h", "t,7,6",   0x7c0003b8, 0xfc00e7ff, WR_t|RD_a,              0,              D32     },
1338 {"extrv_rs.w", "t,7,s", 0x7c0001f8, 0xfc00e7ff, WR_t|RD_a|RD_s,         0,              D32     },
1339 {"extrv_r.w", "t,7,s",  0x7c000178, 0xfc00e7ff, WR_t|RD_a|RD_s,         0,              D32     },
1340 {"extrv_s.h", "t,7,s",  0x7c0003f8, 0xfc00e7ff, WR_t|RD_a|RD_s,         0,              D32     },
1341 {"extrv.w", "t,7,s",    0x7c000078, 0xfc00e7ff, WR_t|RD_a|RD_s,         0,              D32     },
1342 {"extr.w",  "t,7,6",    0x7c000038, 0xfc00e7ff, WR_t|RD_a,              0,              D32     },
1343 {"insv",    "t,s",      0x7c00000c, 0xfc00ffff, WR_t|RD_s,              0,              D32     },
1344 {"lbux",    "d,t(b)",   0x7c00018a, 0xfc0007ff, LDD|WR_d|RD_t|RD_b,     0,              D32     },
1345 {"lhx",     "d,t(b)",   0x7c00010a, 0xfc0007ff, LDD|WR_d|RD_t|RD_b,     0,              D32     },
1346 {"lwx",     "d,t(b)",   0x7c00000a, 0xfc0007ff, LDD|WR_d|RD_t|RD_b,     0,              D32     },
1347 {"maq_sa.w.phl", "7,s,t", 0x7c000430, 0xfc00e7ff, MOD_a|RD_s|RD_t,      0,              D32     },
1348 {"maq_sa.w.phr", "7,s,t", 0x7c0004b0, 0xfc00e7ff, MOD_a|RD_s|RD_t,      0,              D32     },
1349 {"maq_s.w.phl", "7,s,t", 0x7c000530, 0xfc00e7ff, MOD_a|RD_s|RD_t,       0,              D32     },
1350 {"maq_s.w.phr", "7,s,t", 0x7c0005b0, 0xfc00e7ff, MOD_a|RD_s|RD_t,       0,              D32     },
1351 {"modsub",  "d,s,t",    0x7c000490, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1352 {"mthlip",  "s,7",      0x7c0007f8, 0xfc1fe7ff, RD_s|MOD_a|DSP_VOLA,    0,              D32     },
1353 {"muleq_s.w.phl", "d,s,t", 0x7c000710, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,           D32     },
1354 {"muleq_s.w.phr", "d,s,t", 0x7c000750, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,           D32     },
1355 {"muleu_s.ph.qbl", "d,s,t", 0x7c000190, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,          D32     },
1356 {"muleu_s.ph.qbr", "d,s,t", 0x7c0001d0, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,          D32     },
1357 {"mulq_rs.ph", "d,s,t", 0x7c0007d0, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,              D32     },
1358 {"mulsaq_s.w.ph", "7,s,t", 0x7c0001b0, 0xfc00e7ff, MOD_a|RD_s|RD_t,     0,              D32     },
1359 {"packrl.ph", "d,s,t",  0x7c000391, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1360 {"pick.ph", "d,s,t",    0x7c0002d1, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1361 {"pick.qb", "d,s,t",    0x7c0000d1, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1362 {"precequ.ph.qbla", "d,t", 0x7c000192, 0xffe007ff, WR_d|RD_t,           0,              D32     },
1363 {"precequ.ph.qbl", "d,t", 0x7c000112, 0xffe007ff, WR_d|RD_t,            0,              D32     },
1364 {"precequ.ph.qbra", "d,t", 0x7c0001d2, 0xffe007ff, WR_d|RD_t,           0,              D32     },
1365 {"precequ.ph.qbr", "d,t", 0x7c000152, 0xffe007ff, WR_d|RD_t,            0,              D32     },
1366 {"preceq.w.phl", "d,t", 0x7c000312, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1367 {"preceq.w.phr", "d,t", 0x7c000352, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1368 {"preceu.ph.qbla", "d,t", 0x7c000792, 0xffe007ff, WR_d|RD_t,            0,              D32     },
1369 {"preceu.ph.qbl", "d,t", 0x7c000712, 0xffe007ff, WR_d|RD_t,             0,              D32     },
1370 {"preceu.ph.qbra", "d,t", 0x7c0007d2, 0xffe007ff, WR_d|RD_t,            0,              D32     },
1371 {"preceu.ph.qbr", "d,t", 0x7c000752, 0xffe007ff, WR_d|RD_t,             0,              D32     },
1372 {"precrq.ph.w", "d,s,t", 0x7c000511, 0xfc0007ff, WR_d|RD_s|RD_t,        0,              D32     },
1373 {"precrq.qb.ph", "d,s,t", 0x7c000311, 0xfc0007ff, WR_d|RD_s|RD_t,       0,              D32     },
1374 {"precrq_rs.ph.w", "d,s,t", 0x7c000551, 0xfc0007ff, WR_d|RD_s|RD_t,     0,              D32     },
1375 {"precrqu_s.qb.ph", "d,s,t", 0x7c0003d1, 0xfc0007ff, WR_d|RD_s|RD_t,    0,              D32     },
1376 {"raddu.w.qb", "d,s",   0x7c000510, 0xfc1f07ff, WR_d|RD_s,              0,              D32     },
1377 {"rddsp",   "d",        0x7fff04b8, 0xffff07ff, WR_d,                   0,              D32     },
1378 {"rddsp",   "d,'",      0x7c0004b8, 0xffc007ff, WR_d,                   0,              D32     },
1379 {"repl.ph", "d,@",      0x7c000292, 0xfc0007ff, WR_d,                   0,              D32     },
1380 {"repl.qb", "d,5",      0x7c000092, 0xff0007ff, WR_d,                   0,              D32     },
1381 {"replv.ph", "d,t",     0x7c0002d2, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1382 {"replv.qb", "d,t",     0x7c0000d2, 0xffe007ff, WR_d|RD_t,              0,              D32     },
1383 {"shilo",   "7,0",      0x7c0006b8, 0xfc0fe7ff, MOD_a,                  0,              D32     },
1384 {"shilov",  "7,s",      0x7c0006f8, 0xfc1fe7ff, MOD_a|RD_s,             0,              D32     },
1385 {"shll.ph", "d,t,4",    0x7c000213, 0xfe0007ff, WR_d|RD_t,              0,              D32     },
1386 {"shll.qb", "d,t,3",    0x7c000013, 0xff0007ff, WR_d|RD_t,              0,              D32     },
1387 {"shll_s.ph", "d,t,4",  0x7c000313, 0xfe0007ff, WR_d|RD_t,              0,              D32     },
1388 {"shll_s.w", "d,t,6",   0x7c000513, 0xfc0007ff, WR_d|RD_t,              0,              D32     },
1389 {"shllv.ph", "d,t,s",   0x7c000293, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1390 {"shllv.qb", "d,t,s",   0x7c000093, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1391 {"shllv_s.ph", "d,t,s", 0x7c000393, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1392 {"shllv_s.w", "d,t,s",  0x7c000593, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1393 {"shra.ph", "d,t,4",    0x7c000253, 0xfe0007ff, WR_d|RD_t,              0,              D32     },
1394 {"shra_r.ph", "d,t,4",  0x7c000353, 0xfe0007ff, WR_d|RD_t,              0,              D32     },
1395 {"shra_r.w", "d,t,6",   0x7c000553, 0xfc0007ff, WR_d|RD_t,              0,              D32     },
1396 {"shrav.ph", "d,t,s",   0x7c0002d3, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1397 {"shrav_r.ph", "d,t,s", 0x7c0003d3, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1398 {"shrav_r.w", "d,t,s",  0x7c0005d3, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1399 {"shrl.qb", "d,t,3",    0x7c000053, 0xff0007ff, WR_d|RD_t,              0,              D32     },
1400 {"shrlv.qb", "d,t,s",   0x7c0000d3, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1401 {"subq.ph", "d,s,t",    0x7c0002d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1402 {"subq_s.ph", "d,s,t",  0x7c0003d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1403 {"subq_s.w", "d,s,t",   0x7c0005d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1404 {"subu.qb", "d,s,t",    0x7c000050, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1405 {"subu_s.qb", "d,s,t",  0x7c000150, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              D32     },
1406 {"wrdsp",   "s",        0x7c1ffcf8, 0xfc1fffff, RD_s|DSP_VOLA,          0,              D32     },
1407 {"wrdsp",   "s,8",      0x7c0004f8, 0xfc1e07ff, RD_s|DSP_VOLA,          0,              D32     },
1408 /* Move bc0* after mftr and mttr to avoid opcode collision.  */
1409 {"bc0f",    "p",        0x41000000, 0xffff0000, CBD|RD_CC,              0,              I1      },
1410 {"bc0fl",   "p",        0x41020000, 0xffff0000, CBL|RD_CC,              0,              I2|T3   },
1411 {"bc0t",    "p",        0x41010000, 0xffff0000, CBD|RD_CC,              0,              I1      },
1412 {"bc0tl",   "p",        0x41030000, 0xffff0000, CBL|RD_CC,              0,              I2|T3   },
1413 };
1414
1415 #define MIPS_NUM_OPCODES \
1416         ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1417 const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
1418
1419 /* const removed from the following to allow for dynamic extensions to the
1420  * built-in instruction set. */
1421 struct mips_opcode *mips_opcodes =
1422   (struct mips_opcode *) mips_builtin_opcodes;
1423 int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
1424 #undef MIPS_NUM_OPCODES