bfd/
[platform/upstream/binutils.git] / opcodes / micromips-opc.c
1 /* micromips-opc.c.  microMIPS opcode table.
2    Copyright 2008 Free Software Foundation, Inc.
3    Contributed by Chao-ying Fu, MIPS Technologies, Inc.
4
5    This file is part of the GNU opcodes library.
6
7    This library is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 3, or (at your option)
10    any later version.
11
12    It is distributed in the hope that it will be useful, but WITHOUT
13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15    License for more details.
16
17    You should have received a copy of the GNU General Public License
18    along with this file; see the file COPYING.  If not, write to the
19    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20    MA 02110-1301, USA.  */
21
22 #include <stdio.h>
23 #include "sysdep.h"
24 #include "opcode/mips.h"
25
26 #define UBD     INSN_UNCOND_BRANCH_DELAY
27 #define CBD     INSN_COND_BRANCH_DELAY
28 #define TRAP    INSN_TRAP
29 #define SM      INSN_STORE_MEMORY
30 #define BD16    INSN2_BRANCH_DELAY_16BIT        /* Used in pinfo2.  */
31 #define BD32    INSN2_BRANCH_DELAY_32BIT        /* Used in pinfo2.  */
32
33 /* For 16-bit/32-bit microMIPS instructions.  They are used in pinfo2.  */
34 #define UBR     INSN2_UNCOND_BRANCH
35 #define CBR     INSN2_COND_BRANCH
36 #define MOD_mb  INSN2_MOD_GPR_MB
37 #define MOD_mc  INSN2_MOD_GPR_MC
38 #define MOD_md  INSN2_MOD_GPR_MD
39 #define MOD_me  INSN2_MOD_GPR_ME
40 #define MOD_mf  INSN2_MOD_GPR_MF
41 #define MOD_mg  INSN2_MOD_GPR_MG
42 #define MOD_mhi INSN2_MOD_GPR_MHI
43 #define MOD_mj  INSN2_MOD_GPR_MJ
44 #define MOD_ml  MOD_mc  /* Reuse, since the bit position is the same.  */
45 #define MOD_mm  INSN2_MOD_GPR_MM
46 #define MOD_mn  INSN2_MOD_GPR_MN
47 #define MOD_mp  INSN2_MOD_GPR_MP
48 #define MOD_mq  INSN2_MOD_GPR_MQ
49 #define MOD_sp  INSN2_MOD_SP
50 #define RD_31   INSN2_READ_GPR_31
51 #define RD_gp   INSN2_READ_GP
52 #define RD_pc   INSN2_READ_PC
53
54 /* For 32-bit microMIPS instructions.  */
55 #define WR_s    INSN2_WRITE_GPR_S       /* Used in pinfo2.  */
56 #define WR_d    INSN_WRITE_GPR_D
57 #define WR_t    INSN_WRITE_GPR_T
58 #define WR_31   INSN_WRITE_GPR_31
59 #define WR_D    INSN_WRITE_FPR_D
60 #define WR_T    INSN_WRITE_FPR_T
61 #define WR_S    INSN_WRITE_FPR_S
62 #define WR_CC   INSN_WRITE_COND_CODE
63
64 #define RD_s    INSN_READ_GPR_S
65 #define RD_b    INSN_READ_GPR_S
66 #define RD_t    INSN_READ_GPR_T
67 #define RD_T    INSN_READ_FPR_T
68 #define RD_S    INSN_READ_FPR_S
69 #define RD_R    INSN_READ_FPR_R
70 #define RD_D    INSN2_READ_FPR_D        /* Used in pinfo2.  */
71 #define RD_CC   INSN_READ_COND_CODE
72 #define RD_C0   INSN_COP
73 #define RD_C1   INSN_COP
74 #define RD_C2   INSN_COP
75 #define WR_C0   INSN_COP
76 #define WR_C1   INSN_COP
77 #define WR_C2   INSN_COP
78 #define CP      INSN_COP
79
80 #define WR_HI   INSN_WRITE_HI
81 #define RD_HI   INSN_READ_HI
82
83 #define WR_LO   INSN_WRITE_LO
84 #define RD_LO   INSN_READ_LO
85
86 #define WR_HILO WR_HI|WR_LO
87 #define RD_HILO RD_HI|RD_LO
88 #define MOD_HILO WR_HILO|RD_HILO
89
90 /* Reuse INSN_ISA1 for 32-bit microMIPS ISA.  All instructions in I1
91    are accepted as 32-bit microMIPS ISA.
92    Reuse INSN_ISA3 for 64-bit microMIPS ISA.  All instructions in I3
93    are accepted as 64-bit microMIPS ISA.  */
94 #define I1      INSN_ISA1
95 #define I3      INSN_ISA3
96
97 const struct mips_opcode micromips_opcodes[] =
98 {
99 /* These instructions appear first so that the disassembler will find
100    them first.  The assemblers uses a hash table based on the
101    instruction name anyhow.  */
102 /* name,    args,       match,      mask,       pinfo,                  pinfo2,         membership */
103 {"pref",    "k,~(b)",   0x60002000, 0xfc00f000, RD_b,                   0,              I1      },
104 {"pref",    "k,o(b)",   0,    (int) M_PREF_OB,  INSN_MACRO,             0,              I1      },
105 {"pref",    "k,A(b)",   0,    (int) M_PREF_AB,  INSN_MACRO,             0,              I1      },
106 {"prefx",   "h,t(b)",   0x540001a0, 0xfc0007ff, RD_b|RD_t|FP_S,         0,              I1      },
107 {"nop",     "",             0x0c00,     0xffff, 0,                      INSN2_ALIAS,    I1      },
108 {"nop",     "",         0x00000000, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
109 {"ssnop",   "",         0x00000800, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
110 {"ehb",     "",         0x00001800, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
111 {"pause",   "",         0x00002800, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
112 {"li",      "md,mI",        0xec00,     0xfc00, 0,                      MOD_md,         I1      },
113 {"li",      "t,j",      0x30000000, 0xfc1f0000, WR_t,                   INSN2_ALIAS,    I1      }, /* addiu */
114 {"li",      "t,i",      0x50000000, 0xfc1f0000, WR_t,                   INSN2_ALIAS,    I1      }, /* ori */
115 #if 0
116 /* Disabled until we can handle 48-bit opcodes.  */
117 {"li",      "s,I",      0x7c0000010000, 0xfc00001f0000, WR_t,           0,              I3      }, /* li48 */
118 #endif
119 {"li",      "t,I",      0,    (int) M_LI,       INSN_MACRO,             0,              I1      },
120 {"move",    "d,s",      0,    (int) M_MOVE,     INSN_MACRO,             0,              I1      },
121 {"move",    "mp,mj",        0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      },
122 {"move",    "d,s",      0x58000150, 0xffe007ff, WR_d|RD_s,              INSN2_ALIAS,    I3      }, /* daddu */
123 {"move",    "d,s",      0x00000150, 0xffe007ff, WR_d|RD_s,              INSN2_ALIAS,    I1      }, /* addu */
124 {"move",    "d,s",      0x00000290, 0xffe007ff, WR_d|RD_s,              INSN2_ALIAS,    I1      }, /* or */
125 {"b",       "mD",           0xcc00,     0xfc00, UBD,                    0,              I1      },
126 {"b",       "p",        0x94000000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1      }, /* beq 0, 0 */
127 {"b",       "p",        0x40400000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1      }, /* bgez 0 */
128 {"bal",     "p",        0x40600000, 0xffff0000, UBD|WR_31,              INSN2_ALIAS|BD32,       I1      }, /* bgezal 0 */
129 {"bals",    "p",        0x42600000, 0xffff0000, UBD|WR_31,              INSN2_ALIAS|BD16,       I1      }, /* bgezals 0 */
130 {"bc",      "p",        0x40e00000, 0xffff0000, TRAP,                   INSN2_ALIAS|UBR,        I1      }, /* beqzc 0 */
131
132 {"abs",     "d,v",      0,    (int) M_ABS,      INSN_MACRO,             0,              I1      },
133 {"abs.d",   "T,V",      0x5400237b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
134 {"abs.s",   "T,V",      0x5400037b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
135 {"abs.ps",  "T,V",      0x5400437b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
136 {"add",     "d,v,t",    0x00000110, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
137 {"add",     "t,r,I",    0,    (int) M_ADD_I,    INSN_MACRO,             0,              I1      },
138 {"add.d",   "D,V,T",    0x54000130, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
139 {"add.s",   "D,V,T",    0x54000030, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
140 {"add.ps",  "D,V,T",    0x54000230, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
141 {"addi",    "t,r,j",    0x10000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
142 {"addiu",   "mp,mj,mZ",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
143 {"addiu",   "md,ms,mW",     0x6c01,     0xfc01, 0,                      MOD_md|MOD_sp,  I1      }, /* addiur1sp */
144 {"addiu",   "md,mc,mB",     0x6c00,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      }, /* addiur2 */
145 {"addiu",   "ms,mt,mY",     0x4c01,     0xfc01, 0,                      MOD_sp,         I1      }, /* addiusp */
146 {"addiu",   "mp,mt,mX",     0x4c00,     0xfc01, 0,                      MOD_mp,         I1      }, /* addius5 */
147 {"addiu",   "mb,mr,mQ", 0x78000000, 0xfc000000, 0,                      MOD_mb|RD_pc,   I1      }, /* addiupc */
148 {"addiu",   "t,r,j",    0x30000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
149 {"addiupc", "mb,mQ",    0x78000000, 0xfc000000, 0,                      MOD_mb|RD_pc,   I1      },
150 {"addiur1sp", "md,mW",      0x6c01,     0xfc01, 0,                      MOD_md|MOD_sp,  I1      },
151 {"addiur2", "md,mc,mB",     0x6c00,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      },
152 {"addiusp", "mY",           0x4c01,     0xfc01, 0,                      MOD_sp,         I1      },
153 {"addius5", "mp,mX",        0x4c00,     0xfc01, 0,                      MOD_mp,         I1      },
154 {"addu",    "mp,mj,mz",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
155 {"addu",    "mp,mz,mj",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
156 {"addu",    "md,me,ml",     0x0400,     0xfc01, 0,                      MOD_md|MOD_me|MOD_ml,   I1      },
157 {"addu",    "d,v,t",    0x00000150, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
158 {"addu",    "t,r,I",    0,    (int) M_ADDU_I,   INSN_MACRO,             0,              I1      },
159 /* We have no flag to mark the read from "y", so we use TRAP to disable
160    delay slot scheduling of ALNV.PS altogether.  */
161 {"alnv.ps", "D,V,T,y",  0x54000019, 0xfc00003f, TRAP|WR_D|RD_S|RD_T|FP_D, 0,            I1      },
162 {"and",     "mf,mt,mg",     0x4480,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
163 {"and",     "mf,mg,mx",     0x4480,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
164 {"and",     "d,v,t",    0x00000250, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
165 {"and",     "t,r,I",    0,    (int) M_AND_I,    INSN_MACRO,             0,              I1      },
166 {"andi",    "md,mc,mC",     0x2c00,     0xfc00, 0,                      MOD_md|MOD_mc,  I1      },
167 {"andi",    "t,r,i",    0xd0000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
168 /* b is at the top of the table.  */
169 /* bal is at the top of the table.  */
170 {"bc1f",    "p",        0x43800000, 0xffff0000, CBD|RD_CC|FP_S,         0,              I1      },
171 {"bc1f",    "N,p",      0x43800000, 0xffe30000, CBD|RD_CC|FP_S,         0,              I1      },
172 {"bc1fl",   "p",        0,    (int) M_BC1FL,    INSN_MACRO,             INSN2_M_FP_S,           I1      },
173 {"bc1fl",   "N,p",      0,    (int) M_BC1FL,    INSN_MACRO,             INSN2_M_FP_S,           I1      },
174 {"bc2f",    "p",        0x42800000, 0xffff0000, CBD|RD_CC,              0,              I1      },
175 {"bc2f",    "N,p",      0x42800000, 0xffe30000, CBD|RD_CC,              0,              I1      },
176 {"bc2fl",   "p",        0,    (int) M_BC2FL,    INSN_MACRO,             0,              I1      },
177 {"bc2fl",   "N,p",      0,    (int) M_BC2FL,    INSN_MACRO,             0,              I1      },
178 {"bc1t",    "p",        0x43a00000, 0xffff0000, CBD|RD_CC|FP_S,         0,              I1      },
179 {"bc1t",    "N,p",      0x43a00000, 0xffe30000, CBD|RD_CC|FP_S,         0,              I1      },
180 {"bc1tl",   "p",        0,    (int) M_BC1TL,    INSN_MACRO,             INSN2_M_FP_S,           I1      },
181 {"bc1tl",   "N,p",      0,    (int) M_BC1TL,    INSN_MACRO,             INSN2_M_FP_S,           I1      },
182 {"bc2t",    "p",        0x42a00000, 0xffff0000, CBD|RD_CC,              0,              I1      },
183 {"bc2t",    "N,p",      0x42a00000, 0xffe30000, CBD|RD_CC,              0,              I1      },
184 {"bc2tl",   "p",        0,    (int) M_BC2TL,    INSN_MACRO,             0,              I1      },
185 {"bc2tl",   "N,p",      0,    (int) M_BC2TL,    INSN_MACRO,             0,              I1      },
186 {"beqz",    "md,mE",        0x8c00,     0xfc00, CBD,                    MOD_md,         I1      },
187 {"beqz",    "s,p",      0x94000000, 0xffe00000, CBD|RD_s,               0,              I1      },
188 {"beqzc",   "s,p",      0x40e00000, 0xffe00000, TRAP|RD_s,              CBR,            I1      },
189 {"beqzl",   "s,p",      0,    (int) M_BEQL,     INSN_MACRO,             0,              I1      },
190 {"beq",     "md,mz,mE",     0x8c00,     0xfc00, CBD,                    MOD_md,         I1      }, /* beqz */
191 {"beq",     "mz,md,mE",     0x8c00,     0xfc00, CBD,                    MOD_md,         I1      }, /* beqz */
192 {"beq",     "s,t,p",    0x94000000, 0xfc000000, CBD|RD_s|RD_t,          0,              I1      },
193 {"beq",     "s,I,p",    0,    (int) M_BEQ_I,    INSN_MACRO,             0,              I1      },
194 {"beql",    "s,t,p",    0,    (int) M_BEQL,     INSN_MACRO,             0,              I1      },
195 {"beql",    "s,I,p",    0,    (int) M_BEQL_I,   INSN_MACRO,             0,              I1      },
196 {"bge",     "s,t,p",    0,    (int) M_BGE,      INSN_MACRO,             0,              I1      },
197 {"bge",     "s,I,p",    0,    (int) M_BGE_I,    INSN_MACRO,             0,              I1      },
198 {"bgel",    "s,t,p",    0,    (int) M_BGEL,     INSN_MACRO,             0,              I1      },
199 {"bgel",    "s,I,p",    0,    (int) M_BGEL_I,   INSN_MACRO,             0,              I1      },
200 {"bgeu",    "s,t,p",    0,    (int) M_BGEU,     INSN_MACRO,             0,              I1      },
201 {"bgeu",    "s,I,p",    0,    (int) M_BGEU_I,   INSN_MACRO,             0,              I1      },
202 {"bgeul",   "s,t,p",    0,    (int) M_BGEUL,    INSN_MACRO,             0,              I1      },
203 {"bgeul",   "s,I,p",    0,    (int) M_BGEUL_I,  INSN_MACRO,             0,              I1      },
204 {"bgez",    "s,p",      0x40400000, 0xffe00000, CBD|RD_s,               0,              I1      },
205 {"bgezl",   "s,p",      0,    (int) M_BGEZL,    INSN_MACRO,             0,              I1      },
206 {"bgezal",  "s,p",      0x40600000, 0xffe00000, CBD|RD_s|WR_31,         BD32,           I1      },
207 {"bgezals", "s,p",      0x42600000, 0xffe00000, CBD|RD_s|WR_31,         BD16,           I1      },
208 {"bgezall", "s,p",      0,    (int) M_BGEZALL,  INSN_MACRO,             0,              I1      },
209 {"bgt",     "s,t,p",    0,    (int) M_BGT,      INSN_MACRO,             0,              I1      },
210 {"bgt",     "s,I,p",    0,    (int) M_BGT_I,    INSN_MACRO,             0,              I1      },
211 {"bgtl",    "s,t,p",    0,    (int) M_BGTL,     INSN_MACRO,             0,              I1      },
212 {"bgtl",    "s,I,p",    0,    (int) M_BGTL_I,   INSN_MACRO,             0,              I1      },
213 {"bgtu",    "s,t,p",    0,    (int) M_BGTU,     INSN_MACRO,             0,              I1      },
214 {"bgtu",    "s,I,p",    0,    (int) M_BGTU_I,   INSN_MACRO,             0,              I1      },
215 {"bgtul",   "s,t,p",    0,    (int) M_BGTUL,    INSN_MACRO,             0,              I1      },
216 {"bgtul",   "s,I,p",    0,    (int) M_BGTUL_I,  INSN_MACRO,             0,              I1      },
217 {"bgtz",    "s,p",      0x40c00000, 0xffe00000, CBD|RD_s,               0,              I1      },
218 {"bgtzl",   "s,p",      0,    (int) M_BGTZL,    INSN_MACRO,             0,              I1      },
219 {"ble",     "s,t,p",    0,    (int) M_BLE,      INSN_MACRO,             0,              I1      },
220 {"ble",     "s,I,p",    0,    (int) M_BLE_I,    INSN_MACRO,             0,              I1      },
221 {"blel",    "s,t,p",    0,    (int) M_BLEL,     INSN_MACRO,             0,              I1      },
222 {"blel",    "s,I,p",    0,    (int) M_BLEL_I,   INSN_MACRO,             0,              I1      },
223 {"bleu",    "s,t,p",    0,    (int) M_BLEU,     INSN_MACRO,             0,              I1      },
224 {"bleu",    "s,I,p",    0,    (int) M_BLEU_I,   INSN_MACRO,             0,              I1      },
225 {"bleul",   "s,t,p",    0,    (int) M_BLEUL,    INSN_MACRO,             0,              I1      },
226 {"bleul",   "s,I,p",    0,    (int) M_BLEUL_I,  INSN_MACRO,             0,              I1      },
227 {"blez",    "s,p",      0x40800000, 0xffe00000, CBD|RD_s,               0,              I1      },
228 {"blezl",   "s,p",      0,    (int) M_BLEZL,    INSN_MACRO,             0,              I1      },
229 {"blt",     "s,t,p",    0,    (int) M_BLT,      INSN_MACRO,             0,              I1      },
230 {"blt",     "s,I,p",    0,    (int) M_BLT_I,    INSN_MACRO,             0,              I1      },
231 {"bltl",    "s,t,p",    0,    (int) M_BLTL,     INSN_MACRO,             0,              I1      },
232 {"bltl",    "s,I,p",    0,    (int) M_BLTL_I,   INSN_MACRO,             0,              I1      },
233 {"bltu",    "s,t,p",    0,    (int) M_BLTU,     INSN_MACRO,             0,              I1      },
234 {"bltu",    "s,I,p",    0,    (int) M_BLTU_I,   INSN_MACRO,             0,              I1      },
235 {"bltul",   "s,t,p",    0,    (int) M_BLTUL,    INSN_MACRO,             0,              I1      },
236 {"bltul",   "s,I,p",    0,    (int) M_BLTUL_I,  INSN_MACRO,             0,              I1      },
237 {"bltz",    "s,p",      0x40000000, 0xffe00000, CBD|RD_s,               0,              I1      },
238 {"bltzl",   "s,p",      0,    (int) M_BLTZL,    INSN_MACRO,             0,              I1      },
239 {"bltzal",  "s,p",      0x40200000, 0xffe00000, CBD|RD_s|WR_31,         BD32,           I1      },
240 {"bltzals", "s,p",      0x42200000, 0xffe00000, CBD|RD_s|WR_31,         BD16,           I1      },
241 {"bltzall", "s,p",      0,    (int) M_BLTZALL,  INSN_MACRO,             0,              I1      },
242 {"bnez",    "md,mE",        0xac00,     0xfc00, CBD,                    MOD_md,         I1      },
243 {"bnez",    "s,p",      0xb4000000, 0xffe00000, CBD|RD_s,               0,              I1      },
244 {"bnezc",   "s,p",      0x40a00000, 0xffe00000, TRAP|RD_s,              CBR,            I1      },
245 {"bnezl",   "s,p",      0,    (int) M_BNEL,     INSN_MACRO,             0,              I1      },
246 {"bne",     "md,mz,mE",     0xac00,     0xfc00, CBD,                    MOD_md,         I1      }, /* bnez */
247 {"bne",     "mz,md,mE",     0xac00,     0xfc00, CBD,                    MOD_md,         I1      }, /* bnez */
248 {"bne",     "s,t,p",    0xb4000000, 0xfc000000, CBD|RD_s|RD_t,          0,              I1      },
249 {"bne",     "s,I,p",    0,    (int) M_BNE_I,    INSN_MACRO,             0,              I1      },
250 {"bnel",    "s,t,p",    0,    (int) M_BNEL,     INSN_MACRO,             0,              I1      },
251 {"bnel",    "s,I,p",    0,    (int) M_BNEL_I,   INSN_MACRO,             0,              I1      },
252 {"break",   "",             0x4680,     0xffff, TRAP,                   0,              I1      },
253 {"break",   "",         0x00000007, 0xffffffff, TRAP,                   0,              I1      },
254 {"break",   "mF",           0x4680,     0xfff0, TRAP,                   0,              I1      },
255 {"break",   "c",        0x00000007, 0xfc00ffff, TRAP,                   0,              I1      },
256 {"break",   "c,q",      0x00000007, 0xfc00003f, TRAP,                   0,              I1      },
257 {"c.f.d",   "S,T",      0x5400043c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
258 {"c.f.d",   "M,S,T",    0x5400043c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
259 {"c.f.s",   "S,T",      0x5400003c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
260 {"c.f.s",   "M,S,T",    0x5400003c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
261 {"c.f.ps",  "S,T",      0x5400083c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
262 {"c.f.ps",  "M,S,T",    0x5400083c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
263 {"c.un.d",  "S,T",      0x5400047c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
264 {"c.un.d",  "M,S,T",    0x5400047c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
265 {"c.un.s",  "S,T",      0x5400007c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
266 {"c.un.s",  "M,S,T",    0x5400007c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
267 {"c.un.ps", "S,T",      0x5400087c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
268 {"c.un.ps", "M,S,T",    0x5400087c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
269 {"c.eq.d",  "S,T",      0x540004bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
270 {"c.eq.d",  "M,S,T",    0x540004bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
271 {"c.eq.s",  "S,T",      0x540000bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
272 {"c.eq.s",  "M,S,T",    0x540000bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
273 {"c.eq.ps", "S,T",      0x540008bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
274 {"c.eq.ps", "M,S,T",    0x540008bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
275 {"c.ueq.d", "S,T",      0x540004fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
276 {"c.ueq.d", "M,S,T",    0x540004fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
277 {"c.ueq.s", "S,T",      0x540000fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
278 {"c.ueq.s", "M,S,T",    0x540000fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
279 {"c.ueq.ps", "S,T",     0x540008fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
280 {"c.ueq.ps", "M,S,T",   0x540008fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
281 {"c.olt.d", "S,T",      0x5400053c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
282 {"c.olt.d", "M,S,T",    0x5400053c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
283 {"c.olt.s", "S,T",      0x5400013c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
284 {"c.olt.s", "M,S,T",    0x5400013c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
285 {"c.olt.ps", "S,T",     0x5400093c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
286 {"c.olt.ps", "M,S,T",   0x5400093c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
287 {"c.ult.d", "S,T",      0x5400057c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
288 {"c.ult.d", "M,S,T",    0x5400057c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
289 {"c.ult.s", "S,T",      0x5400017c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
290 {"c.ult.s", "M,S,T",    0x5400017c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
291 {"c.ult.ps", "S,T",     0x5400097c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
292 {"c.ult.ps", "M,S,T",   0x5400097c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
293 {"c.ole.d", "S,T",      0x540005bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
294 {"c.ole.d", "M,S,T",    0x540005bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
295 {"c.ole.s", "S,T",      0x540001bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
296 {"c.ole.s", "M,S,T",    0x540001bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
297 {"c.ole.ps", "S,T",     0x540009bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
298 {"c.ole.ps", "M,S,T",   0x540009bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
299 {"c.ule.d", "S,T",      0x540005fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
300 {"c.ule.d", "M,S,T",    0x540005fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
301 {"c.ule.s", "S,T",      0x540001fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
302 {"c.ule.s", "M,S,T",    0x540001fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
303 {"c.ule.ps", "S,T",     0x540009fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
304 {"c.ule.ps", "M,S,T",   0x540009fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
305 {"c.sf.d",  "S,T",      0x5400063c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
306 {"c.sf.d",  "M,S,T",    0x5400063c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
307 {"c.sf.s",  "S,T",      0x5400023c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
308 {"c.sf.s",  "M,S,T",    0x5400023c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
309 {"c.sf.ps", "S,T",      0x54000a3c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
310 {"c.sf.ps", "M,S,T",    0x54000a3c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
311 {"c.ngle.d", "S,T",     0x5400067c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
312 {"c.ngle.d", "M,S,T",   0x5400067c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
313 {"c.ngle.s", "S,T",     0x5400027c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
314 {"c.ngle.s", "M,S,T",   0x5400027c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
315 {"c.ngle.ps", "S,T",    0x54000a7c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
316 {"c.ngle.ps", "M,S,T",  0x54000a7c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
317 {"c.seq.d", "S,T",      0x540006bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
318 {"c.seq.d", "M,S,T",    0x540006bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
319 {"c.seq.s", "S,T",      0x540002bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
320 {"c.seq.s", "M,S,T",    0x540002bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
321 {"c.seq.ps", "S,T",     0x54000abc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
322 {"c.seq.ps", "M,S,T",   0x54000abc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
323 {"c.ngl.d", "S,T",      0x540006fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
324 {"c.ngl.d", "M,S,T",    0x540006fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
325 {"c.ngl.s", "S,T",      0x540002fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
326 {"c.ngl.s", "M,S,T",    0x540002fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
327 {"c.ngl.ps", "S,T",     0x54000afc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
328 {"c.ngl.ps", "M,S,T",   0x54000afc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
329 {"c.lt.d",  "S,T",      0x5400073c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
330 {"c.lt.d",  "M,S,T",    0x5400073c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
331 {"c.lt.s",  "S,T",      0x5400033c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
332 {"c.lt.s",  "M,S,T",    0x5400033c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
333 {"c.lt.ps", "S,T",      0x54000b3c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
334 {"c.lt.ps", "M,S,T",    0x54000b3c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
335 {"c.nge.d", "S,T",      0x5400077c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
336 {"c.nge.d", "M,S,T",    0x5400077c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
337 {"c.nge.s", "S,T",      0x5400037c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
338 {"c.nge.s", "M,S,T",    0x5400037c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
339 {"c.nge.ps", "S,T",     0x54000b7c, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
340 {"c.nge.ps", "M,S,T",   0x54000b7c, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
341 {"c.le.d",  "S,T",      0x540007bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
342 {"c.le.d",  "M,S,T",    0x540007bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
343 {"c.le.s",  "S,T",      0x540003bc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
344 {"c.le.s",  "M,S,T",    0x540003bc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
345 {"c.le.ps", "S,T",      0x54000bbc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
346 {"c.le.ps", "M,S,T",    0x54000bbc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
347 {"c.ngt.d", "S,T",      0x540007fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
348 {"c.ngt.d", "M,S,T",    0x540007fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
349 {"c.ngt.s", "S,T",      0x540003fc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
350 {"c.ngt.s", "M,S,T",    0x540003fc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_S,   0,              I1      },
351 {"c.ngt.ps", "S,T",     0x54000bfc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
352 {"c.ngt.ps", "M,S,T",   0x54000bfc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D,   0,              I1      },
353 {"cache",   "k,~(b)",   0x20006000, 0xfc00f000, RD_b,                   0,              I1      },
354 {"cache",   "k,o(b)",   0,    (int) M_CACHE_OB, INSN_MACRO,             0,              I1      },
355 {"cache",   "k,A(b)",   0,    (int) M_CACHE_AB, INSN_MACRO,             0,              I1      },
356 {"ceil.l.d", "T,S",     0x5400533b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
357 {"ceil.l.s", "T,S",     0x5400133b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
358 {"ceil.w.d", "T,S",     0x54005b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
359 {"ceil.w.s", "T,S",     0x54001b3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,      I1      },
360 {"cfc1",    "t,G",      0x5400103b, 0xfc00ffff, WR_t|RD_C1|FP_S,        0,              I1      },
361 {"cfc1",    "t,S",      0x5400103b, 0xfc00ffff, WR_t|RD_C1|FP_S,        0,              I1      },
362 {"cfc2",    "t,G",      0x0000cd3c, 0xfc00ffff, WR_t|RD_C2,             0,              I1      },
363 {"clo",     "t,s",      0x00004b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
364 {"clz",     "t,s",      0x00005b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
365 {"cop2",    "C",        0x00000002, 0xfc000007, CP,                     0,              I1      },
366 {"ctc1",    "t,G",      0x5400183b, 0xfc00ffff, RD_t|WR_CC|FP_S,        0,              I1      },
367 {"ctc1",    "t,S",      0x5400183b, 0xfc00ffff, RD_t|WR_CC|FP_S,        0,              I1      },
368 {"ctc2",    "t,G",      0x0000dd3c, 0xfc00ffff, RD_t|WR_C2|WR_CC,       0,              I1      },
369 {"cvt.d.l", "T,S",      0x5400537b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
370 {"cvt.d.s", "T,S",      0x5400137b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
371 {"cvt.d.w", "T,S",      0x5400337b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
372 {"cvt.l.d", "T,S",      0x5400413b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
373 {"cvt.l.s", "T,S",      0x5400013b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
374 {"cvt.s.l", "T,S",      0x54005b7b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
375 {"cvt.s.d", "T,S",      0x54001b7b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
376 {"cvt.s.w", "T,S",      0x54003b7b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
377 {"cvt.s.pl", "T,S",     0x5400213b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
378 {"cvt.s.pu", "T,S",     0x5400293b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
379 {"cvt.w.d", "T,S",      0x5400493b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
380 {"cvt.w.s", "T,S",      0x5400093b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
381 {"cvt.ps.s", "D,V,T",   0x54000180, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S|FP_D, 0,            I1      },
382 {"dabs",    "d,v",      0,    (int) M_DABS,     INSN_MACRO,             0,              I3      },
383 {"dadd",    "d,v,t",    0x58000110, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
384 {"dadd",    "t,r,I",    0,    (int) M_DADD_I,   INSN_MACRO,             0,              I3      },
385 {"daddi",   "t,r,.",    0x5800001c, 0xfc00003f, WR_t|RD_s,              0,              I3      },
386 {"daddi",   "t,r,I",    0,    (int) M_DADD_I,   INSN_MACRO,             0,              I3      },
387 {"daddiu",  "t,r,j",    0x5c000000, 0xfc000000, WR_t|RD_s,              0,              I3      },
388 {"daddu",   "d,v,t",    0x58000150, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
389 {"daddu",   "t,r,I",    0,    (int) M_DADDU_I,  INSN_MACRO,             0,              I3      },
390 {"dclo",    "t,s",      0x58004b3c, 0xfc00ffff, WR_t|RD_s,              0,              I3      },
391 {"dclz",    "t,s",      0x58005b3c, 0xfc00ffff, WR_t|RD_s,              0,              I3      },
392 {"deret",   "",         0x0000e37c, 0xffffffff, 0,                      0,              I1      },
393 {"dext",    "t,r,I,+I", 0,    (int) M_DEXT,     INSN_MACRO,             0,              I3      },
394 {"dext",    "t,r,+A,+C",0x5800002c, 0xfc00003f, WR_t|RD_s,              0,              I3      },
395 {"dextm",   "t,r,+A,+G",0x58000024, 0xfc00003f, WR_t|RD_s,              0,              I3      },
396 {"dextu",   "t,r,+E,+H",0x58000014, 0xfc00003f, WR_t|RD_s,              0,              I3      },
397 /* For ddiv, see the comments about div.  */
398 {"ddiv",    "z,s,t",    0x5800ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
399 {"ddiv",    "z,t",      0x5800ab3c, 0xfc1fffff, RD_s|RD_t|WR_HILO,      0,              I3      },
400 {"ddiv",    "d,v,t",    0,    (int) M_DDIV_3,   INSN_MACRO,             0,              I3      },
401 {"ddiv",    "d,v,I",    0,    (int) M_DDIV_3I,  INSN_MACRO,             0,              I3      },
402 /* For ddivu, see the comments about div.  */
403 {"ddivu",   "z,s,t",    0x5800bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
404 {"ddivu",   "z,t",      0x5800bb3c, 0xfc1fffff, RD_s|RD_t|WR_HILO,      0,              I3      },
405 {"ddivu",   "d,v,t",    0,    (int) M_DDIVU_3,  INSN_MACRO,             0,              I3      },
406 {"ddivu",   "d,v,I",    0,    (int) M_DDIVU_3I, INSN_MACRO,             0,              I3      },
407 {"di",      "",         0x0000477c, 0xffffffff, RD_C0,                  WR_s,           I1      },
408 {"di",      "s",        0x0000477c, 0xffe0ffff, RD_C0,                  WR_s,           I1      },
409 {"dins",    "t,r,I,+I", 0,    (int) M_DINS,     INSN_MACRO,             0,              I3      },
410 {"dins",    "t,r,+A,+B",0x5800000c, 0xfc00003f, WR_t|RD_s,              0,              I3      },
411 {"dinsm",   "t,r,+A,+F",0x58000004, 0xfc00003f, WR_t|RD_s,              0,              I3      },
412 {"dinsu",   "t,r,+E,+F",0x58000034, 0xfc00003f, WR_t|RD_s,              0,              I3      },
413 /* The MIPS assembler treats the div opcode with two operands as
414    though the first operand appeared twice (the first operand is both
415    a source and a destination).  To get the div machine instruction,
416    you must use an explicit destination of $0.  */
417 {"div",     "z,s,t",    0x0000ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
418 {"div",     "z,t",      0x0000ab3c, 0xfc1fffff, RD_s|RD_t|WR_HILO,      0,              I1      },
419 {"div",     "d,v,t",    0,    (int) M_DIV_3,    INSN_MACRO,             0,              I1      },
420 {"div",     "d,v,I",    0,    (int) M_DIV_3I,   INSN_MACRO,             0,              I1      },
421 {"div.d",   "D,V,T",    0x540001f0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
422 {"div.s",   "D,V,T",    0x540000f0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
423 /* For divu, see the comments about div.  */
424 {"divu",    "z,s,t",    0x0000bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
425 {"divu",    "z,t",      0x0000bb3c, 0xfc1fffff, RD_s|RD_t|WR_HILO,      0,              I1      },
426 {"divu",    "d,v,t",    0,    (int) M_DIVU_3,   INSN_MACRO,             0,              I1      },
427 {"divu",    "d,v,I",    0,    (int) M_DIVU_3I,  INSN_MACRO,             0,              I1      },
428 {"dla",     "t,A(b)",   0,    (int) M_DLA_AB,   INSN_MACRO,             0,              I3      },
429 {"dlca",    "t,A(b)",   0,    (int) M_DLCA_AB,  INSN_MACRO,             0,              I3      },
430 {"dli",     "t,j",      0x30000000, 0xfc1f0000, WR_t,                   0,              I3      }, /* addiu */
431 {"dli",     "t,i",      0x50000000, 0xfc1f0000, WR_t,                   0,              I3      }, /* ori */
432 {"dli",     "t,I",      0,    (int) M_DLI,      INSN_MACRO,             0,              I3      },
433 {"dmfc0",   "t,G",      0x580000fc, 0xfc00ffff, WR_t|RD_C0,             0,              I3      },
434 {"dmfc0",   "t,+D",     0x580000fc, 0xfc00c7ff, WR_t|RD_C0,             0,              I3      },
435 {"dmfc0",   "t,G,H",    0x580000fc, 0xfc00c7ff, WR_t|RD_C0,             0,              I3      },
436 {"dmtc0",   "t,G",      0x580002fc, 0xfc00ffff, RD_t|WR_C0|WR_CC,       0,              I3      },
437 {"dmtc0",   "t,+D",     0x580002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC,       0,              I3      },
438 {"dmtc0",   "t,G,H",    0x580002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC,       0,              I3      },
439 {"dmfc1",   "t,S",      0x5400243b, 0xfc00ffff, WR_t|RD_S|FP_S,         0,              I3      },
440 {"dmfc1",   "t,G",      0x5400243b, 0xfc00ffff, WR_t|RD_S|FP_S,         0,              I3      },
441 {"dmtc1",   "t,G",      0x54002c3b, 0xfc00ffff, RD_t|WR_S|FP_S,         0,              I3      },
442 {"dmtc1",   "t,S",      0x54002c3b, 0xfc00ffff, RD_t|WR_S|FP_S,         0,              I3      },
443 {"dmfc2",   "t,G",      0x00006d3c, 0xfc00ffff, WR_t|RD_C2,             0,              I3      },
444 /*{"dmfc2",   "t,G,H",  0x58000283, 0xfc001fff, WR_t|RD_C2,             0,              I3      },*/
445 {"dmtc2",   "t,G",      0x00007d3c, 0xfc00ffff, RD_t|WR_C2|WR_CC,       0,              I3      },
446 /*{"dmtc2",   "t,G,H",  0x58000683, 0xfc001fff, RD_t|WR_C2|WR_CC,       0,              I3      },*/
447 {"dmul",    "d,v,t",    0,    (int) M_DMUL,     INSN_MACRO,             0,              I3      },
448 {"dmul",    "d,v,I",    0,    (int) M_DMUL_I,   INSN_MACRO,             0,              I3      },
449 {"dmulo",   "d,v,t",    0,    (int) M_DMULO,    INSN_MACRO,             0,              I3      },
450 {"dmulo",   "d,v,I",    0,    (int) M_DMULO_I,  INSN_MACRO,             0,              I3      },
451 {"dmulou",  "d,v,t",    0,    (int) M_DMULOU,   INSN_MACRO,             0,              I3      },
452 {"dmulou",  "d,v,I",    0,    (int) M_DMULOU_I, INSN_MACRO,             0,              I3      },
453 {"dmult",   "s,t",      0x58008b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
454 {"dmultu",  "s,t",      0x58009b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
455 {"dneg",    "d,w",      0x58000190, 0xfc1f07ff, WR_d|RD_t,              0,              I3      }, /* dsub 0 */
456 {"dnegu",   "d,w",      0x580001d0, 0xfc1f07ff, WR_d|RD_t,              0,              I3      }, /* dsubu 0 */
457 {"drem",    "z,s,t",    0x5800ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
458 {"drem",    "d,v,t",    0,    (int) M_DREM_3,   INSN_MACRO,             0,              I3      },
459 {"drem",    "d,v,I",    0,    (int) M_DREM_3I,  INSN_MACRO,             0,              I3      },
460 {"dremu",   "z,s,t",    0x5800bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I3      },
461 {"dremu",   "d,v,t",    0,    (int) M_DREMU_3,  INSN_MACRO,             0,              I3      },
462 {"dremu",   "d,v,I",    0,    (int) M_DREMU_3I, INSN_MACRO,             0,              I3      },
463 {"drol",    "d,v,t",    0,    (int) M_DROL,     INSN_MACRO,             0,              I3      },
464 {"drol",    "d,v,I",    0,    (int) M_DROL_I,   INSN_MACRO,             0,              I3      },
465 {"dror",    "d,v,t",    0,    (int) M_DROR,     INSN_MACRO,             0,              I3      },
466 {"dror",    "d,v,I",    0,    (int) M_DROR_I,   INSN_MACRO,             0,              I3      },
467 {"dror",    "t,r,<",    0x580000c0, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
468 {"drorv",   "d,t,s",    0x580000d0, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              I3      },
469 {"dror32",  "t,r,<",    0x580000c8, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
470 {"drotl",   "d,v,t",    0,    (int) M_DROL,     INSN_MACRO,             0,              I3      },
471 {"drotl",   "d,v,I",    0,    (int) M_DROL_I,   INSN_MACRO,             0,              I3      },
472 {"drotr",   "d,v,t",    0,    (int) M_DROR,     INSN_MACRO,             0,              I3      },
473 {"drotr",   "d,v,I",    0,    (int) M_DROR_I,   INSN_MACRO,             0,              I3      },
474 {"drotrv",  "d,t,s",    0x580000d0, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              I3      },
475 {"drotr32", "t,r,<",    0x580000c8, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
476 {"dsbh",    "t,r",      0x58007b3c, 0xfc00ffff, WR_t|RD_s,              0,              I3      },
477 {"dshd",    "t,r",      0x5800fb3c, 0xfc00ffff, WR_t|RD_s,              0,              I3      },
478 {"dsllv",   "d,t,s",    0x58000010, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      },
479 {"dsll32",  "t,r,<",    0x58000008, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
480 {"dsll",    "d,t,s",    0x58000010, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      }, /* dsllv */
481 {"dsll",    "t,r,>",    0x58000008, 0xfc0007ff, WR_t|RD_s,              0,              I3      }, /* dsll32 */
482 {"dsll",    "t,r,<",    0x58000000, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
483 {"dsrav",   "d,t,s",    0x58000090, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      },
484 {"dsra32",  "t,r,<",    0x58000088, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
485 {"dsra",    "d,t,s",    0x58000090, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      }, /* dsrav */
486 {"dsra",    "t,r,>",    0x58000088, 0xfc0007ff, WR_t|RD_s,              0,              I3      }, /* dsra32 */
487 {"dsra",    "t,r,<",    0x58000080, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
488 {"dsrlv",   "d,t,s",    0x58000050, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      },
489 {"dsrl32",  "t,r,<",    0x58000048, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
490 {"dsrl",    "d,t,s",    0x58000050, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I3      }, /* dsrlv */
491 {"dsrl",    "t,r,>",    0x58000048, 0xfc0007ff, WR_t|RD_s,              0,              I3      }, /* dsrl32 */
492 {"dsrl",    "t,r,<",    0x58000040, 0xfc0007ff, WR_t|RD_s,              0,              I3      },
493 {"dsub",    "d,v,t",    0x58000190, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
494 {"dsub",    "d,v,I",    0,    (int) M_DSUB_I,   INSN_MACRO,             0,              I3      },
495 {"dsubu",   "d,v,t",    0x580001d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
496 {"dsubu",   "d,v,I",    0,    (int) M_DSUBU_I,  INSN_MACRO,             0,              I3      },
497 {"ei",      "",         0x0000577c, 0xffffffff, WR_C0,                  WR_s,           I1      },
498 {"ei",      "s",        0x0000577c, 0xffe0ffff, WR_C0,                  WR_s,           I1      },
499 {"eret",    "",         0x0000f37c, 0xffffffff, 0,                      0,              I1      },
500 {"ext",     "t,r,+A,+C", 0x0000002c, 0xfc00003f, WR_t|RD_s,             0,              I1      },
501 {"floor.l.d", "T,V",    0x5400433b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
502 {"floor.l.s", "T,V",    0x5400033b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
503 {"floor.w.d", "T,V",    0x54004b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
504 {"floor.w.s", "T,V",    0x54000b3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
505 {"ins",     "t,r,+A,+B", 0x0000000c, 0xfc00003f, WR_t|RD_s,             0,              I1      },
506 {"jr",      "mj",           0x4580,     0xffe0, UBD,                    MOD_mj,         I1      },
507 {"jr",      "s",        0x00000f3c, 0xffe0ffff, UBD|RD_s,               BD32,           I1      }, /* jalr */
508 {"jrs",     "s",        0x00004f3c, 0xffe0ffff, UBD|RD_s,               BD16,           I1      }, /* jalrs */
509 {"jraddiusp", "mP",         0x4700,     0xffe0, TRAP,                   UBR|RD_31|MOD_sp,       I1      },
510 {"jrc",     "mj",           0x45a0,     0xffe0, TRAP,                   UBR|MOD_mj,             I1      },
511 {"jr.hb",   "s",        0x00001f3c, 0xffe0ffff, UBD|RD_s,               BD32,           I1      }, /* jalr.hb */
512 {"jrs.hb",  "s",        0x00005f3c, 0xffe0ffff, UBD|RD_s,               BD16,           I1      }, /* jalrs.hb */
513 {"j",       "mj",           0x4580,     0xffe0, UBD,                    MOD_mj,         I1      }, /* jr */
514 {"j",       "s",        0x00000f3c, 0xffe0ffff, UBD|RD_s,               BD32,           I1      }, /* jr */
515 /* SVR4 PIC code requires special handling for j, so it must be a
516    macro.  */
517 {"j",       "a",        0,    (int) M_J_A,      INSN_MACRO,             0,              I1      },
518 /* This form of j is used by the disassembler and internally by the
519    assembler, but will never match user input (because the line above
520    will match first).  */
521 {"j",       "a",        0xd4000000, 0xfc000000, UBD,                    0,              I1      },
522 {"jalr",    "mj",           0x45c0,     0xffe0, UBD|WR_31,              MOD_mj|BD32,    I1      },
523 {"jalr",    "my,mj",        0x45c0,     0xffe0, UBD|WR_31,              MOD_mj|BD32,    I1      },
524 {"jalr",    "s",        0x03e00f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD32,           I1      },
525 {"jalr",    "t,s",      0x00000f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD32,           I1      },
526 {"jalr.hb", "s",        0x03e01f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD32,           I1      },
527 {"jalr.hb", "t,s",      0x00001f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD32,           I1      },
528 {"jalrs",   "mj",           0x45e0,     0xffe0, UBD|WR_31,              MOD_mj|BD16,    I1      },
529 {"jalrs",   "my,mj",        0x45e0,     0xffe0, UBD|WR_31,              MOD_mj|BD16,    I1      },
530 {"jalrs",   "s",        0x03e04f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD16,           I1      },
531 {"jalrs",   "t,s",      0x00004f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD16,           I1      },
532 {"jalrs.hb", "s",       0x03e05f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD16,           I1      },
533 {"jalrs.hb", "t,s",     0x00005f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD16,           I1      },
534 /* SVR4 PIC code requires special handling for jal, so it must be a
535    macro.  */
536 {"jal",     "d,s",      0,    (int) M_JAL_2,    INSN_MACRO,             0,              I1      },
537 {"jal",     "s",        0,    (int) M_JAL_1,    INSN_MACRO,             0,              I1      },
538 {"jal",     "a",        0,    (int) M_JAL_A,    INSN_MACRO,             0,              I1      },
539 /* This form of jal is used by the disassembler and internally by the
540    assembler, but will never match user input (because the line above
541    will match first).  */
542 {"jal",     "a",        0xf4000000, 0xfc000000, UBD|WR_31,              BD32,           I1      },
543 {"jals",    "d,s",      0,    (int) M_JALS_2,   INSN_MACRO,             0,              I1      },
544 {"jals",    "s",        0,    (int) M_JALS_1,   INSN_MACRO,             0,              I1      },
545 {"jals",    "a",        0,    (int) M_JALS_A,   INSN_MACRO,             0,              I1      },
546 {"jals",    "a",        0x74000000, 0xfc000000, UBD|WR_31,              BD16,           I1      },
547 {"jalx",    "a",        0xf0000000, 0xfc000000, UBD|WR_31,              BD32,           I1      },
548 {"la",      "t,A(b)",   0,    (int) M_LA_AB,    INSN_MACRO,             0,              I1      },
549 {"lb",      "t,o(b)",   0x1c000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
550 {"lb",      "t,A(b)",   0,    (int) M_LB_AB,    INSN_MACRO,             0,              I1      },
551 {"lbu",     "md,mG(ml)",    0x0800,     0xfc00, 0,                      MOD_md|MOD_ml,  I1      },
552 {"lbu",     "t,o(b)",   0x14000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
553 {"lbu",     "t,A(b)",   0,    (int) M_LBU_AB,   INSN_MACRO,             0,              I1      },
554 {"lca",     "t,A(b)",   0,    (int) M_LCA_AB,   INSN_MACRO,             0,              I1      },
555 /* The macro has to be first to handle o32 correctly.  */
556 {"ld",      "t,o(b)",   0,    (int) M_LD_OB,    INSN_MACRO,             0,              I1      },
557 {"ld",      "t,o(b)",   0xdc000000, 0xfc000000, RD_b|WR_t,              0,              I3      },
558 {"ld",      "t,A(b)",   0,    (int) M_LD_AB,    INSN_MACRO,             0,              I1      },
559 {"ldc1",    "T,o(b)",   0xbc000000, 0xfc000000, RD_b|WR_T|FP_D,         0,              I1      },
560 {"ldc1",    "E,o(b)",   0xbc000000, 0xfc000000, RD_b|WR_T|FP_D,         0,              I1      },
561 {"ldc1",    "T,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I1      },
562 {"ldc1",    "E,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I1      },
563 {"ldc2",    "E,~(b)",   0x20002000, 0xfc00f000, RD_b|WR_CC,             0,              I1      },
564 {"ldc2",    "E,o(b)",   0,    (int) M_LDC2_OB,  INSN_MACRO,             0,              I1      },
565 {"ldc2",    "E,A(b)",   0,    (int) M_LDC2_AB,  INSN_MACRO,             0,              I1      },
566 {"l.d",     "T,o(b)",   0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0,              I1      }, /* ldc1 */
567 {"l.d",     "T,A(b)",   0,    (int) M_LDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I1      },
568 {"ldl",     "t,~(b)",   0x60004000, 0xfc00f000, WR_t|RD_b,              0,              I3      },
569 {"ldl",     "t,o(b)",   0,    (int) M_LDL_OB,   INSN_MACRO,             0,              I3      },
570 {"ldl",     "t,A(b)",   0,    (int) M_LDL_AB,   INSN_MACRO,             0,              I3      },
571 {"ldm",     "n,~(b)",   0x20007000, 0xfc00f000, RD_b,                   0,              I3      },
572 {"ldm",     "n,o(b)",   0,    (int) M_LDM_OB,   INSN_MACRO,             0,              I3      },
573 {"ldm",     "n,A(b)",   0,    (int) M_LDM_AB,   INSN_MACRO,             0,              I3      },
574 {"ldp",     "t,~(b)",   0x20004000, 0xfc00f000, RD_b|WR_t,              0,              I3      },
575 {"ldp",     "t,o(b)",   0,    (int) M_LDP_OB,   INSN_MACRO,             0,              I3      },
576 {"ldp",     "t,A(b)",   0,    (int) M_LDP_AB,   INSN_MACRO,             0,              I3      },
577 {"ldr",     "t,~(b)",   0x60005000, 0xfc00f000, WR_t|RD_b,              0,              I3      },
578 {"ldr",     "t,o(b)",   0,    (int) M_LDR_OB,   INSN_MACRO,             0,              I3      },
579 {"ldr",     "t,A(b)",   0,    (int) M_LDR_AB,   INSN_MACRO,             0,              I3      },
580 {"ldxc1",   "D,t(b)",   0x540000c8, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D,    0,              I1      },
581 {"lh",      "t,o(b)",   0x3c000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
582 {"lh",      "t,A(b)",   0,    (int) M_LH_AB,    INSN_MACRO,             0,              I1      },
583 {"lhu",     "md,mH(ml)",    0x2800,     0xfc00, 0,                      MOD_md|MOD_ml,  I1      },
584 {"lhu",     "t,o(b)",   0x34000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
585 {"lhu",     "t,A(b)",   0,    (int) M_LHU_AB,   INSN_MACRO,             0,              I1      },
586 /* li is at the start of the table.  */
587 {"li.d",    "t,F",      0,    (int) M_LI_D,     INSN_MACRO,             INSN2_M_FP_D,   I1      },
588 {"li.d",    "T,L",      0,    (int) M_LI_DD,    INSN_MACRO,             INSN2_M_FP_D,   I1      },
589 {"li.s",    "t,f",      0,    (int) M_LI_S,     INSN_MACRO,             INSN2_M_FP_S,   I1      },
590 {"li.s",    "T,l",      0,    (int) M_LI_SS,    INSN_MACRO,             INSN2_M_FP_S,   I1      },
591 {"ll",      "t,~(b)",   0x60003000, 0xfc00f000, RD_b|WR_t,              0,              I1      },
592 {"ll",      "t,o(b)",   0,    (int) M_LL_OB,    INSN_MACRO,             0,              I1      },
593 {"ll",      "t,A(b)",   0,    (int) M_LL_AB,    INSN_MACRO,             0,              I1      },
594 {"lld",     "t,~(b)",   0x60007000, 0xfc00f000, RD_b|WR_t,              0,              I3      },
595 {"lld",     "t,o(b)",   0,    (int) M_LLD_OB,   INSN_MACRO,             0,              I3      },
596 {"lld",     "t,A(b)",   0,    (int) M_LLD_AB,   INSN_MACRO,             0,              I3      },
597 {"lui",     "s,u",      0x41a00000, 0xffe00000, 0,                      WR_s,           I1      },
598 {"luxc1",   "D,t(b)",   0x54000148, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D,    0,              I1      },
599 {"lw",      "md,mJ(ml)",    0x6800,     0xfc00, 0,                      MOD_md|MOD_ml,  I1      },
600 {"lw",      "mp,mU(ms)",    0x4800,     0xfc00, 0,                      MOD_mp|MOD_sp,  I1      }, /* lwsp */
601 {"lw",      "md,mA(ma)",    0x6400,     0xfc00, 0,                      MOD_md|RD_gp,   I1      }, /* lwgp */
602 {"lw",      "t,o(b)",   0xfc000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
603 {"lw",      "t,A(b)",   0,    (int) M_LW_AB,    INSN_MACRO,             0,              I1      },
604 {"lwc1",    "T,o(b)",   0x9c000000, 0xfc000000, RD_b|WR_T|FP_S,         0,              I1      },
605 {"lwc1",    "E,o(b)",   0x9c000000, 0xfc000000, RD_b|WR_T|FP_S,         0,              I1      },
606 {"lwc1",    "T,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
607 {"lwc1",    "E,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
608 {"lwc2",    "E,~(b)",   0x20000000, 0xfc00f000, RD_b|WR_CC,             0,              I1      },
609 {"lwc2",    "E,o(b)",   0,    (int) M_LWC2_OB,  INSN_MACRO,             0,              I1      },
610 {"lwc2",    "E,A(b)",   0,    (int) M_LWC2_AB,  INSN_MACRO,             0,              I1      },
611 {"l.s",     "T,o(b)",   0x9c000000, 0xfc000000, RD_b|WR_T|FP_S,         0,              I1      }, /* lwc1 */
612 {"l.s",     "T,A(b)",   0,    (int) M_LWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
613 {"lwl",     "t,~(b)",   0x60000000, 0xfc00f000, RD_b|WR_t,              0,              I1      },
614 {"lwl",     "t,o(b)",   0,    (int) M_LWL_OB,   INSN_MACRO,             0,              I1      },
615 {"lwl",     "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,             0,              I1      },
616 {"lcache",  "t,~(b)",   0x60000000, 0xfc00f000, RD_b|WR_t,              0,              I1      }, /* same */
617 {"lcache",  "t,o(b)",   0,    (int) M_LWL_OB,   INSN_MACRO,             0,              I1      },
618 {"lcache",  "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,             0,              I1      },
619 {"lwm",     "mN,mJ(ms)",    0x4500,     0xffc0, TRAP,                   MOD_sp,         I1      },
620 {"lwm",     "n,~(b)",   0x20005000, 0xfc00f000, RD_b|TRAP,              0,              I1      },
621 {"lwm",     "n,o(b)",   0,    (int) M_LWM_OB,   INSN_MACRO,             0,              I1      },
622 {"lwm",     "n,A(b)",   0,    (int) M_LWM_AB,   INSN_MACRO,             0,              I1      },
623 {"lwp",     "t,~(b)",   0x20001000, 0xfc00f000, RD_b|WR_t|TRAP,         0,              I1      },
624 {"lwp",     "t,o(b)",   0,    (int) M_LWP_OB,   INSN_MACRO,             0,              I1      },
625 {"lwp",     "t,A(b)",   0,    (int) M_LWP_AB,   INSN_MACRO,             0,              I1      },
626 {"lwr",     "t,~(b)",   0x60001000, 0xfc00f000, RD_b|WR_t,              0,              I1      },
627 {"lwr",     "t,o(b)",   0,    (int) M_LWR_OB,   INSN_MACRO,             0,              I1      },
628 {"lwr",     "t,A(b)",   0,    (int) M_LWR_AB,   INSN_MACRO,             0,              I1      },
629 {"lwu",     "t,~(b)",   0x6000e000, 0xfc00f000, RD_b|WR_t,              0,              I3      },
630 {"lwu",     "t,o(b)",   0,    (int) M_LWU_OB,   INSN_MACRO,             0,              I3      },
631 {"lwu",     "t,A(b)",   0,    (int) M_LWU_AB,   INSN_MACRO,             0,              I3      },
632 {"lwxc1",   "D,t(b)",   0x54000048, 0xfc0007ff, WR_D|RD_t|RD_b|FP_S,    0,              I1      },
633 {"flush",   "t,~(b)",   0x60001000, 0xfc00f000, RD_b|WR_t,              0,              I1      }, /* same */
634 {"flush",   "t,o(b)",   0,    (int) M_LWR_OB,   INSN_MACRO,             0,              I1      },
635 {"flush",   "t,A(b)",   0,    (int) M_LWR_AB,   INSN_MACRO,             0,              I1      },
636 {"lwxs",    "d,t(b)",   0x00000118, 0xfc0007ff, RD_b|RD_t|WR_d,         0,              I1      },
637 {"madd",    "s,t",      0x0000cb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              I1      },
638 {"madd.d",  "D,R,S,T",  0x54000009, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
639 {"madd.s",  "D,R,S,T",  0x54000001, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I1      },
640 {"madd.ps", "D,R,S,T",  0x54000011, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
641 {"maddu",   "s,t",      0x0000db3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              I1      },
642 {"mfc0",    "t,G",      0x000000fc, 0xfc00ffff, WR_t|RD_C0,             0,              I1      },
643 {"mfc0",    "t,+D",     0x000000fc, 0xfc00c7ff, WR_t|RD_C0,             0,              I1      },
644 {"mfc0",    "t,G,H",    0x000000fc, 0xfc00c7ff, WR_t|RD_C0,             0,              I1      },
645 {"mfc1",    "t,S",      0x5400203b, 0xfc00ffff, WR_t|RD_S|FP_S,         0,              I1      },
646 {"mfc1",    "t,G",      0x5400203b, 0xfc00ffff, WR_t|RD_S|FP_S,         0,              I1      },
647 {"mfc2",    "t,G",      0x00004d3c, 0xfc00ffff, WR_t|RD_C2,             0,              I1      },
648 {"mfhc1",   "t,S",      0x5400303b, 0xfc00ffff, WR_t|RD_S|FP_D,         0,              I1      },
649 {"mfhc1",   "t,G",      0x5400303b, 0xfc00ffff, WR_t|RD_S|FP_D,         0,              I1      },
650 {"mfhc2",   "t,G",      0x00008d3c, 0xfc00ffff, WR_t|RD_C2,             0,              I1      },
651 {"mfhi",    "mj",           0x4600,     0xffe0, RD_HI,                  MOD_mj,         I1      },
652 {"mfhi",    "s",        0x00000d7c, 0xffe0ffff, RD_HI,                  WR_s,           I1      },
653 {"mflo",    "mj",           0x4640,     0xffe0, RD_LO,                  MOD_mj,         I1      },
654 {"mflo",    "s",        0x00001d7c, 0xffe0ffff, RD_LO,                  WR_s,           I1      },
655 {"mov.d",   "T,S",      0x5400207b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
656 {"mov.s",   "T,S",      0x5400007b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
657 {"mov.ps",  "T,S",      0x5400407b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
658 {"movep",   "mh,mi,mm,mn",  0x8400,     0xfc01, TRAP,                   MOD_mhi|MOD_mm|MOD_mn,  I1      },
659 {"movf",    "t,s,M",    0x5400017b, 0xfc001fff, WR_t|RD_s|RD_CC|FP_S|FP_D, 0,           I1      },
660 {"movf.d",  "T,S,M",    0x54000220, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D,   0,              I1      },
661 {"movf.s",  "T,S,M",    0x54000020, 0xfc001fff, WR_T|RD_S|RD_CC|FP_S,   0,              I1      },
662 {"movf.ps", "T,S,M",    0x54000420, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D,   0,              I1      },
663 {"movn",    "d,v,t",    0x00000018, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
664 {"movn.d",  "D,S,t",    0x54000138, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D,    0,              I1      },
665 {"movn.s",  "D,S,t",    0x54000038, 0xfc0007ff, WR_D|RD_S|RD_t|FP_S,    0,              I1      },
666 {"movn.ps", "D,S,t",    0x54000238, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D,    0,              I1      },
667 {"movt",    "t,s,M",    0x5400097b, 0xfc001fff, WR_t|RD_s|RD_CC|FP_S|FP_D, 0,           I1      },
668 {"movt.d",  "T,S,M",    0x54000260, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D,   0,              I1      },
669 {"movt.s",  "T,S,M",    0x54000060, 0xfc001fff, WR_T|RD_S|RD_CC|FP_S,   0,              I1      },
670 {"movt.ps", "T,S,M",    0x54000460, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D,   0,              I1      },
671 {"movz",    "d,v,t",    0x00000058, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
672 {"movz.d",  "D,S,t",    0x54000178, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D,    0,              I1      },
673 {"movz.s",  "D,S,t",    0x54000078, 0xfc0007ff, WR_D|RD_S|RD_t|FP_S,    0,              I1      },
674 {"movz.ps", "D,S,t",    0x54000278, 0xfc0007ff, WR_D|RD_S|RD_t|FP_D,    0,              I1      },
675 {"msub",    "s,t",      0x0000eb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              I1      },
676 {"msub.d",  "D,R,S,T",  0x54000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
677 {"msub.s",  "D,R,S,T",  0x54000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I1      },
678 {"msub.ps", "D,R,S,T",  0x54000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
679 {"msubu",   "s,t",      0x0000fb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     0,              I1      },
680 {"mtc0",    "t,G",      0x000002fc, 0xfc00ffff, RD_t|WR_C0|WR_CC,       0,              I1      },
681 {"mtc0",    "t,+D",     0x000002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC,       0,              I1      },
682 {"mtc0",    "t,G,H",    0x000002fc, 0xfc00c7ff, RD_t|WR_C0|WR_CC,       0,              I1      },
683 {"mtc1",    "t,S",      0x5400283b, 0xfc00ffff, RD_t|WR_S|FP_S,         0,              I1      },
684 {"mtc1",    "t,G",      0x5400283b, 0xfc00ffff, RD_t|WR_S|FP_S,         0,              I1      },
685 {"mtc2",    "t,G",      0x00005d3c, 0xfc00ffff, RD_t|WR_C2|WR_CC,       0,              I1      },
686 {"mthc1",   "t,S",      0x5400383b, 0xfc00ffff, RD_t|WR_S|FP_D,         0,              I1      },
687 {"mthc1",   "t,G",      0x5400383b, 0xfc00ffff, RD_t|WR_S|FP_D,         0,              I1      },
688 {"mthc2",   "t,G",      0x00009d3c, 0xfc00ffff, RD_t|WR_C2|WR_CC,       0,              I1      },
689 {"mthi",    "s",        0x00002d7c, 0xffe0ffff, RD_s|WR_HI,             0,              I1      },
690 {"mtlo",    "s",        0x00003d7c, 0xffe0ffff, RD_s|WR_LO,             0,              I1      },
691 {"mul",     "d,v,t",    0x00000210, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0,              I1      },
692 {"mul",     "d,v,I",    0,    (int) M_MUL_I,    INSN_MACRO,             0,              I1      },
693 {"mul.d",   "D,V,T",    0x540001b0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
694 {"mul.s",   "D,V,T",    0x540000b0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
695 {"mul.ps",  "D,V,T",    0x540002b0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
696 {"mulo",    "d,v,t",    0,    (int) M_MULO,     INSN_MACRO,             0,              I1      },
697 {"mulo",    "d,v,I",    0,    (int) M_MULO_I,   INSN_MACRO,             0,              I1      },
698 {"mulou",   "d,v,t",    0,    (int) M_MULOU,    INSN_MACRO,             0,              I1      },
699 {"mulou",   "d,v,I",    0,    (int) M_MULOU_I,  INSN_MACRO,             0,              I1      },
700 {"mult",    "s,t",      0x00008b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
701 {"multu",   "s,t",      0x00009b3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
702 {"neg",     "d,w",      0x00000190, 0xfc1f07ff, WR_d|RD_t,              0,              I1      }, /* sub 0 */
703 {"negu",    "d,w",      0x000001d0, 0xfc1f07ff, WR_d|RD_t,              0,              I1      }, /* subu 0 */
704 {"neg.d",   "T,V",      0x54002b7b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
705 {"neg.s",   "T,V",      0x54000b7b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
706 {"neg.ps",  "T,V",      0x54004b7b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
707 {"nmadd.d", "D,R,S,T",  0x5400000a, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
708 {"nmadd.s", "D,R,S,T",  0x54000002, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I1      },
709 {"nmadd.ps", "D,R,S,T", 0x54000012, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
710 {"nmsub.d", "D,R,S,T",  0x5400002a, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
711 {"nmsub.s", "D,R,S,T",  0x54000022, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I1      },
712 {"nmsub.ps", "D,R,S,T", 0x54000032, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
713 /* nop is at the start of the table.  */
714 {"not",     "mf,mg",        0x4400,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      }, /* put not before nor */
715 {"not",     "d,v",      0x000002d0, 0xffe007ff, WR_d|RD_s|RD_t,         0,              I1      }, /* nor d,s,0 */
716 {"nor",     "mf,mz,mg",     0x4400,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      }, /* not */
717 {"nor",     "mf,mg,mz",     0x4400,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      }, /* not */
718 {"nor",     "d,v,t",    0x000002d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
719 {"nor",     "t,r,I",    0,    (int) M_NOR_I,    INSN_MACRO,             0,              I1      },
720 {"or",      "mp,mj,mz",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
721 {"or",      "mp,mz,mj",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
722 {"or",      "mf,mt,mg",     0x44c0,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
723 {"or",      "mf,mg,mx",     0x44c0,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
724 {"or",      "d,v,t",    0x00000290, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
725 {"or",      "t,r,I",    0,    (int) M_OR_I,     INSN_MACRO,             0,              I1      },
726 {"ori",     "mp,mj,mZ",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
727 {"ori",     "t,r,i",    0x50000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
728 {"pll.ps",  "D,V,T",    0x54000080, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
729 {"plu.ps",  "D,V,T",    0x540000c0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
730 {"pul.ps",  "D,V,T",    0x54000100, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
731 {"puu.ps",  "D,V,T",    0x54000140, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
732 /* pref is at the start of the table.  */
733 {"recip.d", "T,S",      0x5400523b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
734 {"recip.s", "T,S",      0x5400123b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
735 {"rem",     "z,s,t",    0x0000ab3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
736 {"rem",     "d,v,t",    0,    (int) M_REM_3,    INSN_MACRO,             0,              I1      },
737 {"rem",     "d,v,I",    0,    (int) M_REM_3I,   INSN_MACRO,             0,              I1      },
738 {"remu",    "z,s,t",    0x0000bb3c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      0,              I1      },
739 {"remu",    "d,v,t",    0,    (int) M_REMU_3,   INSN_MACRO,             0,              I1      },
740 {"remu",    "d,v,I",    0,    (int) M_REMU_3I,  INSN_MACRO,             0,              I1      },
741 {"rdhwr",   "t,K",      0x00006b3c, 0xfc00ffff, 0,                      WR_t,           I1      },
742 {"rdpgpr",  "t,r",      0x0000e17c, 0xfc00ffff, WR_t,                   0,              I1      },
743 {"rol",     "d,v,t",    0,    (int) M_ROL,      INSN_MACRO,             0,              I1      },
744 {"rol",     "d,v,I",    0,    (int) M_ROL_I,    INSN_MACRO,             0,              I1      },
745 {"ror",     "d,v,t",    0,    (int) M_ROR,      INSN_MACRO,             0,              I1      },
746 {"ror",     "d,v,I",    0,    (int) M_ROR_I,    INSN_MACRO,             0,              I1      },
747 {"ror",     "t,r,<",    0x000000c0, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
748 {"rorv",    "d,t,s",    0x000000d0, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              I1      },
749 {"rotl",    "d,v,t",    0,    (int) M_ROL,      INSN_MACRO,             0,              I1      },
750 {"rotl",    "d,v,I",    0,    (int) M_ROL_I,    INSN_MACRO,             0,              I1      },
751 {"rotr",    "d,v,t",    0,    (int) M_ROR,      INSN_MACRO,             0,              I1      },
752 {"rotr",    "t,r,<",    0x000000c0, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
753 {"rotrv",   "d,t,s",    0x000000d0, 0xfc0007ff, RD_t|RD_s|WR_d,         0,              I1      },
754 {"round.l.d", "T,S",    0x5400733b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
755 {"round.l.s", "T,S",    0x5400333b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
756 {"round.w.d", "T,S",    0x54007b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
757 {"round.w.s", "T,S",    0x54003b3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
758 {"rsqrt.d", "T,S",      0x5400423b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
759 {"rsqrt.s", "T,S",      0x5400023b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
760 {"sb",      "mq,mL(ml)",    0x8800,     0xfc00, SM,                     MOD_mq|MOD_ml,          I1      },
761 {"sb",      "t,o(b)",   0x18000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
762 {"sb",      "t,A(b)",   0,    (int) M_SB_AB,    INSN_MACRO,             0,              I1      },
763 {"sc",      "t,~(b)",   0x6000b000, 0xfc00f000, SM|RD_t|WR_t|RD_b,      0,              I1      },
764 {"sc",      "t,o(b)",   0,    (int) M_SC_OB,    INSN_MACRO,             0,              I1      },
765 {"sc",      "t,A(b)",   0,    (int) M_SC_AB,    INSN_MACRO,             0,              I1      },
766 {"scd",     "t,~(b)",   0x6000f000, 0xfc00f000, SM|RD_t|WR_t|RD_b,      0,              I3      },
767 {"scd",     "t,o(b)",   0,    (int) M_SCD_OB,   INSN_MACRO,             0,              I3      },
768 {"scd",     "t,A(b)",   0,    (int) M_SCD_AB,   INSN_MACRO,             0,              I3      },
769 /* The macro has to be first to handle o32 correctly.  */
770 {"sd",      "t,o(b)",   0,    (int) M_SD_OB,    INSN_MACRO,             0,              I1      },
771 {"sd",      "t,o(b)",   0xd8000000, 0xfc000000, SM|RD_t|RD_b,           0,              I3      },
772 {"sd",      "t,A(b)",   0,    (int) M_SD_AB,    INSN_MACRO,             0,              I1      },
773 {"sdbbp",   "",             0x46c0,     0xffff, TRAP,                   0,              I1      },
774 {"sdbbp",   "",         0x0000db7c, 0xffffffff, TRAP,                   0,              I1      },
775 {"sdbbp",   "mO",           0x46c0,     0xfff0, TRAP,                   0,              I1      },
776 {"sdbbp",   "B",        0x0000db7c, 0xfc00ffff, TRAP,                   0,              I1      },
777 {"sdc1",    "T,o(b)",   0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I1      },
778 {"sdc1",    "E,o(b)",   0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I1      },
779 {"sdc1",    "T,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I1      },
780 {"sdc1",    "E,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I1      },
781 {"sdc2",    "E,~(b)",   0x2000a000, 0xfc00f000, SM|RD_C2|RD_b,          0,              I1      },
782 {"sdc2",    "E,o(b)",   0,    (int) M_SDC2_OB,  INSN_MACRO,             0,              I1      },
783 {"sdc2",    "E,A(b)",   0,    (int) M_SDC2_AB,  INSN_MACRO,             0,              I1      },
784 {"s.d",     "T,o(b)",   0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I1      }, /* sdc1 */
785 {"s.d",     "T,A(b)",   0,    (int) M_SDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I1      },
786 {"sdl",     "t,~(b)",   0x6000c000, 0xfc00f000, SM|RD_t|RD_b,           0,              I3      },
787 {"sdl",     "t,o(b)",   0,    (int) M_SDL_OB,   INSN_MACRO,             0,              I3      },
788 {"sdl",     "t,A(b)",   0,    (int) M_SDL_AB,   INSN_MACRO,             0,              I3      },
789 {"sdm",     "n,~(b)",   0x2000f000, 0xfc00f000, SM|RD_b,                0,              I3      },
790 {"sdm",     "n,o(b)",   0,    (int) M_SDM_OB,   INSN_MACRO,             0,              I3      },
791 {"sdm",     "n,A(b)",   0,    (int) M_SDM_AB,   INSN_MACRO,             0,              I3      },
792 {"sdp",     "t,~(b)",   0x2000c000, 0xfc00f000, SM|RD_t|RD_b,           0,              I3      },
793 {"sdp",     "t,o(b)",   0,    (int) M_SDP_OB,   INSN_MACRO,             0,              I3      },
794 {"sdp",     "t,A(b)",   0,    (int) M_SDP_AB,   INSN_MACRO,             0,              I3      },
795 {"sdr",     "t,~(b)",   0x6000d000, 0xfc00f000, SM|RD_t|RD_b,           0,              I3      },
796 {"sdr",     "t,o(b)",   0,    (int) M_SDR_OB,   INSN_MACRO,             0,              I3      },
797 {"sdr",     "t,A(b)",   0,    (int) M_SDR_AB,   INSN_MACRO,             0,              I3      },
798 {"sdxc1",   "D,t(b)",   0x54000108, 0xfc0007ff, SM|RD_t|RD_b|FP_D,      RD_D,           I1      },
799 {"seb",     "t,r",      0x00002b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
800 {"seh",     "t,r",      0x00003b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
801 {"seq",     "d,v,t",    0,    (int) M_SEQ,      INSN_MACRO,             0,              I1      },
802 {"seq",     "d,v,I",    0,    (int) M_SEQ_I,    INSN_MACRO,             0,              I1      },
803 {"sge",     "d,v,t",    0,    (int) M_SGE,      INSN_MACRO,             0,              I1      },
804 {"sge",     "d,v,I",    0,    (int) M_SGE_I,    INSN_MACRO,             0,              I1      },
805 {"sgeu",    "d,v,t",    0,    (int) M_SGEU,     INSN_MACRO,             0,              I1      },
806 {"sgeu",    "d,v,I",    0,    (int) M_SGEU_I,   INSN_MACRO,             0,              I1      },
807 {"sgt",     "d,v,t",    0,    (int) M_SGT,      INSN_MACRO,             0,              I1      },
808 {"sgt",     "d,v,I",    0,    (int) M_SGT_I,    INSN_MACRO,             0,              I1      },
809 {"sgtu",    "d,v,t",    0,    (int) M_SGTU,     INSN_MACRO,             0,              I1      },
810 {"sgtu",    "d,v,I",    0,    (int) M_SGTU_I,   INSN_MACRO,             0,              I1      },
811 {"sh",      "mq,mH(ml)",    0xa800,     0xfc00, SM,                     MOD_mq|MOD_ml,  I1      },
812 {"sh",      "t,o(b)",   0x38000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
813 {"sh",      "t,A(b)",   0,    (int) M_SH_AB,    INSN_MACRO,             0,              I1      },
814 {"sle",     "d,v,t",    0,    (int) M_SLE,      INSN_MACRO,             0,              I1      },
815 {"sle",     "d,v,I",    0,    (int) M_SLE_I,    INSN_MACRO,             0,              I1      },
816 {"sleu",    "d,v,t",    0,    (int) M_SLEU,     INSN_MACRO,             0,              I1      },
817 {"sleu",    "d,v,I",    0,    (int) M_SLEU_I,   INSN_MACRO,             0,              I1      },
818 {"sllv",    "d,t,s",    0x00000010, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
819 {"sll",     "md,mc,mM",     0x2400,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      },
820 {"sll",     "d,w,s",    0x00000010, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      }, /* sllv */
821 {"sll",     "t,r,<",    0x00000000, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
822 {"slt",     "d,v,t",    0x00000350, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
823 {"slt",     "d,v,I",    0,    (int) M_SLT_I,    INSN_MACRO,             0,              I1      },
824 {"slti",    "t,r,j",    0x90000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
825 {"sltiu",   "t,r,j",    0xb0000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
826 {"sltu",    "d,v,t",    0x00000390, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
827 {"sltu",    "d,v,I",    0,    (int) M_SLTU_I,   INSN_MACRO,             0,              I1      },
828 {"sne",     "d,v,t",    0,    (int) M_SNE,      INSN_MACRO,             0,              I1      },
829 {"sne",     "d,v,I",    0,    (int) M_SNE_I,    INSN_MACRO,             0,              I1      },
830 {"sqrt.d",  "T,S",      0x54004a3b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
831 {"sqrt.s",  "T,S",      0x54000a3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
832 {"srav",    "d,t,s",    0x00000090, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      },
833 {"sra",     "d,w,s",    0x00000090, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* srav */
834 {"sra",     "t,r,<",    0x00000080, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
835 {"srlv",    "d,t,s",    0x00000050, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      },
836 {"srl",     "md,mc,mM",     0x2401,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      },
837 {"srl",     "d,w,s",    0x00000050, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* srlv */
838 {"srl",     "t,r,<",    0x00000040, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
839 /* ssnop is at the start of the table.  */
840 {"sub",     "d,v,t",    0x00000190, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
841 {"sub",     "d,v,I",    0,    (int) M_SUB_I,    INSN_MACRO,             0,              I1      },
842 {"sub.d",   "D,V,T",    0x54000170, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
843 {"sub.s",   "D,V,T",    0x54000070, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
844 {"sub.ps",  "D,V,T",    0x54000270, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
845 {"subu",    "md,me,ml",     0x0401,     0xfc01, 0,                      MOD_md|MOD_me|MOD_ml,   I1      },
846 {"subu",    "d,v,t",    0x000001d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
847 {"subu",    "d,v,I",    0,    (int) M_SUBU_I,   INSN_MACRO,             0,              I1      },
848 {"suxc1",   "D,t(b)",   0x54000188, 0xfc0007ff, SM|RD_t|RD_b|FP_D,      RD_D,           I1      },
849 {"sw",      "mq,mJ(ml)",    0xe800,     0xfc00, SM,                     MOD_mq|MOD_ml,  I1      },
850 {"sw",      "mp,mU(ms)",    0xc800,     0xfc00, SM,                     MOD_mp|MOD_sp,  I1      }, /* swsp */
851 {"sw",      "t,o(b)",   0xf8000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
852 {"sw",      "t,A(b)",   0,    (int) M_SW_AB,    INSN_MACRO,             0,              I1      },
853 {"swc1",    "T,o(b)",   0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
854 {"swc1",    "E,o(b)",   0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
855 {"swc1",    "T,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
856 {"swc1",    "E,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
857 {"swc2",    "E,~(b)",   0x20008000, 0xfc00f000, SM|RD_C2|RD_b,          0,              I1      },
858 {"swc2",    "E,o(b)",   0,    (int) M_SWC2_OB,  INSN_MACRO,             0,              I1      },
859 {"swc2",    "E,A(b)",   0,    (int) M_SWC2_AB,  INSN_MACRO,             0,              I1      },
860 {"s.s",     "T,o(b)",   0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      }, /* swc1 */
861 {"s.s",     "T,A(b)",   0,    (int) M_SWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
862 {"swl",     "t,~(b)",   0x60008000, 0xfc00f000, SM|RD_t|RD_b,           0,              I1      },
863 {"swl",     "t,o(b)",   0,    (int) M_SWL_OB,   INSN_MACRO,             0,              I1      },
864 {"swl",     "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,             0,              I1      },
865 {"scache",  "t,~(b)",   0x60008000, 0xfc00f000, SM|RD_t|RD_b,           0,              I1      }, /* same */
866 {"scache",  "t,o(b)",   0,    (int) M_SWL_OB,   INSN_MACRO,             0,              I1      },
867 {"scache",  "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,             0,              I1      },
868 {"swm",     "mN,mJ(ms)",    0x4540,     0xffc0, TRAP,                   MOD_sp,         I1      },
869 {"swm",     "n,~(b)",   0x2000d000, 0xfc00f000, SM|RD_b|TRAP,           0,              I1      },
870 {"swm",     "n,o(b)",   0,    (int) M_SWM_OB,   INSN_MACRO,             0,              I1      },
871 {"swm",     "n,A(b)",   0,    (int) M_SWM_AB,   INSN_MACRO,             0,              I1      },
872 {"swp",     "t,~(b)",   0x20009000, 0xfc00f000, SM|RD_t|RD_b|TRAP,      0,              I1      },
873 {"swp",     "t,o(b)",   0,    (int) M_SWP_OB,   INSN_MACRO,             0,              I1      },
874 {"swp",     "t,A(b)",   0,    (int) M_SWP_AB,   INSN_MACRO,             0,              I1      },
875 {"swr",     "t,~(b)",   0x60009000, 0xfc00f000, SM|RD_b|RD_t,           0,              I1      },
876 {"swr",     "t,o(b)",   0,    (int) M_SWR_OB,   INSN_MACRO,             0,              I1      },
877 {"swr",     "t,A(b)",   0,    (int) M_SWR_AB,   INSN_MACRO,             0,              I1      },
878 {"invalidate", "t,~(b)",0x60009000, 0xfc00f000, SM|RD_b|RD_t,           0,              I1      }, /* same */
879 {"invalidate", "t,o(b)",0,    (int) M_SWR_OB,   INSN_MACRO,             0,              I1      },
880 {"invalidate", "t,A(b)",0,    (int) M_SWR_AB,   INSN_MACRO,             0,              I1      },
881 {"swxc1",   "D,t(b)",   0x54000048, 0xfc0007ff, SM|RD_t|RD_b|FP_S,      RD_D,           I1      },
882 {"sync_acquire", "",    0x00116b7c, 0xffffffff, INSN_SYNC,              0,              I1      },
883 {"sync_mb", "",         0x00106b7c, 0xffffffff, INSN_SYNC,              0,              I1      },
884 {"sync_release", "",    0x00126b7c, 0xffffffff, INSN_SYNC,              0,              I1      },
885 {"sync_rmb", "",        0x00136b7c, 0xffffffff, INSN_SYNC,              0,              I1      },
886 {"sync_wmb", "",        0x00046b7c, 0xffffffff, INSN_SYNC,              0,              I1      },
887 {"sync",    "",         0x00006b7c, 0xffffffff, INSN_SYNC,              0,              I1      },
888 {"sync",    "1",        0x00006b7c, 0xffe0ffff, INSN_SYNC,              0,              I1      },
889 {"synci",   "o(b)",     0x42000000, 0xffe00000, SM|RD_b,                0,              I1      },
890 {"syscall", "",         0x00008b7c, 0xffffffff, TRAP,                   0,              I1      },
891 {"syscall", "B",        0x00008b7c, 0xfc00ffff, TRAP,                   0,              I1      },
892 {"teqi",    "s,j",      0x41c00000, 0xffe00000, RD_s|TRAP,              0,              I1      },
893 {"teq",     "s,t",      0x0000003c, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I1      },
894 {"teq",     "s,t,|",    0x0000003c, 0xfc000fff, RD_s|RD_t|TRAP,         0,              I1      },
895 {"teq",     "s,j",      0x41c00000, 0xffe00000, RD_s|TRAP,              0,              I1      }, /* teqi */
896 {"teq",     "s,I",      0,    (int) M_TEQ_I,    INSN_MACRO,             0,              I1      },
897 {"tgei",    "s,j",      0x41200000, 0xffe00000, RD_s|TRAP,              0,              I1      },
898 {"tge",     "s,t",      0x0000023c, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I1      },
899 {"tge",     "s,t,|",    0x0000023c, 0xfc000fff, RD_s|RD_t|TRAP,         0,              I1      },
900 {"tge",     "s,j",      0x41200000, 0xffe00000, RD_s|TRAP,              0,              I1      }, /* tgei */
901 {"tge",     "s,I",      0,    (int) M_TGE_I,    INSN_MACRO,             0,              I1      },
902 {"tgeiu",   "s,j",      0x41600000, 0xffe00000, RD_s|TRAP,              0,              I1      },
903 {"tgeu",    "s,t",      0x0000043c, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I1      },
904 {"tgeu",    "s,t,|",    0x0000043c, 0xfc000fff, RD_s|RD_t|TRAP,         0,              I1      },
905 {"tgeu",    "s,j",      0x41600000, 0xffe00000, RD_s|TRAP,              0,              I1      }, /* tgeiu */
906 {"tgeu",    "s,I",      0,    (int) M_TGEU_I,   INSN_MACRO,             0,              I1      },
907 {"tlbp",    "",         0x0000037c, 0xffffffff, INSN_TLB,               0,              I1      },
908 {"tlbr",    "",         0x0000137c, 0xffffffff, INSN_TLB,               0,              I1      },
909 {"tlbwi",   "",         0x0000237c, 0xffffffff, INSN_TLB,               0,              I1      },
910 {"tlbwr",   "",         0x0000337c, 0xffffffff, INSN_TLB,               0,              I1      },
911 {"tlti",    "s,j",      0x41000000, 0xffe00000, RD_s|TRAP,              0,              I1      },
912 {"tlt",     "s,t",      0x0000083c, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I1      },
913 {"tlt",     "s,t,|",    0x0000083c, 0xfc000fff, RD_s|RD_t|TRAP,         0,              I1      },
914 {"tlt",     "s,j",      0x41000000, 0xffe00000, RD_s|TRAP,              0,              I1      }, /* tlti */
915 {"tlt",     "s,I",      0,    (int) M_TLT_I,    INSN_MACRO,             0,              I1      },
916 {"tltiu",   "s,j",      0x41400000, 0xffe00000, RD_s|TRAP,              0,              I1      },
917 {"tltu",    "s,t",      0x00000a3c, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I1      },
918 {"tltu",    "s,t,|",    0x00000a3c, 0xfc000fff, RD_s|RD_t|TRAP,         0,              I1      },
919 {"tltu",    "s,j",      0x41400000, 0xffe00000, RD_s|TRAP,              0,              I1      }, /* tltiu */
920 {"tltu",    "s,I",      0,    (int) M_TLTU_I,   INSN_MACRO,             0,              I1      },
921 {"tnei",    "s,j",      0x41800000, 0xffe00000, RD_s|TRAP,              0,              I1      },
922 {"tne",     "s,t",      0x00000c3c, 0xfc00ffff, RD_s|RD_t|TRAP,         0,              I1      },
923 {"tne",     "s,t,|",    0x00000c3c, 0xfc000fff, RD_s|RD_t|TRAP,         0,              I1      },
924 {"tne",     "s,j",      0x41800000, 0xffe00000, RD_s|TRAP,              0,              I1      }, /* tnei */
925 {"tne",     "s,I",      0,    (int) M_TNE_I,    INSN_MACRO,             0,              I1      },
926 {"trunc.l.d", "T,S",    0x5400633b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
927 {"trunc.l.s", "T,S",    0x5400233b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
928 {"trunc.w.d", "T,S",    0x54006b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
929 {"trunc.w.s", "T,S",    0x54002b3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
930 {"uld",     "t,o(b)",   0,    (int) M_ULD,      INSN_MACRO,             0,              I3      },
931 {"uld",     "t,A(b)",   0,    (int) M_ULD_A,    INSN_MACRO,             0,              I3      },
932 {"ulh",     "t,o(b)",   0,    (int) M_ULH,      INSN_MACRO,             0,              I1      },
933 {"ulh",     "t,A(b)",   0,    (int) M_ULH_A,    INSN_MACRO,             0,              I1      },
934 {"ulhu",    "t,o(b)",   0,    (int) M_ULHU,     INSN_MACRO,             0,              I1      },
935 {"ulhu",    "t,A(b)",   0,    (int) M_ULHU_A,   INSN_MACRO,             0,              I1      },
936 {"ulw",     "t,o(b)",   0,    (int) M_ULW,      INSN_MACRO,             0,              I1      },
937 {"ulw",     "t,A(b)",   0,    (int) M_ULW_A,    INSN_MACRO,             0,              I1      },
938 {"usd",     "t,o(b)",   0,    (int) M_USD,      INSN_MACRO,             0,              I1      },
939 {"usd",     "t,A(b)",   0,    (int) M_USD_A,    INSN_MACRO,             0,              I1      },
940 {"ush",     "t,o(b)",   0,    (int) M_USH,      INSN_MACRO,             0,              I1      },
941 {"ush",     "t,A(b)",   0,    (int) M_USH_A,    INSN_MACRO,             0,              I1      },
942 {"usw",     "t,o(b)",   0,    (int) M_USW,      INSN_MACRO,             0,              I1      },
943 {"usw",     "t,A(b)",   0,    (int) M_USW_A,    INSN_MACRO,             0,              I1      },
944 {"wait",    "",         0x0000937c, 0xffffffff, TRAP,                   0,              I1      },
945 {"wait",    "B",        0x0000937c, 0xfc00ffff, TRAP,                   0,              I1      },
946 {"wrpgpr",  "t,r",      0x0000f17c, 0xfc00ffff, RD_s,                   0,              I1      },
947 {"wsbh",    "t,r",      0x00007b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
948 {"xor",     "mf,mt,mg",     0x4440,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
949 {"xor",     "mf,mg,mx",     0x4440,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
950 {"xor",     "d,v,t",    0x00000310, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
951 {"xor",     "t,r,I",    0,    (int) M_XOR_I,    INSN_MACRO,             0,              I1      },
952 {"xori",    "t,r,i",    0x70000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
953 };
954
955 const int bfd_micromips_num_opcodes =
956   ((sizeof micromips_opcodes) / (sizeof (micromips_opcodes[0])));