1 /* Instruction opcode table for mep.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
31 #include "libiberty.h"
36 /* A mask for all ISAs executed by the core. */
37 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask = {0, 0};
40 init_mep_all_core_isas_mask (void)
42 if (mep_all_core_isas_mask.length != 0)
44 cgen_bitset_init (& mep_all_core_isas_mask, ISA_MAX);
45 cgen_bitset_set (& mep_all_core_isas_mask, ISA_MEP);
46 /* begin-all-core-isas */
47 cgen_bitset_add (& mep_all_core_isas_mask, ISA_EXT_CORE1);
48 /* end-all-core-isas */
51 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask = {0, 0};
54 init_mep_all_cop_isas_mask (void)
56 if (mep_all_cop_isas_mask.length != 0)
58 cgen_bitset_init (& mep_all_cop_isas_mask, ISA_MAX);
59 /* begin-all-cop-isas */
60 /* end-all-cop-isas */
64 mep_insn_supported_by_isa (const CGEN_INSN *insn, CGEN_ATTR_VALUE_BITSET_TYPE *isa_mask)
66 CGEN_BITSET insn_isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
67 return cgen_bitset_intersect_p (& insn_isas, isa_mask);
71 ( (1 << CGEN_INSN_OPTIONAL_BIT_INSN) \
72 | (1 << CGEN_INSN_OPTIONAL_MUL_INSN) \
73 | (1 << CGEN_INSN_OPTIONAL_DIV_INSN) \
74 | (1 << CGEN_INSN_OPTIONAL_DEBUG_INSN) \
75 | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN) \
76 | (1 << CGEN_INSN_OPTIONAL_ABS_INSN) \
77 | (1 << CGEN_INSN_OPTIONAL_AVE_INSN) \
78 | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN) \
79 | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN) \
80 | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) \
81 | (1 << CGEN_INSN_OPTIONAL_UCI_INSN) \
82 | (1 << CGEN_INSN_OPTIONAL_DSP_INSN) \
83 | (1 << CGEN_INSN_OPTIONAL_CP_INSN) \
84 | (1 << CGEN_INSN_OPTIONAL_CP64_INSN) )
87 mep_config_map_struct mep_config_map[] =
89 /* config-map-start */
90 /* Default entry: mep core only, all options enabled. */
91 { "", 0, EF_MEP_CPU_C4, 1, 0, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x80"}, OPTION_MASK },
92 { "default", CONFIG_DEFAULT, EF_MEP_CPU_C4, 0, 0, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\xc0" },
94 | (1 << CGEN_INSN_OPTIONAL_MUL_INSN)
95 | (1 << CGEN_INSN_OPTIONAL_DIV_INSN)
96 | (1 << CGEN_INSN_OPTIONAL_BIT_INSN)
97 | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN)
98 | (1 << CGEN_INSN_OPTIONAL_ABS_INSN)
99 | (1 << CGEN_INSN_OPTIONAL_AVE_INSN)
100 | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN)
101 | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN)
102 | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) },
104 { 0, 0, 0, 0, 0, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, 0 }
107 int mep_config_index = 0;
110 check_configured_mach (int machs)
112 /* All base insns are supported. */
113 int mach = 1 << MACH_BASE;
118 mach |= (1 << MACH_MEP);
121 mach |= (1 << MACH_H1);
130 mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
132 int iconfig = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_CONFIG);
133 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
134 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
139 /* If the insn has an option bit set that we don't want,
141 if (CGEN_INSN_ATTRS (insn)->bool & OPTION_MASK & ~MEP_OMASK)
144 /* If attributes are absent, assume no restriction. */
148 ok1 = ((machs & cd->machs) && cgen_bitset_intersect_p (& isas, cd->isas));
149 /* If the insn is config-specific, make sure it matches. */
150 ok2 = (iconfig == 0 || iconfig == MEP_CONFIG);
151 /* Make sure the insn is supported by the configured mach */
152 ok3 = check_configured_mach (machs);
154 return (ok1 && ok2 && ok3);
156 /* The hash functions are recorded here to help keep assembler code out of
157 the disassembler and vice versa. */
159 static int asm_hash_insn_p (const CGEN_INSN *);
160 static unsigned int asm_hash_insn (const char *);
161 static int dis_hash_insn_p (const CGEN_INSN *);
162 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
164 /* Instruction formats. */
166 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
167 #define F(f) & mep_cgen_ifld_table[MEP_##f]
169 #define F(f) & mep_cgen_ifld_table[MEP_/**/f]
171 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
175 static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED = {
176 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
179 static const CGEN_IFMT ifmt_sh ATTRIBUTE_UNUSED = {
180 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
183 static const CGEN_IFMT ifmt_sw ATTRIBUTE_UNUSED = {
184 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
187 static const CGEN_IFMT ifmt_lbu ATTRIBUTE_UNUSED = {
188 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
191 static const CGEN_IFMT ifmt_lhu ATTRIBUTE_UNUSED = {
192 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
195 static const CGEN_IFMT ifmt_sw_sp ATTRIBUTE_UNUSED = {
196 16, 16, 0xf083, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
199 static const CGEN_IFMT ifmt_sb_tp ATTRIBUTE_UNUSED = {
200 16, 16, 0xf880, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9) }, { 0 } }
203 static const CGEN_IFMT ifmt_sh_tp ATTRIBUTE_UNUSED = {
204 16, 16, 0xf881, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A2) }, { F (F_15) }, { 0 } }
207 static const CGEN_IFMT ifmt_sw_tp ATTRIBUTE_UNUSED = {
208 16, 16, 0xf883, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
211 static const CGEN_IFMT ifmt_lbu_tp ATTRIBUTE_UNUSED = {
212 16, 16, 0xf880, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9) }, { 0 } }
215 static const CGEN_IFMT ifmt_lhu_tp ATTRIBUTE_UNUSED = {
216 16, 16, 0xf881, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A2) }, { F (F_15) }, { 0 } }
219 static const CGEN_IFMT ifmt_sb16 ATTRIBUTE_UNUSED = {
220 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
223 static const CGEN_IFMT ifmt_sh16 ATTRIBUTE_UNUSED = {
224 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
227 static const CGEN_IFMT ifmt_sw16 ATTRIBUTE_UNUSED = {
228 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
231 static const CGEN_IFMT ifmt_lbu16 ATTRIBUTE_UNUSED = {
232 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
235 static const CGEN_IFMT ifmt_lhu16 ATTRIBUTE_UNUSED = {
236 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
239 static const CGEN_IFMT ifmt_sw24 ATTRIBUTE_UNUSED = {
240 32, 32, 0xf0030000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_24U8A4N) }, { F (F_SUB2) }, { 0 } }
243 static const CGEN_IFMT ifmt_extb ATTRIBUTE_UNUSED = {
244 16, 16, 0xf0ff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
247 static const CGEN_IFMT ifmt_ssarb ATTRIBUTE_UNUSED = {
248 16, 16, 0xfc0f, { { F (F_MAJOR) }, { F (F_4) }, { F (F_5) }, { F (F_2U6) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
251 static const CGEN_IFMT ifmt_mov ATTRIBUTE_UNUSED = {
252 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
255 static const CGEN_IFMT ifmt_movi8 ATTRIBUTE_UNUSED = {
256 16, 16, 0xf000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8S8) }, { 0 } }
259 static const CGEN_IFMT ifmt_movi16 ATTRIBUTE_UNUSED = {
260 32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
263 static const CGEN_IFMT ifmt_movu24 ATTRIBUTE_UNUSED = {
264 32, 32, 0xf8000000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_24U8N) }, { 0 } }
267 static const CGEN_IFMT ifmt_movu16 ATTRIBUTE_UNUSED = {
268 32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
271 static const CGEN_IFMT ifmt_add3 ATTRIBUTE_UNUSED = {
272 16, 16, 0xf000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_RL) }, { 0 } }
275 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
276 16, 16, 0xf003, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_6S8) }, { F (F_SUB2) }, { 0 } }
279 static const CGEN_IFMT ifmt_add3i ATTRIBUTE_UNUSED = {
280 16, 16, 0xf083, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
283 static const CGEN_IFMT ifmt_slt3i ATTRIBUTE_UNUSED = {
284 16, 16, 0xf007, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_5U8) }, { F (F_SUB3) }, { 0 } }
287 static const CGEN_IFMT ifmt_add3x ATTRIBUTE_UNUSED = {
288 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
291 static const CGEN_IFMT ifmt_sltu3x ATTRIBUTE_UNUSED = {
292 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
295 static const CGEN_IFMT ifmt_bra ATTRIBUTE_UNUSED = {
296 16, 16, 0xf001, { { F (F_MAJOR) }, { F (F_12S4A2) }, { F (F_15) }, { 0 } }
299 static const CGEN_IFMT ifmt_beqz ATTRIBUTE_UNUSED = {
300 16, 16, 0xf001, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8S8A2) }, { F (F_15) }, { 0 } }
303 static const CGEN_IFMT ifmt_beqi ATTRIBUTE_UNUSED = {
304 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_4U8) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
307 static const CGEN_IFMT ifmt_beq ATTRIBUTE_UNUSED = {
308 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
311 static const CGEN_IFMT ifmt_bsr24 ATTRIBUTE_UNUSED = {
312 32, 32, 0xf80f0000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_24S5A2N) }, { F (F_SUB4) }, { 0 } }
315 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
316 16, 16, 0xff0f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
319 static const CGEN_IFMT ifmt_jmp24 ATTRIBUTE_UNUSED = {
320 32, 32, 0xf80f0000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_24U5A2N) }, { F (F_SUB4) }, { 0 } }
323 static const CGEN_IFMT ifmt_ret ATTRIBUTE_UNUSED = {
324 16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
327 static const CGEN_IFMT ifmt_repeat ATTRIBUTE_UNUSED = {
328 32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
331 static const CGEN_IFMT ifmt_erepeat ATTRIBUTE_UNUSED = {
332 32, 32, 0xffff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
335 static const CGEN_IFMT ifmt_stc_lp ATTRIBUTE_UNUSED = {
336 16, 16, 0xf0ff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_CSRN_LO) }, { F (F_12) }, { F (F_13) }, { F (F_14) }, { F (F_CSRN_HI) }, { 0 } }
339 static const CGEN_IFMT ifmt_stc ATTRIBUTE_UNUSED = {
340 16, 16, 0xf00e, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_CSRN) }, { F (F_12) }, { F (F_13) }, { F (F_14) }, { 0 } }
343 static const CGEN_IFMT ifmt_swi ATTRIBUTE_UNUSED = {
344 16, 16, 0xffcf, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_9) }, { F (F_2U10) }, { F (F_SUB4) }, { 0 } }
347 static const CGEN_IFMT ifmt_bsetm ATTRIBUTE_UNUSED = {
348 16, 16, 0xf80f, { { F (F_MAJOR) }, { F (F_4) }, { F (F_3U5) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
351 static const CGEN_IFMT ifmt_tas ATTRIBUTE_UNUSED = {
352 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
355 static const CGEN_IFMT ifmt_cache ATTRIBUTE_UNUSED = {
356 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
359 static const CGEN_IFMT ifmt_madd ATTRIBUTE_UNUSED = {
360 32, 32, 0xf00fffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
363 static const CGEN_IFMT ifmt_clip ATTRIBUTE_UNUSED = {
364 32, 32, 0xf0ffff07, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_5U24) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
367 static const CGEN_IFMT ifmt_swcp ATTRIBUTE_UNUSED = {
368 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
371 static const CGEN_IFMT ifmt_smcp ATTRIBUTE_UNUSED = {
372 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
375 static const CGEN_IFMT ifmt_swcp16 ATTRIBUTE_UNUSED = {
376 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
379 static const CGEN_IFMT ifmt_smcp16 ATTRIBUTE_UNUSED = {
380 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
383 static const CGEN_IFMT ifmt_sbcpa ATTRIBUTE_UNUSED = {
384 32, 32, 0xf00fff00, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24) }, { 0 } }
387 static const CGEN_IFMT ifmt_shcpa ATTRIBUTE_UNUSED = {
388 32, 32, 0xf00fff01, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A2) }, { F (F_31) }, { 0 } }
391 static const CGEN_IFMT ifmt_swcpa ATTRIBUTE_UNUSED = {
392 32, 32, 0xf00fff03, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A4) }, { F (F_30) }, { F (F_31) }, { 0 } }
395 static const CGEN_IFMT ifmt_smcpa ATTRIBUTE_UNUSED = {
396 32, 32, 0xf00fff07, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A8) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
399 static const CGEN_IFMT ifmt_bcpeq ATTRIBUTE_UNUSED = {
400 32, 32, 0xff0f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
403 static const CGEN_IFMT ifmt_sim_syscall ATTRIBUTE_UNUSED = {
404 16, 16, 0xf8ef, { { F (F_MAJOR) }, { F (F_4) }, { F (F_CALLNUM) }, { F (F_8) }, { F (F_9) }, { F (F_10) }, { F (F_SUB4) }, { 0 } }
409 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
410 #define A(a) (1 << CGEN_INSN_##a)
412 #define A(a) (1 << CGEN_INSN_/**/a)
414 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
415 #define OPERAND(op) MEP_OPERAND_##op
417 #define OPERAND(op) MEP_OPERAND_/**/op
419 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
420 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
422 /* The instruction table. */
424 static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] =
426 /* Special null first entry.
427 A `num' value of zero is thus invalid.
428 Also, the special `invalid' insn resides here. */
429 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
433 { { MNEM, ' ', OP (RNC), ',', '(', OP (RMA), ')', 0 } },
439 { { MNEM, ' ', OP (RNS), ',', '(', OP (RMA), ')', 0 } },
445 { { MNEM, ' ', OP (RNL), ',', '(', OP (RMA), ')', 0 } },
451 { { MNEM, ' ', OP (RNC), ',', '(', OP (RMA), ')', 0 } },
457 { { MNEM, ' ', OP (RNS), ',', '(', OP (RMA), ')', 0 } },
463 { { MNEM, ' ', OP (RNL), ',', '(', OP (RMA), ')', 0 } },
466 /* lbu $rnuc,($rma) */
469 { { MNEM, ' ', OP (RNUC), ',', '(', OP (RMA), ')', 0 } },
472 /* lhu $rnus,($rma) */
475 { { MNEM, ' ', OP (RNUS), ',', '(', OP (RMA), ')', 0 } },
478 /* sw $rnl,$udisp7a4($spr) */
481 { { MNEM, ' ', OP (RNL), ',', OP (UDISP7A4), '(', OP (SPR), ')', 0 } },
482 & ifmt_sw_sp, { 0x4002 }
484 /* lw $rnl,$udisp7a4($spr) */
487 { { MNEM, ' ', OP (RNL), ',', OP (UDISP7A4), '(', OP (SPR), ')', 0 } },
488 & ifmt_sw_sp, { 0x4003 }
490 /* sb $rn3c,$udisp7($tpr) */
493 { { MNEM, ' ', OP (RN3C), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
494 & ifmt_sb_tp, { 0x8000 }
496 /* sh $rn3s,$udisp7a2($tpr) */
499 { { MNEM, ' ', OP (RN3S), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
500 & ifmt_sh_tp, { 0x8080 }
502 /* sw $rn3l,$udisp7a4($tpr) */
505 { { MNEM, ' ', OP (RN3L), ',', OP (UDISP7A4), '(', OP (TPR), ')', 0 } },
506 & ifmt_sw_tp, { 0x4082 }
508 /* lb $rn3c,$udisp7($tpr) */
511 { { MNEM, ' ', OP (RN3C), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
512 & ifmt_sb_tp, { 0x8800 }
514 /* lh $rn3s,$udisp7a2($tpr) */
517 { { MNEM, ' ', OP (RN3S), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
518 & ifmt_sh_tp, { 0x8880 }
520 /* lw $rn3l,$udisp7a4($tpr) */
523 { { MNEM, ' ', OP (RN3L), ',', OP (UDISP7A4), '(', OP (TPR), ')', 0 } },
524 & ifmt_sw_tp, { 0x4083 }
526 /* lbu $rn3uc,$udisp7($tpr) */
529 { { MNEM, ' ', OP (RN3UC), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
530 & ifmt_lbu_tp, { 0x4880 }
532 /* lhu $rn3us,$udisp7a2($tpr) */
535 { { MNEM, ' ', OP (RN3US), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
536 & ifmt_lhu_tp, { 0x8881 }
538 /* sb $rnc,$sdisp16($rma) */
541 { { MNEM, ' ', OP (RNC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
542 & ifmt_sb16, { 0xc0080000 }
544 /* sh $rns,$sdisp16($rma) */
547 { { MNEM, ' ', OP (RNS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
548 & ifmt_sh16, { 0xc0090000 }
550 /* sw $rnl,$sdisp16($rma) */
553 { { MNEM, ' ', OP (RNL), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
554 & ifmt_sw16, { 0xc00a0000 }
556 /* lb $rnc,$sdisp16($rma) */
559 { { MNEM, ' ', OP (RNC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
560 & ifmt_sb16, { 0xc00c0000 }
562 /* lh $rns,$sdisp16($rma) */
565 { { MNEM, ' ', OP (RNS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
566 & ifmt_sh16, { 0xc00d0000 }
568 /* lw $rnl,$sdisp16($rma) */
571 { { MNEM, ' ', OP (RNL), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
572 & ifmt_sw16, { 0xc00e0000 }
574 /* lbu $rnuc,$sdisp16($rma) */
577 { { MNEM, ' ', OP (RNUC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
578 & ifmt_lbu16, { 0xc00b0000 }
580 /* lhu $rnus,$sdisp16($rma) */
583 { { MNEM, ' ', OP (RNUS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
584 & ifmt_lhu16, { 0xc00f0000 }
586 /* sw $rnl,($addr24a4) */
589 { { MNEM, ' ', OP (RNL), ',', '(', OP (ADDR24A4), ')', 0 } },
590 & ifmt_sw24, { 0xe0020000 }
592 /* lw $rnl,($addr24a4) */
595 { { MNEM, ' ', OP (RNL), ',', '(', OP (ADDR24A4), ')', 0 } },
596 & ifmt_sw24, { 0xe0030000 }
601 { { MNEM, ' ', OP (RN), 0 } },
602 & ifmt_extb, { 0x100d }
607 { { MNEM, ' ', OP (RN), 0 } },
608 & ifmt_extb, { 0x102d }
613 { { MNEM, ' ', OP (RN), 0 } },
614 & ifmt_extb, { 0x108d }
619 { { MNEM, ' ', OP (RN), 0 } },
620 & ifmt_extb, { 0x10ad }
622 /* ssarb $udisp2($rm) */
625 { { MNEM, ' ', OP (UDISP2), '(', OP (RM), ')', 0 } },
626 & ifmt_ssarb, { 0x100c }
631 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
637 { { MNEM, ' ', OP (RN), ',', OP (SIMM8), 0 } },
638 & ifmt_movi8, { 0x5000 }
640 /* mov $rn,$simm16 */
643 { { MNEM, ' ', OP (RN), ',', OP (SIMM16), 0 } },
644 & ifmt_movi16, { 0xc0010000 }
646 /* movu $rn3,$uimm24 */
649 { { MNEM, ' ', OP (RN3), ',', OP (UIMM24), 0 } },
650 & ifmt_movu24, { 0xd0000000 }
652 /* movu $rn,$uimm16 */
655 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
656 & ifmt_movu16, { 0xc0110000 }
658 /* movh $rn,$uimm16 */
661 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
662 & ifmt_movu16, { 0xc0210000 }
664 /* add3 $rl,$rn,$rm */
667 { { MNEM, ' ', OP (RL), ',', OP (RN), ',', OP (RM), 0 } },
668 & ifmt_add3, { 0x9000 }
673 { { MNEM, ' ', OP (RN), ',', OP (SIMM6), 0 } },
674 & ifmt_add, { 0x6000 }
676 /* add3 $rn,$spr,$uimm7a4 */
679 { { MNEM, ' ', OP (RN), ',', OP (SPR), ',', OP (UIMM7A4), 0 } },
680 & ifmt_add3i, { 0x4000 }
682 /* advck3 \$0,$rn,$rm */
685 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
691 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
694 /* sbvck3 \$0,$rn,$rm */
697 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
703 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
706 /* slt3 \$0,$rn,$rm */
709 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
712 /* sltu3 \$0,$rn,$rm */
715 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
718 /* slt3 \$0,$rn,$uimm5 */
721 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
722 & ifmt_slt3i, { 0x6001 }
724 /* sltu3 \$0,$rn,$uimm5 */
727 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
728 & ifmt_slt3i, { 0x6005 }
730 /* sl1ad3 \$0,$rn,$rm */
733 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
734 & ifmt_mov, { 0x2006 }
736 /* sl2ad3 \$0,$rn,$rm */
739 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
740 & ifmt_mov, { 0x2007 }
742 /* add3 $rn,$rm,$simm16 */
745 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (SIMM16), 0 } },
746 & ifmt_add3x, { 0xc0000000 }
748 /* slt3 $rn,$rm,$simm16 */
751 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (SIMM16), 0 } },
752 & ifmt_add3x, { 0xc0020000 }
754 /* sltu3 $rn,$rm,$uimm16 */
757 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
758 & ifmt_sltu3x, { 0xc0030000 }
763 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
764 & ifmt_mov, { 0x1000 }
769 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
770 & ifmt_mov, { 0x1001 }
775 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
776 & ifmt_mov, { 0x1002 }
781 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
782 & ifmt_mov, { 0x1003 }
784 /* or3 $rn,$rm,$uimm16 */
787 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
788 & ifmt_sltu3x, { 0xc0040000 }
790 /* and3 $rn,$rm,$uimm16 */
793 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
794 & ifmt_sltu3x, { 0xc0050000 }
796 /* xor3 $rn,$rm,$uimm16 */
799 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
800 & ifmt_sltu3x, { 0xc0060000 }
805 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
806 & ifmt_mov, { 0x200d }
811 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
812 & ifmt_mov, { 0x200c }
817 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
818 & ifmt_mov, { 0x200e }
823 { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
824 & ifmt_slt3i, { 0x6003 }
829 { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
830 & ifmt_slt3i, { 0x6002 }
835 { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
836 & ifmt_slt3i, { 0x6006 }
838 /* sll3 \$0,$rn,$uimm5 */
841 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
842 & ifmt_slt3i, { 0x6007 }
847 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
848 & ifmt_mov, { 0x200f }
853 { { MNEM, ' ', OP (PCREL12A2), 0 } },
854 & ifmt_bra, { 0xb000 }
856 /* beqz $rn,$pcrel8a2 */
859 { { MNEM, ' ', OP (RN), ',', OP (PCREL8A2), 0 } },
860 & ifmt_beqz, { 0xa000 }
862 /* bnez $rn,$pcrel8a2 */
865 { { MNEM, ' ', OP (RN), ',', OP (PCREL8A2), 0 } },
866 & ifmt_beqz, { 0xa001 }
868 /* beqi $rn,$uimm4,$pcrel17a2 */
871 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
872 & ifmt_beqi, { 0xe0000000 }
874 /* bnei $rn,$uimm4,$pcrel17a2 */
877 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
878 & ifmt_beqi, { 0xe0040000 }
880 /* blti $rn,$uimm4,$pcrel17a2 */
883 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
884 & ifmt_beqi, { 0xe00c0000 }
886 /* bgei $rn,$uimm4,$pcrel17a2 */
889 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
890 & ifmt_beqi, { 0xe0080000 }
892 /* beq $rn,$rm,$pcrel17a2 */
895 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (PCREL17A2), 0 } },
896 & ifmt_beq, { 0xe0010000 }
898 /* bne $rn,$rm,$pcrel17a2 */
901 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (PCREL17A2), 0 } },
902 & ifmt_beq, { 0xe0050000 }
907 { { MNEM, ' ', OP (PCREL12A2), 0 } },
908 & ifmt_bra, { 0xb001 }
913 { { MNEM, ' ', OP (PCREL24A2), 0 } },
914 & ifmt_bsr24, { 0xd8090000 }
919 { { MNEM, ' ', OP (RM), 0 } },
920 & ifmt_jmp, { 0x100e }
925 { { MNEM, ' ', OP (PCABS24A2), 0 } },
926 & ifmt_jmp24, { 0xd8080000 }
931 { { MNEM, ' ', OP (RM), 0 } },
932 & ifmt_jmp, { 0x100f }
938 & ifmt_ret, { 0x7002 }
940 /* repeat $rn,$pcrel17a2 */
943 { { MNEM, ' ', OP (RN), ',', OP (PCREL17A2), 0 } },
944 & ifmt_repeat, { 0xe0090000 }
946 /* erepeat $pcrel17a2 */
949 { { MNEM, ' ', OP (PCREL17A2), 0 } },
950 & ifmt_erepeat, { 0xe0190000 }
955 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'p', 0 } },
956 & ifmt_stc_lp, { 0x7018 }
961 { { MNEM, ' ', OP (RN), ',', '$', 'h', 'i', 0 } },
962 & ifmt_stc_lp, { 0x7078 }
967 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'o', 0 } },
968 & ifmt_stc_lp, { 0x7088 }
973 { { MNEM, ' ', OP (RN), ',', OP (CSRN), 0 } },
974 & ifmt_stc, { 0x7008 }
979 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'p', 0 } },
980 & ifmt_stc_lp, { 0x701a }
985 { { MNEM, ' ', OP (RN), ',', '$', 'h', 'i', 0 } },
986 & ifmt_stc_lp, { 0x707a }
991 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'o', 0 } },
992 & ifmt_stc_lp, { 0x708a }
997 { { MNEM, ' ', OP (RN), ',', OP (CSRN), 0 } },
998 & ifmt_stc, { 0x700a }
1004 & ifmt_ret, { 0x7000 }
1010 & ifmt_ret, { 0x7010 }
1016 & ifmt_ret, { 0x7012 }
1022 & ifmt_ret, { 0x7022 }
1028 & ifmt_ret, { 0x7062 }
1033 { { MNEM, ' ', OP (UIMM2), 0 } },
1034 & ifmt_swi, { 0x7006 }
1040 & ifmt_ret, { 0x7032 }
1046 & ifmt_ret, { 0x7011 }
1048 /* stcb $rn,$uimm16 */
1051 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
1052 & ifmt_movu16, { 0xf0040000 }
1054 /* ldcb $rn,$uimm16 */
1057 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
1058 & ifmt_movu16, { 0xf0140000 }
1060 /* bsetm ($rma),$uimm3 */
1063 { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1064 & ifmt_bsetm, { 0x2000 }
1066 /* bclrm ($rma),$uimm3 */
1069 { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1070 & ifmt_bsetm, { 0x2001 }
1072 /* bnotm ($rma),$uimm3 */
1075 { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1076 & ifmt_bsetm, { 0x2002 }
1078 /* btstm \$0,($rma),$uimm3 */
1081 { { MNEM, ' ', '$', '0', ',', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1082 & ifmt_bsetm, { 0x2003 }
1084 /* tas $rn,($rma) */
1087 { { MNEM, ' ', OP (RN), ',', '(', OP (RMA), ')', 0 } },
1088 & ifmt_tas, { 0x2004 }
1090 /* cache $cimm4,($rma) */
1093 { { MNEM, ' ', OP (CIMM4), ',', '(', OP (RMA), ')', 0 } },
1094 & ifmt_cache, { 0x7004 }
1099 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1100 & ifmt_mov, { 0x1004 }
1105 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1106 & ifmt_mov, { 0x1005 }
1111 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1112 & ifmt_mov, { 0x1006 }
1117 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1118 & ifmt_mov, { 0x1007 }
1123 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1124 & ifmt_madd, { 0xf0013004 }
1129 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1130 & ifmt_madd, { 0xf0013005 }
1135 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1136 & ifmt_madd, { 0xf0013006 }
1138 /* maddru $rn,$rm */
1141 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1142 & ifmt_madd, { 0xf0013007 }
1147 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1148 & ifmt_mov, { 0x1008 }
1153 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1154 & ifmt_mov, { 0x1009 }
1160 & ifmt_ret, { 0x7013 }
1166 & ifmt_ret, { 0x7033 }
1171 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1172 & ifmt_madd, { 0xf0010000 }
1177 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1178 & ifmt_madd, { 0xf0010003 }
1183 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1184 & ifmt_madd, { 0xf0010002 }
1189 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1190 & ifmt_madd, { 0xf0010004 }
1195 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1196 & ifmt_madd, { 0xf0010005 }
1201 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1202 & ifmt_madd, { 0xf0010006 }
1207 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1208 & ifmt_madd, { 0xf0010007 }
1210 /* clip $rn,$cimm5 */
1213 { { MNEM, ' ', OP (RN), ',', OP (CIMM5), 0 } },
1214 & ifmt_clip, { 0xf0011000 }
1216 /* clipu $rn,$cimm5 */
1219 { { MNEM, ' ', OP (RN), ',', OP (CIMM5), 0 } },
1220 & ifmt_clip, { 0xf0011001 }
1225 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1226 & ifmt_madd, { 0xf0010008 }
1231 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1232 & ifmt_madd, { 0xf001000a }
1237 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1238 & ifmt_madd, { 0xf0010009 }
1243 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1244 & ifmt_madd, { 0xf001000b }
1246 /* swcp $crn,($rma) */
1249 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), ')', 0 } },
1250 & ifmt_swcp, { 0x3008 }
1252 /* lwcp $crn,($rma) */
1255 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), ')', 0 } },
1256 & ifmt_swcp, { 0x3009 }
1258 /* smcp $crn64,($rma) */
1261 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), ')', 0 } },
1262 & ifmt_smcp, { 0x300a }
1264 /* lmcp $crn64,($rma) */
1267 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), ')', 0 } },
1268 & ifmt_smcp, { 0x300b }
1270 /* swcpi $crn,($rma+) */
1273 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', 0 } },
1274 & ifmt_swcp, { 0x3000 }
1276 /* lwcpi $crn,($rma+) */
1279 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', 0 } },
1280 & ifmt_swcp, { 0x3001 }
1282 /* smcpi $crn64,($rma+) */
1285 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', 0 } },
1286 & ifmt_smcp, { 0x3002 }
1288 /* lmcpi $crn64,($rma+) */
1291 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', 0 } },
1292 & ifmt_smcp, { 0x3003 }
1294 /* swcp $crn,$sdisp16($rma) */
1297 { { MNEM, ' ', OP (CRN), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1298 & ifmt_swcp16, { 0xf00c0000 }
1300 /* lwcp $crn,$sdisp16($rma) */
1303 { { MNEM, ' ', OP (CRN), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1304 & ifmt_swcp16, { 0xf00d0000 }
1306 /* smcp $crn64,$sdisp16($rma) */
1309 { { MNEM, ' ', OP (CRN64), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1310 & ifmt_smcp16, { 0xf00e0000 }
1312 /* lmcp $crn64,$sdisp16($rma) */
1315 { { MNEM, ' ', OP (CRN64), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1316 & ifmt_smcp16, { 0xf00f0000 }
1318 /* sbcpa $crn,($rma+),$cdisp8 */
1321 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1322 & ifmt_sbcpa, { 0xf0050000 }
1324 /* lbcpa $crn,($rma+),$cdisp8 */
1327 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1328 & ifmt_sbcpa, { 0xf0054000 }
1330 /* shcpa $crn,($rma+),$cdisp8a2 */
1333 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1334 & ifmt_shcpa, { 0xf0051000 }
1336 /* lhcpa $crn,($rma+),$cdisp8a2 */
1339 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1340 & ifmt_shcpa, { 0xf0055000 }
1342 /* swcpa $crn,($rma+),$cdisp8a4 */
1345 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1346 & ifmt_swcpa, { 0xf0052000 }
1348 /* lwcpa $crn,($rma+),$cdisp8a4 */
1351 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1352 & ifmt_swcpa, { 0xf0056000 }
1354 /* smcpa $crn64,($rma+),$cdisp8a8 */
1357 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1358 & ifmt_smcpa, { 0xf0053000 }
1360 /* lmcpa $crn64,($rma+),$cdisp8a8 */
1363 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1364 & ifmt_smcpa, { 0xf0057000 }
1366 /* sbcpm0 $crn,($rma+),$cdisp8 */
1369 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1370 & ifmt_sbcpa, { 0xf0050800 }
1372 /* lbcpm0 $crn,($rma+),$cdisp8 */
1375 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1376 & ifmt_sbcpa, { 0xf0054800 }
1378 /* shcpm0 $crn,($rma+),$cdisp8a2 */
1381 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1382 & ifmt_shcpa, { 0xf0051800 }
1384 /* lhcpm0 $crn,($rma+),$cdisp8a2 */
1387 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1388 & ifmt_shcpa, { 0xf0055800 }
1390 /* swcpm0 $crn,($rma+),$cdisp8a4 */
1393 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1394 & ifmt_swcpa, { 0xf0052800 }
1396 /* lwcpm0 $crn,($rma+),$cdisp8a4 */
1399 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1400 & ifmt_swcpa, { 0xf0056800 }
1402 /* smcpm0 $crn64,($rma+),$cdisp8a8 */
1405 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1406 & ifmt_smcpa, { 0xf0053800 }
1408 /* lmcpm0 $crn64,($rma+),$cdisp8a8 */
1411 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1412 & ifmt_smcpa, { 0xf0057800 }
1414 /* sbcpm1 $crn,($rma+),$cdisp8 */
1417 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1418 & ifmt_sbcpa, { 0xf0050c00 }
1420 /* lbcpm1 $crn,($rma+),$cdisp8 */
1423 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1424 & ifmt_sbcpa, { 0xf0054c00 }
1426 /* shcpm1 $crn,($rma+),$cdisp8a2 */
1429 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1430 & ifmt_shcpa, { 0xf0051c00 }
1432 /* lhcpm1 $crn,($rma+),$cdisp8a2 */
1435 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1436 & ifmt_shcpa, { 0xf0055c00 }
1438 /* swcpm1 $crn,($rma+),$cdisp8a4 */
1441 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1442 & ifmt_swcpa, { 0xf0052c00 }
1444 /* lwcpm1 $crn,($rma+),$cdisp8a4 */
1447 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1448 & ifmt_swcpa, { 0xf0056c00 }
1450 /* smcpm1 $crn64,($rma+),$cdisp8a8 */
1453 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1454 & ifmt_smcpa, { 0xf0053c00 }
1456 /* lmcpm1 $crn64,($rma+),$cdisp8a8 */
1459 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1460 & ifmt_smcpa, { 0xf0057c00 }
1462 /* bcpeq $cccc,$pcrel17a2 */
1465 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1466 & ifmt_bcpeq, { 0xd8040000 }
1468 /* bcpne $cccc,$pcrel17a2 */
1471 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1472 & ifmt_bcpeq, { 0xd8050000 }
1474 /* bcpat $cccc,$pcrel17a2 */
1477 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1478 & ifmt_bcpeq, { 0xd8060000 }
1480 /* bcpaf $cccc,$pcrel17a2 */
1483 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1484 & ifmt_bcpeq, { 0xd8070000 }
1490 & ifmt_ret, { 0x7021 }
1495 { { MNEM, ' ', OP (RM), 0 } },
1496 & ifmt_jmp, { 0x180f }
1498 /* bsrv $pcrel24a2 */
1501 { { MNEM, ' ', OP (PCREL24A2), 0 } },
1502 & ifmt_bsr24, { 0xd80b0000 }
1508 & ifmt_sim_syscall, { 0x7800 }
1520 & ifmt_mov, { 0x100a }
1526 & ifmt_mov, { 0x100b }
1532 & ifmt_mov, { 0x2005 }
1538 & ifmt_mov, { 0x2008 }
1544 & ifmt_mov, { 0x2009 }
1550 & ifmt_mov, { 0x200a }
1556 & ifmt_mov, { 0x200b }
1562 & ifmt_mov, { 0x3004 }
1568 & ifmt_mov, { 0x3005 }
1574 & ifmt_mov, { 0x3006 }
1580 & ifmt_mov, { 0x3007 }
1586 & ifmt_mov, { 0x300c }
1592 & ifmt_mov, { 0x300d }
1598 & ifmt_mov, { 0x300e }
1604 & ifmt_mov, { 0x300f }
1610 & ifmt_mov, { 0x7007 }
1616 & ifmt_mov, { 0x700e }
1622 & ifmt_mov, { 0x700f }
1628 & ifmt_mov, { 0xc007 }
1634 & ifmt_mov, { 0xe00d }
1640 & ifmt_mov, { 0xf003 }
1646 & ifmt_mov, { 0xf006 }
1652 & ifmt_mov, { 0xf008 }
1658 & ifmt_mov, { 0x7005 }
1664 & ifmt_mov, { 0x700c }
1670 & ifmt_mov, { 0x700d }
1679 /* Formats for ALIAS macro-insns. */
1681 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1682 #define F(f) & mep_cgen_ifld_table[MEP_##f]
1684 #define F(f) & mep_cgen_ifld_table[MEP_/**/f]
1686 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
1687 16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1690 static const CGEN_IFMT ifmt_sb16_0 ATTRIBUTE_UNUSED = {
1691 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1694 static const CGEN_IFMT ifmt_sh16_0 ATTRIBUTE_UNUSED = {
1695 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1698 static const CGEN_IFMT ifmt_sw16_0 ATTRIBUTE_UNUSED = {
1699 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1702 static const CGEN_IFMT ifmt_lb16_0 ATTRIBUTE_UNUSED = {
1703 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1706 static const CGEN_IFMT ifmt_lh16_0 ATTRIBUTE_UNUSED = {
1707 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1710 static const CGEN_IFMT ifmt_lw16_0 ATTRIBUTE_UNUSED = {
1711 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1714 static const CGEN_IFMT ifmt_lbu16_0 ATTRIBUTE_UNUSED = {
1715 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1718 static const CGEN_IFMT ifmt_lhu16_0 ATTRIBUTE_UNUSED = {
1719 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1722 static const CGEN_IFMT ifmt_swcp16_0 ATTRIBUTE_UNUSED = {
1723 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1726 static const CGEN_IFMT ifmt_lwcp16_0 ATTRIBUTE_UNUSED = {
1727 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1730 static const CGEN_IFMT ifmt_smcp16_0 ATTRIBUTE_UNUSED = {
1731 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1734 static const CGEN_IFMT ifmt_lmcp16_0 ATTRIBUTE_UNUSED = {
1735 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1740 /* Each non-simple macro entry points to an array of expansion possibilities. */
1742 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1743 #define A(a) (1 << CGEN_INSN_##a)
1745 #define A(a) (1 << CGEN_INSN_/**/a)
1747 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1748 #define OPERAND(op) MEP_OPERAND_##op
1750 #define OPERAND(op) MEP_OPERAND_/**/op
1752 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1753 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1755 /* The macro instruction table. */
1757 static const CGEN_IBASE mep_cgen_macro_insn_table[] =
1761 -1, "nop", "nop", 16,
1762 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1764 /* sb $rnc,$zero($rma) */
1766 -1, "sb16-0", "sb", 16,
1767 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1769 /* sh $rns,$zero($rma) */
1771 -1, "sh16-0", "sh", 16,
1772 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1774 /* sw $rnl,$zero($rma) */
1776 -1, "sw16-0", "sw", 16,
1777 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1779 /* lb $rnc,$zero($rma) */
1781 -1, "lb16-0", "lb", 16,
1782 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1784 /* lh $rns,$zero($rma) */
1786 -1, "lh16-0", "lh", 16,
1787 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1789 /* lw $rnl,$zero($rma) */
1791 -1, "lw16-0", "lw", 16,
1792 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1794 /* lbu $rnuc,$zero($rma) */
1796 -1, "lbu16-0", "lbu", 16,
1797 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1799 /* lhu $rnus,$zero($rma) */
1801 -1, "lhu16-0", "lhu", 16,
1802 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1804 /* swcp $crn,$zero($rma) */
1806 -1, "swcp16-0", "swcp", 16,
1807 { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1809 /* lwcp $crn,$zero($rma) */
1811 -1, "lwcp16-0", "lwcp", 16,
1812 { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1814 /* smcp $crn64,$zero($rma) */
1816 -1, "smcp16-0", "smcp", 16,
1817 { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1819 /* lmcp $crn64,$zero($rma) */
1821 -1, "lmcp16-0", "lmcp", 16,
1822 { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
1826 /* The macro instruction opcode table. */
1828 static const CGEN_OPCODE mep_cgen_macro_insn_opcode_table[] =
1836 /* sb $rnc,$zero($rma) */
1839 { { MNEM, ' ', OP (RNC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1840 & ifmt_sb16_0, { 0x8 }
1842 /* sh $rns,$zero($rma) */
1845 { { MNEM, ' ', OP (RNS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1846 & ifmt_sh16_0, { 0x9 }
1848 /* sw $rnl,$zero($rma) */
1851 { { MNEM, ' ', OP (RNL), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1852 & ifmt_sw16_0, { 0xa }
1854 /* lb $rnc,$zero($rma) */
1857 { { MNEM, ' ', OP (RNC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1858 & ifmt_lb16_0, { 0xc }
1860 /* lh $rns,$zero($rma) */
1863 { { MNEM, ' ', OP (RNS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1864 & ifmt_lh16_0, { 0xd }
1866 /* lw $rnl,$zero($rma) */
1869 { { MNEM, ' ', OP (RNL), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1870 & ifmt_lw16_0, { 0xe }
1872 /* lbu $rnuc,$zero($rma) */
1875 { { MNEM, ' ', OP (RNUC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1876 & ifmt_lbu16_0, { 0xb }
1878 /* lhu $rnus,$zero($rma) */
1881 { { MNEM, ' ', OP (RNUS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1882 & ifmt_lhu16_0, { 0xf }
1884 /* swcp $crn,$zero($rma) */
1887 { { MNEM, ' ', OP (CRN), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1888 & ifmt_swcp16_0, { 0x3008 }
1890 /* lwcp $crn,$zero($rma) */
1893 { { MNEM, ' ', OP (CRN), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1894 & ifmt_lwcp16_0, { 0x3009 }
1896 /* smcp $crn64,$zero($rma) */
1899 { { MNEM, ' ', OP (CRN64), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1900 & ifmt_smcp16_0, { 0x300a }
1902 /* lmcp $crn64,$zero($rma) */
1905 { { MNEM, ' ', OP (CRN64), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
1906 & ifmt_lmcp16_0, { 0x300b }
1915 #ifndef CGEN_ASM_HASH_P
1916 #define CGEN_ASM_HASH_P(insn) 1
1919 #ifndef CGEN_DIS_HASH_P
1920 #define CGEN_DIS_HASH_P(insn) 1
1923 /* Return non-zero if INSN is to be added to the hash table.
1924 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1927 asm_hash_insn_p (insn)
1928 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
1930 return CGEN_ASM_HASH_P (insn);
1934 dis_hash_insn_p (insn)
1935 const CGEN_INSN *insn;
1937 /* If building the hash table and the NO-DIS attribute is present,
1939 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1941 return CGEN_DIS_HASH_P (insn);
1944 #ifndef CGEN_ASM_HASH
1945 #define CGEN_ASM_HASH_SIZE 127
1946 #ifdef CGEN_MNEMONIC_OPERANDS
1947 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1949 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1953 /* It doesn't make much sense to provide a default here,
1954 but while this is under development we do.
1955 BUFFER is a pointer to the bytes of the insn, target order.
1956 VALUE is the first base_insn_bitsize bits as an int in host order. */
1958 #ifndef CGEN_DIS_HASH
1959 #define CGEN_DIS_HASH_SIZE 256
1960 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1963 /* The result is the hash value of the insn.
1964 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1967 asm_hash_insn (mnem)
1970 return CGEN_ASM_HASH (mnem);
1973 /* BUF is a pointer to the bytes of the insn, target order.
1974 VALUE is the first base_insn_bitsize bits as an int in host order. */
1977 dis_hash_insn (buf, value)
1978 const char * buf ATTRIBUTE_UNUSED;
1979 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
1981 return CGEN_DIS_HASH (buf, value);
1984 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1987 set_fields_bitsize (CGEN_FIELDS *fields, int size)
1989 CGEN_FIELDS_BITSIZE (fields) = size;
1992 /* Function to call before using the operand instance table.
1993 This plugs the opcode entries and macro instructions into the cpu table. */
1996 mep_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1999 int num_macros = (sizeof (mep_cgen_macro_insn_table) /
2000 sizeof (mep_cgen_macro_insn_table[0]));
2001 const CGEN_IBASE *ib = & mep_cgen_macro_insn_table[0];
2002 const CGEN_OPCODE *oc = & mep_cgen_macro_insn_opcode_table[0];
2003 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
2005 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
2006 for (i = 0; i < num_macros; ++i)
2008 insns[i].base = &ib[i];
2009 insns[i].opcode = &oc[i];
2010 mep_cgen_build_insn_regex (& insns[i]);
2012 cd->macro_insn_table.init_entries = insns;
2013 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
2014 cd->macro_insn_table.num_init_entries = num_macros;
2016 oc = & mep_cgen_insn_opcode_table[0];
2017 insns = (CGEN_INSN *) cd->insn_table.init_entries;
2018 for (i = 0; i < MAX_INSNS; ++i)
2020 insns[i].opcode = &oc[i];
2021 mep_cgen_build_insn_regex (& insns[i]);
2024 cd->sizeof_fields = sizeof (CGEN_FIELDS);
2025 cd->set_fields_bitsize = set_fields_bitsize;
2027 cd->asm_hash_p = asm_hash_insn_p;
2028 cd->asm_hash = asm_hash_insn;
2029 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
2031 cd->dis_hash_p = dis_hash_insn_p;
2032 cd->dis_hash = dis_hash_insn;
2033 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;