1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19 #include "floatformat.h"
21 /* Opcode/m68k.h is a massive table. As a kludge, break it up into
22 two pieces. This makes nonportable C -- FIXME -- it assumes that
23 two data items declared near each other will be contiguous in
24 memory. This kludge can be removed, FIXME, when GCC is fixed to not
25 be a hog about initializers. */
28 #define BREAK_UP_BIG_DECL }; \
29 struct m68k_opcode m68k_opcodes_2[] = {
30 #define AND_OTHER_PART sizeof (m68k_opcodes_2)
33 #include "opcode/m68k.h"
36 /* Local function prototypes */
39 fetch_arg PARAMS ((unsigned char *, int, int, disassemble_info *));
42 print_base PARAMS ((int, int, disassemble_info*));
44 static unsigned char *
45 print_indexed PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *));
48 print_insn_arg PARAMS ((char *, unsigned char *, unsigned char *, bfd_vma,
51 CONST char * CONST fpcr_names[] = {
52 "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
53 "fpiar/fpcr", "fpsr/fpcr", "fpiar/fpsr/fpcr"};
55 static char *reg_names[] = {
56 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0",
57 "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
59 /* Sign-extend an (unsigned char). */
61 #define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
63 #define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
66 /* Get a 1 byte signed integer. */
67 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
69 /* Get a 2 byte signed integer. */
70 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
72 (p += 2, FETCH_DATA (info, p), \
73 COERCE16 ((p[-2] << 8) + p[-1]))
75 /* Get a 4 byte signed integer. */
76 #define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
78 (p += 4, FETCH_DATA (info, p), \
79 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
81 /* NEXTSINGLE and NEXTDOUBLE handle alignment problems, but not
82 * byte-swapping or other float format differences. FIXME! */
90 #define NEXTSINGLE(val, p) \
91 { int i; union number u;\
92 FETCH_DATA (info, p + sizeof (float));\
93 for (i = 0; i < sizeof(float); i++) u.c[i] = *p++; \
96 #define NEXTDOUBLE(val, p) \
97 { int i; union number u;\
98 FETCH_DATA (info, p + sizeof (double));\
99 for (i = 0; i < sizeof(double); i++) u.c[i] = *p++; \
102 /* Need a function to convert from extended to double precision... */
103 #define NEXTEXTEND(p) \
104 (p += 12, FETCH_DATA (info, p), 0.0)
106 /* Need a function to convert from packed to double
107 precision. Actually, it's easier to print a
108 packed number than a double anyway, so maybe
109 there should be a special case to handle this... */
110 #define NEXTPACKED(p) \
111 (p += 12, FETCH_DATA (info, p), 0.0)
114 /* Maximum length of an instruction. */
121 /* Points to first byte not fetched. */
122 bfd_byte *max_fetched;
123 bfd_byte the_buffer[MAXLEN];
128 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
129 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
131 #define FETCH_DATA(info, addr) \
132 ((addr) <= ((struct private *)(info->private_data))->max_fetched \
133 ? 1 : fetch_data ((info), (addr)))
136 fetch_data (info, addr)
137 struct disassemble_info *info;
141 struct private *priv = (struct private *)info->private_data;
142 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
144 status = (*info->read_memory_func) (start,
146 addr - priv->max_fetched,
150 (*info->memory_error_func) (status, start, info);
151 longjmp (priv->bailout, 1);
154 priv->max_fetched = addr;
158 /* This function is used to print to the bit-bucket. */
161 dummy_printer (FILE * file, const char * format, ...)
163 dummy_printer (file) FILE *file;
168 dummy_print_address (vma, info)
170 struct disassemble_info *info;
174 static const struct m68k_opcode *
179 const int max = sizeof (m68k_opcodes) / sizeof (m68k_opcodes[0]);
181 return &m68k_opcodes_2[idx - max];
183 return &m68k_opcodes[idx];
186 /* Print the m68k instruction at address MEMADDR in debugged memory,
187 on INFO->STREAM. Returns length of the instruction, in bytes. */
190 print_insn_m68k (memaddr, info)
192 disassemble_info *info;
195 register unsigned char *p;
196 unsigned char *save_p;
198 register unsigned long bestmask;
199 const struct m68k_opcode *best = 0;
201 bfd_byte *buffer = priv.the_buffer;
202 fprintf_ftype save_printer = info->fprintf_func;
203 void (*save_print_address) PARAMS((bfd_vma, struct disassemble_info*))
204 = info->print_address_func;
206 info->private_data = (PTR) &priv;
207 priv.max_fetched = priv.the_buffer;
208 priv.insn_start = memaddr;
209 if (setjmp (priv.bailout) != 0)
214 FETCH_DATA (info, buffer + 2);
215 for (i = 0; i < numopcodes; i++)
217 const struct m68k_opcode *opc = opcode (i);
218 unsigned long opcode = opc->opcode;
219 unsigned long match = opc->match;
221 if (opc->flags & F_ALIAS)
224 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
225 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
226 /* Only fetch the next two bytes if we need to. */
227 && (((0xffff & match) == 0)
229 (FETCH_DATA (info, buffer + 4)
230 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
231 && ((0xff & buffer[3] & match) == (0xff & opcode)))
234 /* Don't use for printout the variants of divul and divsl
235 that have the same register number in two places.
236 The more general variants will match instead. */
237 for (d = opc->args; *d; d += 2)
241 /* Don't use for printout the variants of most floating
242 point coprocessor instructions which use the same
243 register number in two places, as above. */
245 for (d = opc->args; *d; d += 2)
249 if (*d == 0 && match > bestmask)
260 /* Point at first word of argument data,
261 and at descriptor for first argument. */
264 /* Figure out how long the fixed-size portion of the instruction is.
265 The only place this is stored in the opcode table is
266 in the arguments--look for arguments which specify fields in the 2nd
267 or 3rd words of the instruction. */
268 for (d = best->args; *d; d += 2)
270 /* I don't think it is necessary to be checking d[0] here; I suspect
271 all this could be moved to the case statement below. */
274 if (d[1] == 'l' && p - buffer < 6)
276 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
279 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
303 /* pflusha is an exception; it takes no arguments but is two words long. */
304 if (buffer[0] == 0xf0 && buffer[1] == 0 && buffer[2] == 0x24 &&
308 FETCH_DATA (info, p);
312 /* We can the operands twice. The first time we don't print anything,
313 but look for errors. */
316 info->print_address_func = dummy_print_address;
317 info->fprintf_func = (fprintf_ftype)dummy_printer;
320 int eaten = print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
323 else if (eaten == -1)
327 (*info->fprintf_func)(info->stream,
328 "<internal error in opcode table: %s %s>\n",
336 info->fprintf_func = save_printer;
337 info->print_address_func = save_print_address;
341 (*info->fprintf_func) (info->stream, "%s", best->name);
344 (*info->fprintf_func) (info->stream, " ");
348 p += print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
350 if (*d && *(d - 2) != 'I' && *d != 'k')
351 (*info->fprintf_func) (info->stream, ",");
356 /* Handle undefined instructions. */
357 info->fprintf_func = save_printer;
358 info->print_address_func = save_print_address;
359 (*info->fprintf_func) (info->stream, "0%o",
360 (buffer[0] << 8) + buffer[1]);
364 /* Returns number of bytes "eaten" by the operand, or
365 return -1 if an invalid operand was found, or -2 if
366 an opcode tabe error was found. */
369 print_insn_arg (d, buffer, p0, addr, info)
371 unsigned char *buffer;
373 bfd_vma addr; /* PC for this arg to be relative to */
374 disassemble_info *info;
376 register int val = 0;
377 register int place = d[1];
378 register unsigned char *p = p0;
380 register CONST char *regname;
381 register unsigned char *p1;
387 case 'c': /* cache identifier */
389 static char *cacheFieldName[] = { "NOP", "dc", "ic", "bc" };
390 val = fetch_arg (buffer, place, 2, info);
391 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
395 case 'a': /* address register indirect only. Cf. case '+'. */
397 (*info->fprintf_func)
400 reg_names [fetch_arg (buffer, place, 3, info) + 8]);
404 case '_': /* 32-bit absolute address for move16. */
407 (*info->fprintf_func) (info->stream, "@#");
408 (*info->print_address_func) (val, info);
413 (*info->fprintf_func) (info->stream, "ccr");
417 (*info->fprintf_func) (info->stream, "sr");
421 (*info->fprintf_func) (info->stream, "usp");
426 static struct { char *name; int value; } names[]
427 = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
428 {"tc", 0x003}, {"itt0",0x004}, {"itt1", 0x005},
429 {"dtt0",0x006}, {"dtt1",0x007}, {"buscr",0x008},
430 {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
431 {"msp", 0x803}, {"isp", 0x804},
433 /* Should we be calling this psr like we do in case 'Y'? */
436 {"urp", 0x806}, {"srp", 0x807}, {"pcr", 0x808}};
438 val = fetch_arg (buffer, place, 12, info);
439 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
440 if (names[regno].value == val)
442 (*info->fprintf_func) (info->stream, names[regno].name);
446 (*info->fprintf_func) (info->stream, "%d", val);
451 val = fetch_arg (buffer, place, 3, info);
452 /* 0 means 8, except for the bkpt instruction... */
453 if (val == 0 && d[1] != 's')
455 (*info->fprintf_func) (info->stream, "#%d", val);
459 val = fetch_arg (buffer, place, 8, info);
462 (*info->fprintf_func) (info->stream, "#%d", val);
466 val = fetch_arg (buffer, place, 4, info);
467 (*info->fprintf_func) (info->stream, "#%d", val);
471 (*info->fprintf_func) (info->stream, "%s",
472 reg_names[fetch_arg (buffer, place, 3, info)]);
476 (*info->fprintf_func)
478 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
482 (*info->fprintf_func)
484 reg_names[fetch_arg (buffer, place, 4, info)]);
488 (*info->fprintf_func)
489 (info->stream, "%s@",
490 reg_names[fetch_arg (buffer, place, 4, info)]);
494 (*info->fprintf_func)
495 (info->stream, "fp%d",
496 fetch_arg (buffer, place, 3, info));
500 val = fetch_arg (buffer, place, 6, info);
502 (*info->fprintf_func) (info->stream, "%s", reg_names [val & 7]);
504 (*info->fprintf_func) (info->stream, "%d", val);
508 (*info->fprintf_func)
509 (info->stream, "%s@+",
510 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
514 (*info->fprintf_func)
515 (info->stream, "%s@-",
516 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
521 (*info->fprintf_func)
522 (info->stream, "{%s}",
523 reg_names[fetch_arg (buffer, place, 3, info)]);
524 else if (place == 'C')
526 val = fetch_arg (buffer, place, 7, info);
527 if ( val > 63 ) /* This is a signed constant. */
529 (*info->fprintf_func) (info->stream, "{#%d}", val);
537 p1 = buffer + (*d == '#' ? 2 : 4);
539 val = fetch_arg (buffer, place, 4, info);
540 else if (place == 'C')
541 val = fetch_arg (buffer, place, 7, info);
542 else if (place == '8')
543 val = fetch_arg (buffer, place, 3, info);
544 else if (place == '3')
545 val = fetch_arg (buffer, place, 8, info);
546 else if (place == 'b')
548 else if (place == 'w')
550 else if (place == 'l')
554 (*info->fprintf_func) (info->stream, "#%d", val);
560 else if (place == 'B')
561 val = COERCE_SIGNED_CHAR(buffer[1]);
562 else if (place == 'w' || place == 'W')
564 else if (place == 'l' || place == 'L')
566 else if (place == 'g')
568 val = NEXTBYTE (buffer);
574 else if (place == 'c')
576 if (buffer[1] & 0x40) /* If bit six is one, long offset */
584 (*info->print_address_func) (addr + val, info);
589 (*info->fprintf_func)
590 (info->stream, "%s@(%d)",
591 reg_names[fetch_arg (buffer, place, 3, info)], val);
595 (*info->fprintf_func) (info->stream, "%s",
596 fpcr_names[fetch_arg (buffer, place, 3, info)]);
600 /* Get coprocessor ID... */
601 val = fetch_arg (buffer, 'd', 3, info);
603 if (val != 1) /* Unusual coprocessor ID? */
604 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
622 val = fetch_arg (buffer, 'x', 6, info);
623 val = ((val & 7) << 3) + ((val >> 3) & 7);
626 val = fetch_arg (buffer, 's', 6, info);
628 /* Get register number assuming address register. */
629 regno = (val & 7) + 8;
630 regname = reg_names[regno];
634 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
638 (*info->fprintf_func) (info->stream, "%s", regname);
642 (*info->fprintf_func) (info->stream, "%s@", regname);
646 (*info->fprintf_func) (info->stream, "%s@+", regname);
650 (*info->fprintf_func) (info->stream, "%s@-", regname);
655 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
659 p = print_indexed (regno, p, addr, info);
667 (*info->fprintf_func) (info->stream, "@#");
668 (*info->print_address_func) (val, info);
673 (*info->fprintf_func) (info->stream, "@#");
674 (*info->print_address_func) (val, info);
679 (*info->print_address_func) (addr + val, info);
683 p = print_indexed (-1, p, addr, info);
687 flt_p = 1; /* Assume it's a float... */
706 NEXTSINGLE(flval, p);
710 NEXTDOUBLE(flval, p);
714 FETCH_DATA (info, p + 12);
715 floatformat_to_double (&floatformat_m68881_ext,
721 flval = NEXTPACKED(p);
727 if ( flt_p ) /* Print a float? */
728 (*info->fprintf_func) (info->stream, "#%g", flval);
730 (*info->fprintf_func) (info->stream, "#%d", val);
746 /* Move the pointer ahead if this point is farther ahead
751 (*info->fprintf_func) (info->stream, "#0");
756 register int newval = 0;
757 for (regno = 0; regno < 16; ++regno)
758 if (val & (0x8000 >> regno))
759 newval |= 1 << regno;
764 for (regno = 0; regno < 16; ++regno)
765 if (val & (1 << regno))
769 (*info->fprintf_func) (info->stream, "/");
771 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
773 while (val & (1 << (regno + 1)))
775 if (regno > first_regno)
776 (*info->fprintf_func) (info->stream, "-%s",
780 else if (place == '3')
784 val = fetch_arg (buffer, place, 8, info);
787 (*info->fprintf_func) (info->stream, "#0");
792 register int newval = 0;
793 for (regno = 0; regno < 8; ++regno)
794 if (val & (0x80 >> regno))
795 newval |= 1 << regno;
800 for (regno = 0; regno < 8; ++regno)
801 if (val & (1 << regno))
805 (*info->fprintf_func) (info->stream, "/");
807 (*info->fprintf_func) (info->stream, "fp%d", regno);
809 while (val & (1 << (regno + 1)))
811 if (regno > first_regno)
812 (*info->fprintf_func) (info->stream, "-fp%d", regno);
827 int val = fetch_arg (buffer, place, 5, info);
831 case 2: name = "tt0"; break;
832 case 3: name = "tt1"; break;
833 case 0x10: name = "tc"; break;
834 case 0x11: name = "drp"; break;
835 case 0x12: name = "srp"; break;
836 case 0x13: name = "crp"; break;
837 case 0x14: name = "cal"; break;
838 case 0x15: name = "val"; break;
839 case 0x16: name = "scc"; break;
840 case 0x17: name = "ac"; break;
841 case 0x18: name = "psr"; break;
842 case 0x19: name = "pcsr"; break;
846 int break_reg = ((buffer[3] >> 2) & 7);
847 (*info->fprintf_func)
848 (info->stream, val == 0x1c ? "bad%d" : "bac%d",
853 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
856 (*info->fprintf_func) (info->stream, name);
862 int fc = fetch_arg (buffer, place, 5, info);
864 (*info->fprintf_func) (info->stream, "dfc");
866 (*info->fprintf_func) (info->stream, "sfc");
868 (*info->fprintf_func) (info->stream, "<function code %d>", fc);
873 (*info->fprintf_func) (info->stream, "val");
878 int level = fetch_arg (buffer, place, 3, info);
879 (*info->fprintf_func) (info->stream, "%d", level);
890 /* Fetch BITS bits from a position in the instruction specified by CODE.
891 CODE is a "place to put an argument", or 'x' for a destination
892 that is a general address (mode and register).
893 BUFFER contains the instruction. */
896 fetch_arg (buffer, code, bits, info)
897 unsigned char *buffer;
900 disassemble_info *info;
902 register int val = 0;
909 case 'd': /* Destination, for register or quick. */
910 val = (buffer[0] << 8) + buffer[1];
914 case 'x': /* Destination, for general arg */
915 val = (buffer[0] << 8) + buffer[1];
920 FETCH_DATA (info, buffer + 3);
921 val = (buffer[3] >> 4);
925 FETCH_DATA (info, buffer + 3);
930 FETCH_DATA (info, buffer + 3);
931 val = (buffer[2] << 8) + buffer[3];
936 FETCH_DATA (info, buffer + 3);
937 val = (buffer[2] << 8) + buffer[3];
943 FETCH_DATA (info, buffer + 3);
944 val = (buffer[2] << 8) + buffer[3];
948 FETCH_DATA (info, buffer + 5);
949 val = (buffer[4] << 8) + buffer[5];
954 FETCH_DATA (info, buffer + 5);
955 val = (buffer[4] << 8) + buffer[5];
960 FETCH_DATA (info, buffer + 5);
961 val = (buffer[4] << 8) + buffer[5];
965 FETCH_DATA (info, buffer + 3);
966 val = (buffer[2] << 8) + buffer[3];
971 FETCH_DATA (info, buffer + 3);
972 val = (buffer[2] << 8) + buffer[3];
977 FETCH_DATA (info, buffer + 3);
978 val = (buffer[2] << 8) + buffer[3];
983 val = (buffer[1] >> 6);
1013 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
1014 P points to extension word, in buffer.
1015 ADDR is the nominal core address of that extension word. */
1017 static unsigned char *
1018 print_indexed (basereg, p, addr, info)
1022 disassemble_info *info;
1025 static char *scales[] = {"", "*2", "*4", "*8"};
1026 register int base_disp;
1027 register int outer_disp;
1030 word = NEXTWORD (p);
1032 /* Generate the text for the index register.
1033 Where this will be output is not yet determined. */
1034 sprintf (buf, "[%s.%c%s]",
1035 reg_names[(word >> 12) & 0xf],
1036 (word & 0x800) ? 'l' : 'w',
1037 scales[(word >> 9) & 3]);
1039 /* Handle the 68000 style of indexing. */
1041 if ((word & 0x100) == 0)
1043 print_base (basereg,
1044 ((word & 0x80) ? word | 0xff00 : word & 0xff)
1045 + ((basereg == -1) ? addr : 0),
1047 (*info->fprintf_func) (info->stream, "%s", buf);
1051 /* Handle the generalized kind. */
1052 /* First, compute the displacement to add to the base register. */
1059 switch ((word >> 4) & 3)
1062 base_disp = NEXTWORD (p);
1065 base_disp = NEXTLONG (p);
1070 /* Handle single-level case (not indirect) */
1072 if ((word & 7) == 0)
1074 print_base (basereg, base_disp, info);
1075 (*info->fprintf_func) (info->stream, "%s", buf);
1079 /* Two level. Compute displacement to add after indirection. */
1085 outer_disp = NEXTWORD (p);
1088 outer_disp = NEXTLONG (p);
1091 (*info->fprintf_func) (info->stream, "%d(", outer_disp);
1092 print_base (basereg, base_disp, info);
1094 /* If postindexed, print the closeparen before the index. */
1096 (*info->fprintf_func) (info->stream, ")%s", buf);
1097 /* If preindexed, print the closeparen after the index. */
1099 (*info->fprintf_func) (info->stream, "%s)", buf);
1104 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1105 REGNO = -1 for pc, -2 for none (suppressed). */
1108 print_base (regno, disp, info)
1111 disassemble_info *info;
1114 (*info->fprintf_func) (info->stream, "%d", disp);
1115 else if (regno == -1)
1116 (*info->fprintf_func) (info->stream, "0x%x", (unsigned) disp);
1118 (*info->fprintf_func) (info->stream, "%d(%s)", disp, reg_names[regno]);