1 /* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@worldnet.fr)
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "opcode/m68hc11.h"
25 static const char *const reg_name[] = {
29 static const char *const reg_src_table[] = {
30 "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
33 static const char *const reg_dst_table[] = {
34 "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
37 #define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
39 /* Prototypes for local functions. */
40 static int read_memory
41 PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
42 static int print_indexed_operand
43 PARAMS ((bfd_vma, struct disassemble_info *, int));
45 PARAMS ((bfd_vma, struct disassemble_info *, int));
48 read_memory (memaddr, buffer, size, info)
52 struct disassemble_info *info;
56 /* Get first byte. Only one at a time because we don't know the
58 status = (*info->read_memory_func) (memaddr, buffer, size, info);
61 (*info->memory_error_func) (status, memaddr, info);
68 /* Read the 68HC12 indexed operand byte and print the corresponding mode.
69 Returns the number of bytes read or -1 if failure. */
71 print_indexed_operand (memaddr, info, mov_insn)
73 struct disassemble_info *info;
82 status = read_memory (memaddr, &buffer[0], 1, info);
88 /* n,r with 5-bits signed constant. */
89 if ((buffer[0] & 0x20) == 0)
91 reg = (buffer[0] >> 6) & 3;
92 sval = (buffer[0] & 0x1f);
95 (*info->fprintf_func) (info->stream, "%d,%s",
96 (int) sval, reg_name[reg]);
99 /* Auto pre/post increment/decrement. */
100 else if ((buffer[0] & 0xc0) != 0xc0)
104 reg = (buffer[0] >> 6) & 3;
105 sval = (buffer[0] & 0x0f);
117 (*info->fprintf_func) (info->stream, "%d,%s%s%s",
119 (buffer[0] & 0x10 ? "" : mode),
120 reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
123 /* [n,r] 16-bits offset indexed indirect. */
124 else if ((buffer[0] & 0x07) == 3)
128 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
132 reg = (buffer[0] >> 3) & 0x03;
133 status = read_memory (memaddr + pos, &buffer[0], 2, info);
140 sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
141 (*info->fprintf_func) (info->stream, "[%u,%s]",
142 sval & 0x0ffff, reg_name[reg]);
144 else if ((buffer[0] & 0x4) == 0)
148 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
152 reg = (buffer[0] >> 3) & 0x03;
153 status = read_memory (memaddr + pos,
154 &buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
161 sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
167 sval = buffer[1] & 0x00ff;
168 if (buffer[0] & 0x01)
172 (*info->fprintf_func) (info->stream, "%d,%s",
173 (int) sval, reg_name[reg]);
177 reg = (buffer[0] >> 3) & 0x03;
178 switch (buffer[0] & 3)
181 (*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
184 (*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
187 (*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
191 (*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
199 /* Disassemble one instruction at address 'memaddr'. Returns the number
200 of bytes used by that instruction. */
202 print_insn (memaddr, info, arch)
204 struct disassemble_info *info;
212 const struct m68hc11_opcode *opcode;
214 /* Get first byte. Only one at a time because we don't know the
216 status = read_memory (memaddr, buffer, 1, info);
226 /* Look for page2,3,4 opcodes. */
227 if (code == M6811_OPCODE_PAGE2)
230 format = M6811_OP_PAGE2;
232 else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
235 format = M6811_OP_PAGE3;
237 else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
240 format = M6811_OP_PAGE4;
243 /* We are in page2,3,4; get the real opcode. */
246 status = read_memory (memaddr + pos, &buffer[1], 1, info);
255 /* Look first for a 68HC12 alias. All of them are 2-bytes long and
256 in page 1. There is no operand to print. We read the second byte
257 only when we have a possible match. */
258 if ((arch & cpu6812) && format == 0)
262 /* Walk the alias table to find a code1+code2 match. */
263 for (i = 0; i < m68hc12_num_alias; i++)
265 if (m68hc12_alias[i].code1 == code)
269 status = read_memory (memaddr + pos + 1,
270 &buffer[1], 1, info);
276 if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
278 (*info->fprintf_func) (info->stream, "%s",
279 m68hc12_alias[i].name);
288 /* Scan the opcode table until we find the opcode
289 with the corresponding page. */
290 opcode = m68hc11_opcodes;
291 for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
295 if ((opcode->arch & arch) == 0)
297 if (opcode->opcode != code)
299 if ((opcode->format & OP_PAGE_MASK) != format)
302 if (opcode->format & M6812_OP_REG)
307 if (opcode->format & M6811_OP_JUMP_REL)
312 status = read_memory (memaddr + pos, &buffer[0], 1, info);
317 for (j = 0; i + j < m68hc11_num_opcodes; j++)
319 if ((opcode[j].arch & arch) == 0)
321 if (opcode[j].opcode != code)
325 if (!(opcode[j].format & M6811_OP_JUMP_REL))
328 if ((opcode[j].format & M6812_OP_IBCC_MARKER)
329 && (buffer[0] & 0xc0) != 0x80)
331 if ((opcode[j].format & M6812_OP_TBCC_MARKER)
332 && (buffer[0] & 0xc0) != 0x40)
334 if ((opcode[j].format & M6812_OP_DBCC_MARKER)
335 && (buffer[0] & 0xc0) != 0)
337 if ((opcode[j].format & M6812_OP_EQ_MARKER)
338 && (buffer[0] & 0x20) == 0)
340 if (!(opcode[j].format & M6812_OP_EQ_MARKER)
341 && (buffer[0] & 0x20) != 0)
345 if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
347 if ((opcode[j].format & M6812_OP_SEX_MARKER)
348 && (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
349 && ((buffer[0] & 0x0f0) <= 0x20))
351 if (opcode[j].format & M6812_OP_TFR_MARKER
352 && !(buffer[0] & 0x80))
355 if (i + j < m68hc11_num_opcodes)
359 /* We have found the opcode. Extract the operand and print it. */
360 (*info->fprintf_func) (info->stream, "%s", opcode->name);
362 format = opcode->format;
363 if (format & (M6811_OP_MASK | M6811_OP_BITMASK
364 | M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
366 (*info->fprintf_func) (info->stream, "\t");
369 /* The movb and movw must be handled in a special way... */
371 if (format & (M6812_OP_IDX_P2 | M6812_OP_IND16_P2))
373 if ((format & M6812_OP_IDX_P2)
374 && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 | M6811_OP_IND16)))
378 /* Operand with one more byte: - immediate, offset,
379 direct-low address. */
381 (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
383 status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
391 if (format & M6811_OP_IMM8)
393 (*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
394 format &= ~M6811_OP_IMM8;
396 else if (format & M6811_OP_IX)
398 /* Offsets are in range 0..255, print them unsigned. */
399 (*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
400 format &= ~M6811_OP_IX;
402 else if (format & M6811_OP_IY)
404 (*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
405 format &= ~M6811_OP_IY;
407 else if (format & M6811_OP_DIRECT)
409 (*info->fprintf_func) (info->stream, "*");
410 (*info->print_address_func) (buffer[0] & 0x0FF, info);
411 format &= ~M6811_OP_DIRECT;
415 #define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
416 /* Analyze the 68HC12 indexed byte. */
417 if (format & M6812_INDEXED_FLAGS)
419 status = print_indexed_operand (memaddr + pos, info, 0);
427 /* 68HC12 dbcc/ibcc/tbcc operands. */
428 if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
430 status = read_memory (memaddr + pos, &buffer[0], 2, info);
435 (*info->fprintf_func) (info->stream, "%s,",
436 reg_src_table[buffer[0] & 0x07]);
437 sval = buffer[1] & 0x0ff;
438 if (buffer[0] & 0x10)
442 (*info->print_address_func) (memaddr + pos + sval, info);
443 format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
445 else if (format & (M6812_OP_REG | M6812_OP_REG_2))
447 status = read_memory (memaddr + pos, &buffer[0], 1, info);
454 (*info->fprintf_func) (info->stream, "%s,%s",
455 reg_src_table[(buffer[0] >> 4) & 7],
456 reg_dst_table[(buffer[0] & 7)]);
459 /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
460 and in that order. The brset/brclr insn have a bitmask and then
461 a relative branch offset. */
462 if (format & M6811_OP_BITMASK)
464 status = read_memory (memaddr + pos, &buffer[0], 1, info);
470 (*info->fprintf_func) (info->stream, " #$%02x%s",
472 (format & M6811_OP_JUMP_REL ? " " : ""));
473 format &= ~M6811_OP_BITMASK;
475 if (format & M6811_OP_JUMP_REL)
479 status = read_memory (memaddr + pos, &buffer[0], 1, info);
486 val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
487 (*info->print_address_func) (memaddr + pos + val, info);
488 format &= ~M6811_OP_JUMP_REL;
490 else if (format & M6812_OP_JUMP_REL16)
494 status = read_memory (memaddr + pos, &buffer[0], 2, info);
501 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
505 (*info->print_address_func) (memaddr + pos + val, info);
506 format &= ~M6812_OP_JUMP_REL16;
508 if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
512 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
517 if (format & M6812_OP_IDX_P2)
523 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
525 if (format & M6811_OP_IMM16)
527 format &= ~M6811_OP_IMM16;
528 (*info->fprintf_func) (info->stream, "#");
531 format &= ~M6811_OP_IND16;
533 (*info->print_address_func) (val, info);
536 if (format & M6812_OP_IDX_P2)
538 (*info->fprintf_func) (info->stream, ", ");
539 status = print_indexed_operand (memaddr + pos + offset, info, 1);
545 if (format & M6812_OP_IND16_P2)
549 (*info->fprintf_func) (info->stream, ", ");
551 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
558 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
560 (*info->print_address_func) (val, info);
564 /* Consistency check. 'format' must be 0, so that we have handled
565 all formats; and the computed size of the insn must match the
566 opcode table content. */
567 if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
569 (*info->fprintf_func) (info->stream, "; Error, format: %x", format);
571 if (pos != opcode->size)
573 (*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
580 /* Opcode not recognized. */
581 if (format == M6811_OP_PAGE2 && arch & cpu6812
582 && ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
583 (*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
585 else if (format == M6811_OP_PAGE2)
586 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
587 M6811_OPCODE_PAGE2, code);
588 else if (format == M6811_OP_PAGE3)
589 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
590 M6811_OPCODE_PAGE3, code);
591 else if (format == M6811_OP_PAGE4)
592 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
593 M6811_OPCODE_PAGE4, code);
595 (*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);
600 /* Disassemble one instruction at address 'memaddr'. Returns the number
601 of bytes used by that instruction. */
603 print_insn_m68hc11 (memaddr, info)
605 struct disassemble_info *info;
607 return print_insn (memaddr, info, cpu6811);
611 print_insn_m68hc12 (memaddr, info)
613 struct disassemble_info *info;
615 return print_insn (memaddr, info, cpu6812);