1 /* Instruction opcode table for lm32.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996-2016 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
29 #include "lm32-desc.h"
31 #include "libiberty.h"
33 /* The hash functions are recorded here to help keep assembler code out of
34 the disassembler and vice versa. */
36 static int asm_hash_insn_p (const CGEN_INSN *);
37 static unsigned int asm_hash_insn (const char *);
38 static int dis_hash_insn_p (const CGEN_INSN *);
39 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
41 /* Instruction formats. */
43 #define F(f) & lm32_cgen_ifld_table[LM32_##f]
44 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
48 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
49 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
52 static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
53 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
56 static const CGEN_IFMT ifmt_andi ATTRIBUTE_UNUSED = {
57 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
60 static const CGEN_IFMT ifmt_andhii ATTRIBUTE_UNUSED = {
61 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
64 static const CGEN_IFMT ifmt_b ATTRIBUTE_UNUSED = {
65 32, 32, 0xfc1fffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
68 static const CGEN_IFMT ifmt_bi ATTRIBUTE_UNUSED = {
69 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_CALL) }, { 0 } }
72 static const CGEN_IFMT ifmt_be ATTRIBUTE_UNUSED = {
73 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_BRANCH) }, { 0 } }
76 static const CGEN_IFMT ifmt_ori ATTRIBUTE_UNUSED = {
77 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
80 static const CGEN_IFMT ifmt_rcsr ATTRIBUTE_UNUSED = {
81 32, 32, 0xfc1f07ff, { { F (F_OPCODE) }, { F (F_CSR) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
84 static const CGEN_IFMT ifmt_sextb ATTRIBUTE_UNUSED = {
85 32, 32, 0xfc1f07ff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
88 static const CGEN_IFMT ifmt_user ATTRIBUTE_UNUSED = {
89 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_USER) }, { 0 } }
92 static const CGEN_IFMT ifmt_wcsr ATTRIBUTE_UNUSED = {
93 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_CSR) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
96 static const CGEN_IFMT ifmt_break ATTRIBUTE_UNUSED = {
97 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_EXCEPTION) }, { 0 } }
100 static const CGEN_IFMT ifmt_bret ATTRIBUTE_UNUSED = {
101 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
104 static const CGEN_IFMT ifmt_mvi ATTRIBUTE_UNUSED = {
105 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
108 static const CGEN_IFMT ifmt_mvui ATTRIBUTE_UNUSED = {
109 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
112 static const CGEN_IFMT ifmt_mvhi ATTRIBUTE_UNUSED = {
113 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
116 static const CGEN_IFMT ifmt_mva ATTRIBUTE_UNUSED = {
117 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
120 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
121 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
124 static const CGEN_IFMT ifmt_lwgotrel ATTRIBUTE_UNUSED = {
125 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
128 static const CGEN_IFMT ifmt_orhigotoffi ATTRIBUTE_UNUSED = {
129 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
132 static const CGEN_IFMT ifmt_addgotoff ATTRIBUTE_UNUSED = {
133 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
138 #define A(a) (1 << CGEN_INSN_##a)
139 #define OPERAND(op) LM32_OPERAND_##op
140 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
141 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
143 /* The instruction table. */
145 static const CGEN_OPCODE lm32_cgen_insn_opcode_table[MAX_INSNS] =
147 /* Special null first entry.
148 A `num' value of zero is thus invalid.
149 Also, the special `invalid' insn resides here. */
150 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
151 /* add $r2,$r0,$r1 */
154 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
155 & ifmt_add, { 0xb4000000 }
157 /* addi $r1,$r0,$imm */
160 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
161 & ifmt_addi, { 0x34000000 }
163 /* and $r2,$r0,$r1 */
166 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
167 & ifmt_add, { 0xa0000000 }
169 /* andi $r1,$r0,$uimm */
172 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
173 & ifmt_andi, { 0x20000000 }
175 /* andhi $r1,$r0,$hi16 */
178 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
179 & ifmt_andhii, { 0x60000000 }
184 { { MNEM, ' ', OP (R0), 0 } },
185 & ifmt_b, { 0xc0000000 }
190 { { MNEM, ' ', OP (CALL), 0 } },
191 & ifmt_bi, { 0xe0000000 }
193 /* be $r0,$r1,$branch */
196 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
197 & ifmt_be, { 0x44000000 }
199 /* bg $r0,$r1,$branch */
202 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
203 & ifmt_be, { 0x48000000 }
205 /* bge $r0,$r1,$branch */
208 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
209 & ifmt_be, { 0x4c000000 }
211 /* bgeu $r0,$r1,$branch */
214 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
215 & ifmt_be, { 0x50000000 }
217 /* bgu $r0,$r1,$branch */
220 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
221 & ifmt_be, { 0x54000000 }
223 /* bne $r0,$r1,$branch */
226 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
227 & ifmt_be, { 0x5c000000 }
232 { { MNEM, ' ', OP (R0), 0 } },
233 & ifmt_b, { 0xd8000000 }
238 { { MNEM, ' ', OP (CALL), 0 } },
239 & ifmt_bi, { 0xf8000000 }
241 /* cmpe $r2,$r0,$r1 */
244 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
245 & ifmt_add, { 0xe4000000 }
247 /* cmpei $r1,$r0,$imm */
250 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
251 & ifmt_addi, { 0x64000000 }
253 /* cmpg $r2,$r0,$r1 */
256 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
257 & ifmt_add, { 0xe8000000 }
259 /* cmpgi $r1,$r0,$imm */
262 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
263 & ifmt_addi, { 0x68000000 }
265 /* cmpge $r2,$r0,$r1 */
268 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
269 & ifmt_add, { 0xec000000 }
271 /* cmpgei $r1,$r0,$imm */
274 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
275 & ifmt_addi, { 0x6c000000 }
277 /* cmpgeu $r2,$r0,$r1 */
280 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
281 & ifmt_add, { 0xf0000000 }
283 /* cmpgeui $r1,$r0,$uimm */
286 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
287 & ifmt_andi, { 0x70000000 }
289 /* cmpgu $r2,$r0,$r1 */
292 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
293 & ifmt_add, { 0xf4000000 }
295 /* cmpgui $r1,$r0,$uimm */
298 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
299 & ifmt_andi, { 0x74000000 }
301 /* cmpne $r2,$r0,$r1 */
304 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
305 & ifmt_add, { 0xfc000000 }
307 /* cmpnei $r1,$r0,$imm */
310 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
311 & ifmt_addi, { 0x7c000000 }
313 /* divu $r2,$r0,$r1 */
316 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
317 & ifmt_add, { 0x8c000000 }
319 /* lb $r1,($r0+$imm) */
322 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
323 & ifmt_addi, { 0x10000000 }
325 /* lbu $r1,($r0+$imm) */
328 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
329 & ifmt_addi, { 0x40000000 }
331 /* lh $r1,($r0+$imm) */
334 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
335 & ifmt_addi, { 0x1c000000 }
337 /* lhu $r1,($r0+$imm) */
340 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
341 & ifmt_addi, { 0x2c000000 }
343 /* lw $r1,($r0+$imm) */
346 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
347 & ifmt_addi, { 0x28000000 }
349 /* modu $r2,$r0,$r1 */
352 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
353 & ifmt_add, { 0xc4000000 }
355 /* mul $r2,$r0,$r1 */
358 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
359 & ifmt_add, { 0x88000000 }
361 /* muli $r1,$r0,$imm */
364 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
365 & ifmt_addi, { 0x8000000 }
367 /* nor $r2,$r0,$r1 */
370 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
371 & ifmt_add, { 0x84000000 }
373 /* nori $r1,$r0,$uimm */
376 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
377 & ifmt_andi, { 0x4000000 }
382 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
383 & ifmt_add, { 0xb8000000 }
385 /* ori $r1,$r0,$lo16 */
388 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
389 & ifmt_ori, { 0x38000000 }
391 /* orhi $r1,$r0,$hi16 */
394 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
395 & ifmt_andhii, { 0x78000000 }
400 { { MNEM, ' ', OP (R2), ',', OP (CSR), 0 } },
401 & ifmt_rcsr, { 0x90000000 }
403 /* sb ($r0+$imm),$r1 */
406 { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
407 & ifmt_addi, { 0x30000000 }
412 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
413 & ifmt_sextb, { 0xb0000000 }
418 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
419 & ifmt_sextb, { 0xdc000000 }
421 /* sh ($r0+$imm),$r1 */
424 { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
425 & ifmt_addi, { 0xc000000 }
430 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
431 & ifmt_add, { 0xbc000000 }
433 /* sli $r1,$r0,$imm */
436 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
437 & ifmt_addi, { 0x3c000000 }
442 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
443 & ifmt_add, { 0x94000000 }
445 /* sri $r1,$r0,$imm */
448 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
449 & ifmt_addi, { 0x14000000 }
451 /* sru $r2,$r0,$r1 */
454 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
455 & ifmt_add, { 0x80000000 }
457 /* srui $r1,$r0,$imm */
460 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
463 /* sub $r2,$r0,$r1 */
466 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
467 & ifmt_add, { 0xc8000000 }
469 /* sw ($r0+$imm),$r1 */
472 { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
473 & ifmt_addi, { 0x58000000 }
475 /* user $r2,$r0,$r1,$user */
478 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), ',', OP (USER), 0 } },
479 & ifmt_user, { 0xcc000000 }
484 { { MNEM, ' ', OP (CSR), ',', OP (R1), 0 } },
485 & ifmt_wcsr, { 0xd0000000 }
487 /* xor $r2,$r0,$r1 */
490 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
491 & ifmt_add, { 0x98000000 }
493 /* xori $r1,$r0,$uimm */
496 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
497 & ifmt_andi, { 0x18000000 }
499 /* xnor $r2,$r0,$r1 */
502 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
503 & ifmt_add, { 0xa4000000 }
505 /* xnori $r1,$r0,$uimm */
508 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
509 & ifmt_andi, { 0x24000000 }
515 & ifmt_break, { 0xac000002 }
521 & ifmt_break, { 0xac000007 }
527 & ifmt_bret, { 0xc3e00000 }
533 & ifmt_bret, { 0xc3c00000 }
539 & ifmt_bret, { 0xc3a00000 }
544 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
545 & ifmt_sextb, { 0xb8000000 }
550 { { MNEM, ' ', OP (R1), ',', OP (IMM), 0 } },
551 & ifmt_mvi, { 0x34000000 }
556 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
557 & ifmt_mvui, { 0x38000000 }
562 { { MNEM, ' ', OP (R1), ',', OP (HI16), 0 } },
563 & ifmt_mvhi, { 0x78000000 }
568 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
569 & ifmt_mva, { 0x37400000 }
574 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
575 & ifmt_sextb, { 0xa4000000 }
581 & ifmt_nop, { 0x34000000 }
586 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
587 & ifmt_mva, { 0x13400000 }
592 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
593 & ifmt_mva, { 0x43400000 }
598 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
599 & ifmt_mva, { 0x1f400000 }
604 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
605 & ifmt_mva, { 0x2f400000 }
610 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
611 & ifmt_mva, { 0x2b400000 }
616 { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
617 & ifmt_mva, { 0x33400000 }
622 { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
623 & ifmt_mva, { 0xf400000 }
628 { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
629 & ifmt_mva, { 0x5b400000 }
631 /* lw $r1,(gp+$got16) */
634 { { MNEM, ' ', OP (R1), ',', '(', 'g', 'p', '+', OP (GOT16), ')', 0 } },
635 & ifmt_lwgotrel, { 0x2b400000 }
637 /* orhi $r1,$r0,$gotoffhi16 */
640 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (GOTOFFHI16), 0 } },
641 & ifmt_orhigotoffi, { 0x78000000 }
643 /* addi $r1,$r0,$gotofflo16 */
646 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (GOTOFFLO16), 0 } },
647 & ifmt_addgotoff, { 0x34000000 }
649 /* sw ($r0+$gotofflo16),$r1 */
652 { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
653 & ifmt_addgotoff, { 0x58000000 }
655 /* lw $r1,($r0+$gotofflo16) */
658 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
659 & ifmt_addgotoff, { 0x28000000 }
661 /* sh ($r0+$gotofflo16),$r1 */
664 { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
665 & ifmt_addgotoff, { 0xc000000 }
667 /* lh $r1,($r0+$gotofflo16) */
670 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
671 & ifmt_addgotoff, { 0x1c000000 }
673 /* lhu $r1,($r0+$gotofflo16) */
676 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
677 & ifmt_addgotoff, { 0x2c000000 }
679 /* sb ($r0+$gotofflo16),$r1 */
682 { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
683 & ifmt_addgotoff, { 0x30000000 }
685 /* lb $r1,($r0+$gotofflo16) */
688 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
689 & ifmt_addgotoff, { 0x10000000 }
691 /* lbu $r1,($r0+$gotofflo16) */
694 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
695 & ifmt_addgotoff, { 0x40000000 }
704 /* Formats for ALIAS macro-insns. */
706 #define F(f) & lm32_cgen_ifld_table[LM32_##f]
709 /* Each non-simple macro entry points to an array of expansion possibilities. */
711 #define A(a) (1 << CGEN_INSN_##a)
712 #define OPERAND(op) LM32_OPERAND_##op
713 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
714 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
716 /* The macro instruction table. */
718 static const CGEN_IBASE lm32_cgen_macro_insn_table[] =
722 /* The macro instruction opcode table. */
724 static const CGEN_OPCODE lm32_cgen_macro_insn_opcode_table[] =
733 #ifndef CGEN_ASM_HASH_P
734 #define CGEN_ASM_HASH_P(insn) 1
737 #ifndef CGEN_DIS_HASH_P
738 #define CGEN_DIS_HASH_P(insn) 1
741 /* Return non-zero if INSN is to be added to the hash table.
742 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
745 asm_hash_insn_p (insn)
746 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
748 return CGEN_ASM_HASH_P (insn);
752 dis_hash_insn_p (insn)
753 const CGEN_INSN *insn;
755 /* If building the hash table and the NO-DIS attribute is present,
757 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
759 return CGEN_DIS_HASH_P (insn);
762 #ifndef CGEN_ASM_HASH
763 #define CGEN_ASM_HASH_SIZE 127
764 #ifdef CGEN_MNEMONIC_OPERANDS
765 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
767 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
771 /* It doesn't make much sense to provide a default here,
772 but while this is under development we do.
773 BUFFER is a pointer to the bytes of the insn, target order.
774 VALUE is the first base_insn_bitsize bits as an int in host order. */
776 #ifndef CGEN_DIS_HASH
777 #define CGEN_DIS_HASH_SIZE 256
778 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
781 /* The result is the hash value of the insn.
782 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
788 return CGEN_ASM_HASH (mnem);
791 /* BUF is a pointer to the bytes of the insn, target order.
792 VALUE is the first base_insn_bitsize bits as an int in host order. */
795 dis_hash_insn (buf, value)
796 const char * buf ATTRIBUTE_UNUSED;
797 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
799 return CGEN_DIS_HASH (buf, value);
802 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
805 set_fields_bitsize (CGEN_FIELDS *fields, int size)
807 CGEN_FIELDS_BITSIZE (fields) = size;
810 /* Function to call before using the operand instance table.
811 This plugs the opcode entries and macro instructions into the cpu table. */
814 lm32_cgen_init_opcode_table (CGEN_CPU_DESC cd)
817 int num_macros = (sizeof (lm32_cgen_macro_insn_table) /
818 sizeof (lm32_cgen_macro_insn_table[0]));
819 const CGEN_IBASE *ib = & lm32_cgen_macro_insn_table[0];
820 const CGEN_OPCODE *oc = & lm32_cgen_macro_insn_opcode_table[0];
821 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
823 /* This test has been added to avoid a warning generated
824 if memset is called with a third argument of value zero. */
826 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
827 for (i = 0; i < num_macros; ++i)
829 insns[i].base = &ib[i];
830 insns[i].opcode = &oc[i];
831 lm32_cgen_build_insn_regex (& insns[i]);
833 cd->macro_insn_table.init_entries = insns;
834 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
835 cd->macro_insn_table.num_init_entries = num_macros;
837 oc = & lm32_cgen_insn_opcode_table[0];
838 insns = (CGEN_INSN *) cd->insn_table.init_entries;
839 for (i = 0; i < MAX_INSNS; ++i)
841 insns[i].opcode = &oc[i];
842 lm32_cgen_build_insn_regex (& insns[i]);
845 cd->sizeof_fields = sizeof (CGEN_FIELDS);
846 cd->set_fields_bitsize = set_fields_bitsize;
848 cd->asm_hash_p = asm_hash_insn_p;
849 cd->asm_hash = asm_hash_insn;
850 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
852 cd->dis_hash_p = dis_hash_insn_p;
853 cd->dis_hash = dis_hash_insn;
854 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;