1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
7 Copyright (C) 1996-2015 Free Software Foundation, Inc.
9 This file is part of libopcodes.
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "libiberty.h"
35 #include "iq2000-desc.h"
36 #include "iq2000-opc.h"
39 /* Default text to print if an instruction isn't recognized. */
40 #define UNKNOWN_INSN_MSG _("*unknown*")
42 static void print_normal
43 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
44 static void print_address
45 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
46 static void print_keyword
47 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
48 static void print_insn_normal
49 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
52 static int default_print_insn
53 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
58 /* -- disassembler routines inserted here. */
61 void iq2000_cgen_print_operand
62 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
64 /* Main entry point for printing operands.
65 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
66 of dis-asm.h on cgen.h.
68 This function is basically just a big switch statement. Earlier versions
69 used tables to look up the function to use, but
70 - if the table contains both assembler and disassembler functions then
71 the disassembler contains much of the assembler and vice-versa,
72 - there's a lot of inlining possibilities as things grow,
73 - using a switch statement avoids the function call overhead.
75 This function could be moved into `print_insn_normal', but keeping it
76 separate makes clear the interface between `print_insn_normal' and each of
80 iq2000_cgen_print_operand (CGEN_CPU_DESC cd,
84 void const *attrs ATTRIBUTE_UNUSED,
88 disassemble_info *info = (disassemble_info *) xinfo;
92 case IQ2000_OPERAND__INDEX :
93 print_normal (cd, info, fields->f_index, 0, pc, length);
95 case IQ2000_OPERAND_BASE :
96 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0);
98 case IQ2000_OPERAND_BASEOFF :
99 print_address (cd, info, fields->f_imm, 0, pc, length);
101 case IQ2000_OPERAND_BITNUM :
102 print_normal (cd, info, fields->f_rt, 0, pc, length);
104 case IQ2000_OPERAND_BYTECOUNT :
105 print_normal (cd, info, fields->f_bytecount, 0, pc, length);
107 case IQ2000_OPERAND_CAM_Y :
108 print_normal (cd, info, fields->f_cam_y, 0, pc, length);
110 case IQ2000_OPERAND_CAM_Z :
111 print_normal (cd, info, fields->f_cam_z, 0, pc, length);
113 case IQ2000_OPERAND_CM_3FUNC :
114 print_normal (cd, info, fields->f_cm_3func, 0, pc, length);
116 case IQ2000_OPERAND_CM_3Z :
117 print_normal (cd, info, fields->f_cm_3z, 0, pc, length);
119 case IQ2000_OPERAND_CM_4FUNC :
120 print_normal (cd, info, fields->f_cm_4func, 0, pc, length);
122 case IQ2000_OPERAND_CM_4Z :
123 print_normal (cd, info, fields->f_cm_4z, 0, pc, length);
125 case IQ2000_OPERAND_COUNT :
126 print_normal (cd, info, fields->f_count, 0, pc, length);
128 case IQ2000_OPERAND_EXECODE :
129 print_normal (cd, info, fields->f_excode, 0, pc, length);
131 case IQ2000_OPERAND_HI16 :
132 print_normal (cd, info, fields->f_imm, 0, pc, length);
134 case IQ2000_OPERAND_IMM :
135 print_normal (cd, info, fields->f_imm, 0, pc, length);
137 case IQ2000_OPERAND_JMPTARG :
138 print_address (cd, info, fields->f_jtarg, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
140 case IQ2000_OPERAND_JMPTARGQ10 :
141 print_address (cd, info, fields->f_jtargq10, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
143 case IQ2000_OPERAND_LO16 :
144 print_normal (cd, info, fields->f_imm, 0, pc, length);
146 case IQ2000_OPERAND_MASK :
147 print_normal (cd, info, fields->f_mask, 0, pc, length);
149 case IQ2000_OPERAND_MASKL :
150 print_normal (cd, info, fields->f_maskl, 0, pc, length);
152 case IQ2000_OPERAND_MASKQ10 :
153 print_normal (cd, info, fields->f_maskq10, 0, pc, length);
155 case IQ2000_OPERAND_MASKR :
156 print_normal (cd, info, fields->f_rs, 0, pc, length);
158 case IQ2000_OPERAND_MLO16 :
159 print_normal (cd, info, fields->f_imm, 0, pc, length);
161 case IQ2000_OPERAND_OFFSET :
162 print_address (cd, info, fields->f_offset, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
164 case IQ2000_OPERAND_RD :
165 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd, 0);
167 case IQ2000_OPERAND_RD_RS :
168 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd_rs, 0|(1<<CGEN_OPERAND_VIRTUAL));
170 case IQ2000_OPERAND_RD_RT :
171 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd_rt, 0|(1<<CGEN_OPERAND_VIRTUAL));
173 case IQ2000_OPERAND_RS :
174 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0);
176 case IQ2000_OPERAND_RT :
177 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rt, 0);
179 case IQ2000_OPERAND_RT_RS :
180 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rt_rs, 0|(1<<CGEN_OPERAND_VIRTUAL));
182 case IQ2000_OPERAND_SHAMT :
183 print_normal (cd, info, fields->f_shamt, 0, pc, length);
187 /* xgettext:c-format */
188 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
194 cgen_print_fn * const iq2000_cgen_print_handlers[] =
201 iq2000_cgen_init_dis (CGEN_CPU_DESC cd)
203 iq2000_cgen_init_opcode_table (cd);
204 iq2000_cgen_init_ibld_table (cd);
205 cd->print_handlers = & iq2000_cgen_print_handlers[0];
206 cd->print_operand = iq2000_cgen_print_operand;
210 /* Default print handler. */
213 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
217 bfd_vma pc ATTRIBUTE_UNUSED,
218 int length ATTRIBUTE_UNUSED)
220 disassemble_info *info = (disassemble_info *) dis_info;
222 /* Print the operand as directed by the attributes. */
223 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
224 ; /* nothing to do */
225 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
226 (*info->fprintf_func) (info->stream, "%ld", value);
228 (*info->fprintf_func) (info->stream, "0x%lx", value);
231 /* Default address handler. */
234 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
238 bfd_vma pc ATTRIBUTE_UNUSED,
239 int length ATTRIBUTE_UNUSED)
241 disassemble_info *info = (disassemble_info *) dis_info;
243 /* Print the operand as directed by the attributes. */
244 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
245 ; /* Nothing to do. */
246 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
247 (*info->print_address_func) (value, info);
248 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
249 (*info->print_address_func) (value, info);
250 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
251 (*info->fprintf_func) (info->stream, "%ld", (long) value);
253 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
256 /* Keyword print handler. */
259 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
261 CGEN_KEYWORD *keyword_table,
263 unsigned int attrs ATTRIBUTE_UNUSED)
265 disassemble_info *info = (disassemble_info *) dis_info;
266 const CGEN_KEYWORD_ENTRY *ke;
268 ke = cgen_keyword_lookup_value (keyword_table, value);
270 (*info->fprintf_func) (info->stream, "%s", ke->name);
272 (*info->fprintf_func) (info->stream, "???");
275 /* Default insn printer.
277 DIS_INFO is defined as `void *' so the disassembler needn't know anything
278 about disassemble_info. */
281 print_insn_normal (CGEN_CPU_DESC cd,
283 const CGEN_INSN *insn,
288 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
289 disassemble_info *info = (disassemble_info *) dis_info;
290 const CGEN_SYNTAX_CHAR_TYPE *syn;
292 CGEN_INIT_PRINT (cd);
294 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
296 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
298 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
301 if (CGEN_SYNTAX_CHAR_P (*syn))
303 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
307 /* We have an operand. */
308 iq2000_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
309 fields, CGEN_INSN_ATTRS (insn), pc, length);
313 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
315 Returns 0 if all is well, non-zero otherwise. */
318 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
320 disassemble_info *info,
323 CGEN_EXTRACT_INFO *ex_info,
324 unsigned long *insn_value)
326 int status = (*info->read_memory_func) (pc, buf, buflen, info);
330 (*info->memory_error_func) (status, pc, info);
334 ex_info->dis_info = info;
335 ex_info->valid = (1 << buflen) - 1;
336 ex_info->insn_bytes = buf;
338 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
342 /* Utility to print an insn.
343 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
344 The result is the size of the insn in bytes or zero for an unknown insn
345 or -1 if an error occurs fetching data (memory_error_func will have
349 print_insn (CGEN_CPU_DESC cd,
351 disassemble_info *info,
355 CGEN_INSN_INT insn_value;
356 const CGEN_INSN_LIST *insn_list;
357 CGEN_EXTRACT_INFO ex_info;
360 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
361 basesize = cd->base_insn_bitsize < buflen * 8 ?
362 cd->base_insn_bitsize : buflen * 8;
363 insn_value = cgen_get_insn_value (cd, buf, basesize);
366 /* Fill in ex_info fields like read_insn would. Don't actually call
367 read_insn, since the incoming buffer is already read (and possibly
368 modified a la m32r). */
369 ex_info.valid = (1 << buflen) - 1;
370 ex_info.dis_info = info;
371 ex_info.insn_bytes = buf;
373 /* The instructions are stored in hash lists.
374 Pick the first one and keep trying until we find the right one. */
376 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
377 while (insn_list != NULL)
379 const CGEN_INSN *insn = insn_list->insn;
382 unsigned long insn_value_cropped;
384 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
385 /* Not needed as insn shouldn't be in hash lists if not supported. */
386 /* Supported by this cpu? */
387 if (! iq2000_cgen_insn_supported (cd, insn))
389 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
394 /* Basic bit mask must be correct. */
395 /* ??? May wish to allow target to defer this check until the extract
398 /* Base size may exceed this instruction's size. Extract the
399 relevant part from the buffer. */
400 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
401 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
402 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
403 info->endian == BFD_ENDIAN_BIG);
405 insn_value_cropped = insn_value;
407 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
408 == CGEN_INSN_BASE_VALUE (insn))
410 /* Printing is handled in two passes. The first pass parses the
411 machine insn and extracts the fields. The second pass prints
414 /* Make sure the entire insn is loaded into insn_value, if it
416 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
417 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
419 unsigned long full_insn_value;
420 int rc = read_insn (cd, pc, info, buf,
421 CGEN_INSN_BITSIZE (insn) / 8,
422 & ex_info, & full_insn_value);
425 length = CGEN_EXTRACT_FN (cd, insn)
426 (cd, insn, &ex_info, full_insn_value, &fields, pc);
429 length = CGEN_EXTRACT_FN (cd, insn)
430 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
432 /* Length < 0 -> error. */
437 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
438 /* Length is in bits, result is in bytes. */
443 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
449 /* Default value for CGEN_PRINT_INSN.
450 The result is the size of the insn in bytes or zero for an unknown insn
451 or -1 if an error occured fetching bytes. */
453 #ifndef CGEN_PRINT_INSN
454 #define CGEN_PRINT_INSN default_print_insn
458 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
460 bfd_byte buf[CGEN_MAX_INSN_SIZE];
464 /* Attempt to read the base part of the insn. */
465 buflen = cd->base_insn_bitsize / 8;
466 status = (*info->read_memory_func) (pc, buf, buflen, info);
468 /* Try again with the minimum part, if min < base. */
469 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
471 buflen = cd->min_insn_bitsize / 8;
472 status = (*info->read_memory_func) (pc, buf, buflen, info);
477 (*info->memory_error_func) (status, pc, info);
481 return print_insn (cd, pc, info, buf, buflen);
485 Print one instruction from PC on INFO->STREAM.
486 Return the size of the instruction (in bytes). */
488 typedef struct cpu_desc_list
490 struct cpu_desc_list *next;
498 print_insn_iq2000 (bfd_vma pc, disassemble_info *info)
500 static cpu_desc_list *cd_list = 0;
501 cpu_desc_list *cl = 0;
502 static CGEN_CPU_DESC cd = 0;
503 static CGEN_BITSET *prev_isa;
504 static int prev_mach;
505 static int prev_endian;
509 int endian = (info->endian == BFD_ENDIAN_BIG
511 : CGEN_ENDIAN_LITTLE);
512 enum bfd_architecture arch;
514 /* ??? gdb will set mach but leave the architecture as "unknown" */
515 #ifndef CGEN_BFD_ARCH
516 #define CGEN_BFD_ARCH bfd_arch_iq2000
519 if (arch == bfd_arch_unknown)
520 arch = CGEN_BFD_ARCH;
522 /* There's no standard way to compute the machine or isa number
523 so we leave it to the target. */
524 #ifdef CGEN_COMPUTE_MACH
525 mach = CGEN_COMPUTE_MACH (info);
530 #ifdef CGEN_COMPUTE_ISA
532 static CGEN_BITSET *permanent_isa;
535 permanent_isa = cgen_bitset_create (MAX_ISAS);
537 cgen_bitset_clear (isa);
538 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
541 isa = info->insn_sets;
544 /* If we've switched cpu's, try to find a handle we've used before */
546 && (cgen_bitset_compare (isa, prev_isa) != 0
548 || endian != prev_endian))
551 for (cl = cd_list; cl; cl = cl->next)
553 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
555 cl->endian == endian)
564 /* If we haven't initialized yet, initialize the opcode table. */
567 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
568 const char *mach_name;
572 mach_name = arch_type->printable_name;
574 prev_isa = cgen_bitset_copy (isa);
576 prev_endian = endian;
577 cd = iq2000_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
578 CGEN_CPU_OPEN_BFDMACH, mach_name,
579 CGEN_CPU_OPEN_ENDIAN, prev_endian,
584 /* Save this away for future reference. */
585 cl = xmalloc (sizeof (struct cpu_desc_list));
593 iq2000_cgen_init_dis (cd);
596 /* We try to have as much common code as possible.
597 But at this point some targets need to take over. */
598 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
599 but if not possible try to move this hook elsewhere rather than
601 length = CGEN_PRINT_INSN (cd, pc, info);
607 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
608 return cd->default_insn_bitsize / 8;