1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
39 #include "opcode/i386.h"
43 static int fetch_data (struct disassemble_info *, bfd_byte *);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma, disassemble_info *);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma);
55 static void print_displacement (char *, bfd_vma);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma get64 (void);
59 static bfd_signed_vma get32 (void);
60 static bfd_signed_vma get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma, int);
63 static void OP_Skip_MODRM (int, int);
64 static void OP_REG (int, int);
65 static void OP_IMREG (int, int);
66 static void OP_I (int, int);
67 static void OP_I64 (int, int);
68 static void OP_sI (int, int);
69 static void OP_J (int, int);
70 static void OP_SEG (int, int);
71 static void OP_DIR (int, int);
72 static void OP_OFF (int, int);
73 static void OP_OFF64 (int, int);
74 static void ptr_reg (int, int);
75 static void OP_ESreg (int, int);
76 static void OP_DSreg (int, int);
77 static void OP_C (int, int);
78 static void OP_D (int, int);
79 static void OP_T (int, int);
80 static void OP_R (int, int);
81 static void OP_MMX (int, int);
82 static void OP_XMM (int, int);
83 static void OP_EM (int, int);
84 static void OP_EX (int, int);
85 static void OP_EMC (int,int);
86 static void OP_MXC (int,int);
87 static void OP_MS (int, int);
88 static void OP_XS (int, int);
89 static void OP_M (int, int);
90 static void OP_0f07 (int, int);
91 static void OP_Monitor (int, int);
92 static void OP_Mwait (int, int);
93 static void NOP_Fixup1 (int, int);
94 static void NOP_Fixup2 (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SVME_Fixup (int, int);
98 static void BadOp (void);
99 static void REP_Fixup (int, int);
100 static void CMPXCHG8B_Fixup (int, int);
101 static void XMM_Fixup (int, int);
102 static void CRC32_Fixup (int, int);
105 /* Points to first byte not fetched. */
106 bfd_byte *max_fetched;
107 bfd_byte the_buffer[MAX_MNEM_SIZE];
120 enum address_mode address_mode;
122 /* Flags for the prefixes for the current instruction. See below. */
125 /* REX prefix the current instruction. See below. */
127 /* Bits of REX we've already used. */
129 /* Mark parts used in the REX prefix. When we are testing for
130 empty prefix (for 8bit register REX extension), just mask it
131 out. Otherwise test for REX bit is excuse for existence of REX
132 only in case value is nonzero. */
133 #define USED_REX(value) \
138 rex_used |= (value) | REX_OPCODE; \
141 rex_used |= REX_OPCODE; \
144 /* Flags for prefixes which we somehow handled when printing the
145 current instruction. */
146 static int used_prefixes;
148 /* Flags stored in PREFIXES. */
149 #define PREFIX_REPZ 1
150 #define PREFIX_REPNZ 2
151 #define PREFIX_LOCK 4
153 #define PREFIX_SS 0x10
154 #define PREFIX_DS 0x20
155 #define PREFIX_ES 0x40
156 #define PREFIX_FS 0x80
157 #define PREFIX_GS 0x100
158 #define PREFIX_DATA 0x200
159 #define PREFIX_ADDR 0x400
160 #define PREFIX_FWAIT 0x800
162 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
163 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
165 #define FETCH_DATA(info, addr) \
166 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
167 ? 1 : fetch_data ((info), (addr)))
170 fetch_data (struct disassemble_info *info, bfd_byte *addr)
173 struct dis_private *priv = (struct dis_private *) info->private_data;
174 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
176 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
177 status = (*info->read_memory_func) (start,
179 addr - priv->max_fetched,
185 /* If we did manage to read at least one byte, then
186 print_insn_i386 will do something sensible. Otherwise, print
187 an error. We do that here because this is where we know
189 if (priv->max_fetched == priv->the_buffer)
190 (*info->memory_error_func) (status, start, info);
191 longjmp (priv->bailout, 1);
194 priv->max_fetched = addr;
198 #define XX { NULL, 0 }
200 #define Eb { OP_E, b_mode }
201 #define Ev { OP_E, v_mode }
202 #define Ed { OP_E, d_mode }
203 #define Edq { OP_E, dq_mode }
204 #define Edqw { OP_E, dqw_mode }
205 #define Edqb { OP_E, dqb_mode }
206 #define Edqd { OP_E, dqd_mode }
207 #define Eq { OP_E, q_mode }
208 #define indirEv { OP_indirE, stack_v_mode }
209 #define indirEp { OP_indirE, f_mode }
210 #define stackEv { OP_E, stack_v_mode }
211 #define Em { OP_E, m_mode }
212 #define Ew { OP_E, w_mode }
213 #define M { OP_M, 0 } /* lea, lgdt, etc. */
214 #define Ma { OP_M, v_mode }
215 #define Mb { OP_M, b_mode }
216 #define Md { OP_M, d_mode }
217 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
218 #define Mq { OP_M, q_mode }
219 #define Gb { OP_G, b_mode }
220 #define Gv { OP_G, v_mode }
221 #define Gd { OP_G, d_mode }
222 #define Gdq { OP_G, dq_mode }
223 #define Gm { OP_G, m_mode }
224 #define Gw { OP_G, w_mode }
225 #define Rd { OP_R, d_mode }
226 #define Rm { OP_R, m_mode }
227 #define Ib { OP_I, b_mode }
228 #define sIb { OP_sI, b_mode } /* sign extened byte */
229 #define Iv { OP_I, v_mode }
230 #define Iq { OP_I, q_mode }
231 #define Iv64 { OP_I64, v_mode }
232 #define Iw { OP_I, w_mode }
233 #define I1 { OP_I, const_1_mode }
234 #define Jb { OP_J, b_mode }
235 #define Jv { OP_J, v_mode }
236 #define Cm { OP_C, m_mode }
237 #define Dm { OP_D, m_mode }
238 #define Td { OP_T, d_mode }
239 #define Skip_MODRM { OP_Skip_MODRM, 0 }
241 #define RMeAX { OP_REG, eAX_reg }
242 #define RMeBX { OP_REG, eBX_reg }
243 #define RMeCX { OP_REG, eCX_reg }
244 #define RMeDX { OP_REG, eDX_reg }
245 #define RMeSP { OP_REG, eSP_reg }
246 #define RMeBP { OP_REG, eBP_reg }
247 #define RMeSI { OP_REG, eSI_reg }
248 #define RMeDI { OP_REG, eDI_reg }
249 #define RMrAX { OP_REG, rAX_reg }
250 #define RMrBX { OP_REG, rBX_reg }
251 #define RMrCX { OP_REG, rCX_reg }
252 #define RMrDX { OP_REG, rDX_reg }
253 #define RMrSP { OP_REG, rSP_reg }
254 #define RMrBP { OP_REG, rBP_reg }
255 #define RMrSI { OP_REG, rSI_reg }
256 #define RMrDI { OP_REG, rDI_reg }
257 #define RMAL { OP_REG, al_reg }
258 #define RMAL { OP_REG, al_reg }
259 #define RMCL { OP_REG, cl_reg }
260 #define RMDL { OP_REG, dl_reg }
261 #define RMBL { OP_REG, bl_reg }
262 #define RMAH { OP_REG, ah_reg }
263 #define RMCH { OP_REG, ch_reg }
264 #define RMDH { OP_REG, dh_reg }
265 #define RMBH { OP_REG, bh_reg }
266 #define RMAX { OP_REG, ax_reg }
267 #define RMDX { OP_REG, dx_reg }
269 #define eAX { OP_IMREG, eAX_reg }
270 #define eBX { OP_IMREG, eBX_reg }
271 #define eCX { OP_IMREG, eCX_reg }
272 #define eDX { OP_IMREG, eDX_reg }
273 #define eSP { OP_IMREG, eSP_reg }
274 #define eBP { OP_IMREG, eBP_reg }
275 #define eSI { OP_IMREG, eSI_reg }
276 #define eDI { OP_IMREG, eDI_reg }
277 #define AL { OP_IMREG, al_reg }
278 #define CL { OP_IMREG, cl_reg }
279 #define DL { OP_IMREG, dl_reg }
280 #define BL { OP_IMREG, bl_reg }
281 #define AH { OP_IMREG, ah_reg }
282 #define CH { OP_IMREG, ch_reg }
283 #define DH { OP_IMREG, dh_reg }
284 #define BH { OP_IMREG, bh_reg }
285 #define AX { OP_IMREG, ax_reg }
286 #define DX { OP_IMREG, dx_reg }
287 #define zAX { OP_IMREG, z_mode_ax_reg }
288 #define indirDX { OP_IMREG, indir_dx_reg }
290 #define Sw { OP_SEG, w_mode }
291 #define Sv { OP_SEG, v_mode }
292 #define Ap { OP_DIR, 0 }
293 #define Ob { OP_OFF64, b_mode }
294 #define Ov { OP_OFF64, v_mode }
295 #define Xb { OP_DSreg, eSI_reg }
296 #define Xv { OP_DSreg, eSI_reg }
297 #define Xz { OP_DSreg, eSI_reg }
298 #define Yb { OP_ESreg, eDI_reg }
299 #define Yv { OP_ESreg, eDI_reg }
300 #define DSBX { OP_DSreg, eBX_reg }
302 #define es { OP_REG, es_reg }
303 #define ss { OP_REG, ss_reg }
304 #define cs { OP_REG, cs_reg }
305 #define ds { OP_REG, ds_reg }
306 #define fs { OP_REG, fs_reg }
307 #define gs { OP_REG, gs_reg }
309 #define MX { OP_MMX, 0 }
310 #define XM { OP_XMM, 0 }
311 #define EM { OP_EM, v_mode }
312 #define EMd { OP_EM, d_mode }
313 #define EMx { OP_EM, x_mode }
314 #define EXw { OP_EX, w_mode }
315 #define EXd { OP_EX, d_mode }
316 #define EXq { OP_EX, q_mode }
317 #define EXx { OP_EX, x_mode }
318 #define MS { OP_MS, v_mode }
319 #define XS { OP_XS, v_mode }
320 #define EMCq { OP_EMC, q_mode }
321 #define MXC { OP_MXC, 0 }
322 #define OPSUF { OP_3DNowSuffix, 0 }
323 #define OPSIMD { OP_SIMD_Suffix, 0 }
324 #define XMM0 { XMM_Fixup, 0 }
326 /* Used handle "rep" prefix for string instructions. */
327 #define Xbr { REP_Fixup, eSI_reg }
328 #define Xvr { REP_Fixup, eSI_reg }
329 #define Ybr { REP_Fixup, eDI_reg }
330 #define Yvr { REP_Fixup, eDI_reg }
331 #define Yzr { REP_Fixup, eDI_reg }
332 #define indirDXr { REP_Fixup, indir_dx_reg }
333 #define ALr { REP_Fixup, al_reg }
334 #define eAXr { REP_Fixup, eAX_reg }
336 #define cond_jump_flag { NULL, cond_jump_mode }
337 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
339 /* bits in sizeflag */
340 #define SUFFIX_ALWAYS 4
344 #define b_mode 1 /* byte operand */
345 #define v_mode 2 /* operand size depends on prefixes */
346 #define w_mode 3 /* word operand */
347 #define d_mode 4 /* double word operand */
348 #define q_mode 5 /* quad word operand */
349 #define t_mode 6 /* ten-byte operand */
350 #define x_mode 7 /* 16-byte XMM operand */
351 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
352 #define cond_jump_mode 9
353 #define loop_jcxz_mode 10
354 #define dq_mode 11 /* operand size depends on REX prefixes. */
355 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
356 #define f_mode 13 /* 4- or 6-byte pointer operand */
357 #define const_1_mode 14
358 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
359 #define z_mode 16 /* non-quad operand size depends on prefixes */
360 #define o_mode 17 /* 16-byte operand */
361 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
362 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
407 #define z_mode_ax_reg 149
408 #define indir_dx_reg 150
412 #define USE_PREFIX_USER_TABLE 3
413 #define X86_64_SPECIAL 4
414 #define IS_3BYTE_OPCODE 5
415 #define USE_OPC_EXT_TABLE 6
416 #define USE_OPC_EXT_RM_TABLE 7
418 #define FLOAT NULL, { { NULL, FLOATCODE } }
420 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
421 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
422 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
423 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
424 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
425 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
426 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
427 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
428 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
429 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
430 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
431 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
432 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
433 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
434 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
435 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
436 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
437 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
438 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
439 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
440 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
441 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
442 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
443 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
444 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
445 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
446 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
447 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
449 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
450 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
451 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
452 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
453 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
454 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
455 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
456 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
457 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
458 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
459 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
460 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
461 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
462 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
463 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
464 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
465 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
466 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
467 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
468 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
469 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
470 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
471 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
472 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
473 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
474 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
475 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
476 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
477 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
478 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
479 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
480 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
481 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
482 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
483 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
484 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
485 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
486 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
487 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
488 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
489 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
490 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
491 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
492 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
493 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
494 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
495 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
496 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
497 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
498 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
499 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
500 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
501 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
502 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
503 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
504 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
505 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
506 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
507 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
508 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
509 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
510 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
511 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
512 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
513 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
514 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
515 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
516 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
517 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
518 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
519 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
520 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
521 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
522 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
523 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
524 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
525 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
526 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
527 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
528 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
529 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
530 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
531 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
532 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
533 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
534 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
535 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
536 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
537 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
538 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
539 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
540 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
541 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
542 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
543 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
544 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
545 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
546 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
547 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
548 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
549 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
552 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
553 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
554 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
555 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
557 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
558 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
560 #define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
561 #define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
562 #define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
563 #define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
564 #define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
565 #define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
566 #define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
567 #define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
568 #define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
569 #define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
570 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
571 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
572 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
573 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
574 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
575 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
576 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
577 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
578 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
579 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
580 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
581 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
582 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
583 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
584 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
585 #define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
586 #define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
587 #define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
588 #define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
589 #define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
590 #define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
591 #define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
592 #define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
593 #define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
594 #define OPC_EXT_34 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 34 } }
595 #define OPC_EXT_35 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 35 } }
596 #define OPC_EXT_36 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 36 } }
597 #define OPC_EXT_37 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 37 } }
598 #define OPC_EXT_38 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 38 } }
600 #define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
601 #define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
602 #define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
603 #define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
604 #define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
605 #define OPC_EXT_RM_5 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 5 } }
607 typedef void (*op_rtn) (int bytemode, int sizeflag);
618 /* Upper case letters in the instruction names here are macros.
619 'A' => print 'b' if no register operands or suffix_always is true
620 'B' => print 'b' if suffix_always is true
621 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
623 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
624 . suffix_always is true
625 'E' => print 'e' if 32-bit form of jcxz
626 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
627 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
628 'H' => print ",pt" or ",pn" branch hint
629 'I' => honor following macro letter even in Intel mode (implemented only
630 . for some of the macro letters)
632 'K' => print 'd' or 'q' if rex prefix is present.
633 'L' => print 'l' if suffix_always is true
634 'N' => print 'n' if instruction has no wait "prefix"
635 'O' => print 'd' or 'o' (or 'q' in Intel mode)
636 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
637 . or suffix_always is true. print 'q' if rex prefix is present.
638 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
640 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
641 'S' => print 'w', 'l' or 'q' if suffix_always is true
642 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
643 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
644 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
645 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
646 'X' => print 's', 'd' depending on data16 prefix (for XMM)
647 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
648 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
650 Many of the above letters print nothing in Intel mode. See "putop"
653 Braces '{' and '}', and vertical bars '|', indicate alternative
654 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
655 modes. In cases where there are only two alternatives, the X86_64
656 instruction is reserved, and "(bad)" is printed.
659 static const struct dis386 dis386[] = {
661 { "addB", { Eb, Gb } },
662 { "addS", { Ev, Gv } },
663 { "addB", { Gb, Eb } },
664 { "addS", { Gv, Ev } },
665 { "addB", { AL, Ib } },
666 { "addS", { eAX, Iv } },
667 { "push{T|}", { es } },
668 { "pop{T|}", { es } },
670 { "orB", { Eb, Gb } },
671 { "orS", { Ev, Gv } },
672 { "orB", { Gb, Eb } },
673 { "orS", { Gv, Ev } },
674 { "orB", { AL, Ib } },
675 { "orS", { eAX, Iv } },
676 { "push{T|}", { cs } },
677 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
679 { "adcB", { Eb, Gb } },
680 { "adcS", { Ev, Gv } },
681 { "adcB", { Gb, Eb } },
682 { "adcS", { Gv, Ev } },
683 { "adcB", { AL, Ib } },
684 { "adcS", { eAX, Iv } },
685 { "push{T|}", { ss } },
686 { "pop{T|}", { ss } },
688 { "sbbB", { Eb, Gb } },
689 { "sbbS", { Ev, Gv } },
690 { "sbbB", { Gb, Eb } },
691 { "sbbS", { Gv, Ev } },
692 { "sbbB", { AL, Ib } },
693 { "sbbS", { eAX, Iv } },
694 { "push{T|}", { ds } },
695 { "pop{T|}", { ds } },
697 { "andB", { Eb, Gb } },
698 { "andS", { Ev, Gv } },
699 { "andB", { Gb, Eb } },
700 { "andS", { Gv, Ev } },
701 { "andB", { AL, Ib } },
702 { "andS", { eAX, Iv } },
703 { "(bad)", { XX } }, /* SEG ES prefix */
704 { "daa{|}", { XX } },
706 { "subB", { Eb, Gb } },
707 { "subS", { Ev, Gv } },
708 { "subB", { Gb, Eb } },
709 { "subS", { Gv, Ev } },
710 { "subB", { AL, Ib } },
711 { "subS", { eAX, Iv } },
712 { "(bad)", { XX } }, /* SEG CS prefix */
713 { "das{|}", { XX } },
715 { "xorB", { Eb, Gb } },
716 { "xorS", { Ev, Gv } },
717 { "xorB", { Gb, Eb } },
718 { "xorS", { Gv, Ev } },
719 { "xorB", { AL, Ib } },
720 { "xorS", { eAX, Iv } },
721 { "(bad)", { XX } }, /* SEG SS prefix */
722 { "aaa{|}", { XX } },
724 { "cmpB", { Eb, Gb } },
725 { "cmpS", { Ev, Gv } },
726 { "cmpB", { Gb, Eb } },
727 { "cmpS", { Gv, Ev } },
728 { "cmpB", { AL, Ib } },
729 { "cmpS", { eAX, Iv } },
730 { "(bad)", { XX } }, /* SEG DS prefix */
731 { "aas{|}", { XX } },
733 { "inc{S|}", { RMeAX } },
734 { "inc{S|}", { RMeCX } },
735 { "inc{S|}", { RMeDX } },
736 { "inc{S|}", { RMeBX } },
737 { "inc{S|}", { RMeSP } },
738 { "inc{S|}", { RMeBP } },
739 { "inc{S|}", { RMeSI } },
740 { "inc{S|}", { RMeDI } },
742 { "dec{S|}", { RMeAX } },
743 { "dec{S|}", { RMeCX } },
744 { "dec{S|}", { RMeDX } },
745 { "dec{S|}", { RMeBX } },
746 { "dec{S|}", { RMeSP } },
747 { "dec{S|}", { RMeBP } },
748 { "dec{S|}", { RMeSI } },
749 { "dec{S|}", { RMeDI } },
751 { "pushV", { RMrAX } },
752 { "pushV", { RMrCX } },
753 { "pushV", { RMrDX } },
754 { "pushV", { RMrBX } },
755 { "pushV", { RMrSP } },
756 { "pushV", { RMrBP } },
757 { "pushV", { RMrSI } },
758 { "pushV", { RMrDI } },
760 { "popV", { RMrAX } },
761 { "popV", { RMrCX } },
762 { "popV", { RMrDX } },
763 { "popV", { RMrBX } },
764 { "popV", { RMrSP } },
765 { "popV", { RMrBP } },
766 { "popV", { RMrSI } },
767 { "popV", { RMrDI } },
773 { "(bad)", { XX } }, /* seg fs */
774 { "(bad)", { XX } }, /* seg gs */
775 { "(bad)", { XX } }, /* op size prefix */
776 { "(bad)", { XX } }, /* adr size prefix */
779 { "imulS", { Gv, Ev, Iv } },
780 { "pushT", { sIb } },
781 { "imulS", { Gv, Ev, sIb } },
782 { "ins{b||b|}", { Ybr, indirDX } },
783 { "ins{R||G|}", { Yzr, indirDX } },
784 { "outs{b||b|}", { indirDXr, Xb } },
785 { "outs{R||G|}", { indirDXr, Xz } },
787 { "joH", { Jb, XX, cond_jump_flag } },
788 { "jnoH", { Jb, XX, cond_jump_flag } },
789 { "jbH", { Jb, XX, cond_jump_flag } },
790 { "jaeH", { Jb, XX, cond_jump_flag } },
791 { "jeH", { Jb, XX, cond_jump_flag } },
792 { "jneH", { Jb, XX, cond_jump_flag } },
793 { "jbeH", { Jb, XX, cond_jump_flag } },
794 { "jaH", { Jb, XX, cond_jump_flag } },
796 { "jsH", { Jb, XX, cond_jump_flag } },
797 { "jnsH", { Jb, XX, cond_jump_flag } },
798 { "jpH", { Jb, XX, cond_jump_flag } },
799 { "jnpH", { Jb, XX, cond_jump_flag } },
800 { "jlH", { Jb, XX, cond_jump_flag } },
801 { "jgeH", { Jb, XX, cond_jump_flag } },
802 { "jleH", { Jb, XX, cond_jump_flag } },
803 { "jgH", { Jb, XX, cond_jump_flag } },
809 { "testB", { Eb, Gb } },
810 { "testS", { Ev, Gv } },
811 { "xchgB", { Eb, Gb } },
812 { "xchgS", { Ev, Gv } },
814 { "movB", { Eb, Gb } },
815 { "movS", { Ev, Gv } },
816 { "movB", { Gb, Eb } },
817 { "movS", { Gv, Ev } },
818 { "movD", { Sv, Sw } },
820 { "movD", { Sw, Sv } },
824 { "xchgS", { RMeCX, eAX } },
825 { "xchgS", { RMeDX, eAX } },
826 { "xchgS", { RMeBX, eAX } },
827 { "xchgS", { RMeSP, eAX } },
828 { "xchgS", { RMeBP, eAX } },
829 { "xchgS", { RMeSI, eAX } },
830 { "xchgS", { RMeDI, eAX } },
832 { "cW{t||t|}R", { XX } },
833 { "cR{t||t|}O", { XX } },
834 { "Jcall{T|}", { Ap } },
835 { "(bad)", { XX } }, /* fwait */
836 { "pushfT", { XX } },
838 { "sahf{|}", { XX } },
839 { "lahf{|}", { XX } },
841 { "movB", { AL, Ob } },
842 { "movS", { eAX, Ov } },
843 { "movB", { Ob, AL } },
844 { "movS", { Ov, eAX } },
845 { "movs{b||b|}", { Ybr, Xb } },
846 { "movs{R||R|}", { Yvr, Xv } },
847 { "cmps{b||b|}", { Xb, Yb } },
848 { "cmps{R||R|}", { Xv, Yv } },
850 { "testB", { AL, Ib } },
851 { "testS", { eAX, Iv } },
852 { "stosB", { Ybr, AL } },
853 { "stosS", { Yvr, eAX } },
854 { "lodsB", { ALr, Xb } },
855 { "lodsS", { eAXr, Xv } },
856 { "scasB", { AL, Yb } },
857 { "scasS", { eAX, Yv } },
859 { "movB", { RMAL, Ib } },
860 { "movB", { RMCL, Ib } },
861 { "movB", { RMDL, Ib } },
862 { "movB", { RMBL, Ib } },
863 { "movB", { RMAH, Ib } },
864 { "movB", { RMCH, Ib } },
865 { "movB", { RMDH, Ib } },
866 { "movB", { RMBH, Ib } },
868 { "movS", { RMeAX, Iv64 } },
869 { "movS", { RMeCX, Iv64 } },
870 { "movS", { RMeDX, Iv64 } },
871 { "movS", { RMeBX, Iv64 } },
872 { "movS", { RMeSP, Iv64 } },
873 { "movS", { RMeBP, Iv64 } },
874 { "movS", { RMeSI, Iv64 } },
875 { "movS", { RMeDI, Iv64 } },
886 { "enterT", { Iw, Ib } },
887 { "leaveT", { XX } },
892 { "into{|}", { XX } },
899 { "aam{|}", { sIb } },
900 { "aad{|}", { sIb } },
902 { "xlat", { DSBX } },
913 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
914 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
915 { "loopFH", { Jb, XX, loop_jcxz_flag } },
916 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
917 { "inB", { AL, Ib } },
918 { "inG", { zAX, Ib } },
919 { "outB", { Ib, AL } },
920 { "outG", { Ib, zAX } },
924 { "Jjmp{T|}", { Ap } },
926 { "inB", { AL, indirDX } },
927 { "inG", { zAX, indirDX } },
928 { "outB", { indirDX, AL } },
929 { "outG", { indirDX, zAX } },
931 { "(bad)", { XX } }, /* lock prefix */
933 { "(bad)", { XX } }, /* repne */
934 { "(bad)", { XX } }, /* repz */
950 static const struct dis386 dis386_twobyte[] = {
954 { "larS", { Gv, Ew } },
955 { "lslS", { Gv, Ew } },
957 { "syscall", { XX } },
959 { "sysretP", { XX } },
962 { "wbinvd", { XX } },
968 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
974 { "unpcklpX", { XM, EXq } },
975 { "unpckhpX", { XM, EXq } },
988 { "movZ", { Rm, Cm } },
989 { "movZ", { Rm, Dm } },
990 { "movZ", { Cm, Rm } },
991 { "movZ", { Dm, Rm } },
992 { "movL", { Rd, Td } },
994 { "movL", { Td, Rd } },
997 { "movapX", { XM, EXx } },
998 { "movapX", { EXx, XM } },
1006 { "wrmsr", { XX } },
1007 { "rdtsc", { XX } },
1008 { "rdmsr", { XX } },
1009 { "rdpmc", { XX } },
1010 { "sysenter", { XX } },
1011 { "sysexit", { XX } },
1012 { "(bad)", { XX } },
1013 { "(bad)", { XX } },
1016 { "(bad)", { XX } },
1018 { "(bad)", { XX } },
1019 { "(bad)", { XX } },
1020 { "(bad)", { XX } },
1021 { "(bad)", { XX } },
1022 { "(bad)", { XX } },
1024 { "cmovo", { Gv, Ev } },
1025 { "cmovno", { Gv, Ev } },
1026 { "cmovb", { Gv, Ev } },
1027 { "cmovae", { Gv, Ev } },
1028 { "cmove", { Gv, Ev } },
1029 { "cmovne", { Gv, Ev } },
1030 { "cmovbe", { Gv, Ev } },
1031 { "cmova", { Gv, Ev } },
1033 { "cmovs", { Gv, Ev } },
1034 { "cmovns", { Gv, Ev } },
1035 { "cmovp", { Gv, Ev } },
1036 { "cmovnp", { Gv, Ev } },
1037 { "cmovl", { Gv, Ev } },
1038 { "cmovge", { Gv, Ev } },
1039 { "cmovle", { Gv, Ev } },
1040 { "cmovg", { Gv, Ev } },
1042 { "movmskpX", { Gdq, XS } },
1046 { "andpX", { XM, EXx } },
1047 { "andnpX", { XM, EXx } },
1048 { "orpX", { XM, EXx } },
1049 { "xorpX", { XM, EXx } },
1063 { "packsswb", { MX, EM } },
1064 { "pcmpgtb", { MX, EM } },
1065 { "pcmpgtw", { MX, EM } },
1066 { "pcmpgtd", { MX, EM } },
1067 { "packuswb", { MX, EM } },
1069 { "punpckhbw", { MX, EM } },
1070 { "punpckhwd", { MX, EM } },
1071 { "punpckhdq", { MX, EM } },
1072 { "packssdw", { MX, EM } },
1075 { "movK", { MX, Edq } },
1082 { "pcmpeqb", { MX, EM } },
1083 { "pcmpeqw", { MX, EM } },
1084 { "pcmpeqd", { MX, EM } },
1089 { "(bad)", { XX } },
1090 { "(bad)", { XX } },
1096 { "joH", { Jv, XX, cond_jump_flag } },
1097 { "jnoH", { Jv, XX, cond_jump_flag } },
1098 { "jbH", { Jv, XX, cond_jump_flag } },
1099 { "jaeH", { Jv, XX, cond_jump_flag } },
1100 { "jeH", { Jv, XX, cond_jump_flag } },
1101 { "jneH", { Jv, XX, cond_jump_flag } },
1102 { "jbeH", { Jv, XX, cond_jump_flag } },
1103 { "jaH", { Jv, XX, cond_jump_flag } },
1105 { "jsH", { Jv, XX, cond_jump_flag } },
1106 { "jnsH", { Jv, XX, cond_jump_flag } },
1107 { "jpH", { Jv, XX, cond_jump_flag } },
1108 { "jnpH", { Jv, XX, cond_jump_flag } },
1109 { "jlH", { Jv, XX, cond_jump_flag } },
1110 { "jgeH", { Jv, XX, cond_jump_flag } },
1111 { "jleH", { Jv, XX, cond_jump_flag } },
1112 { "jgH", { Jv, XX, cond_jump_flag } },
1115 { "setno", { Eb } },
1117 { "setae", { Eb } },
1119 { "setne", { Eb } },
1120 { "setbe", { Eb } },
1124 { "setns", { Eb } },
1126 { "setnp", { Eb } },
1128 { "setge", { Eb } },
1129 { "setle", { Eb } },
1132 { "pushT", { fs } },
1134 { "cpuid", { XX } },
1135 { "btS", { Ev, Gv } },
1136 { "shldS", { Ev, Gv, Ib } },
1137 { "shldS", { Ev, Gv, CL } },
1141 { "pushT", { gs } },
1144 { "btsS", { Ev, Gv } },
1145 { "shrdS", { Ev, Gv, Ib } },
1146 { "shrdS", { Ev, Gv, CL } },
1148 { "imulS", { Gv, Ev } },
1150 { "cmpxchgB", { Eb, Gb } },
1151 { "cmpxchgS", { Ev, Gv } },
1153 { "btrS", { Ev, Gv } },
1156 { "movz{bR|x|bR|x}", { Gv, Eb } },
1157 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1162 { "btcS", { Ev, Gv } },
1163 { "bsfS", { Gv, Ev } },
1165 { "movs{bR|x|bR|x}", { Gv, Eb } },
1166 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1168 { "xaddB", { Eb, Gb } },
1169 { "xaddS", { Ev, Gv } },
1171 { "movntiS", { Ev, Gv } },
1172 { "pinsrw", { MX, Edqw, Ib } },
1173 { "pextrw", { Gdq, MS, Ib } },
1174 { "shufpX", { XM, EXx, Ib } },
1177 { "bswap", { RMeAX } },
1178 { "bswap", { RMeCX } },
1179 { "bswap", { RMeDX } },
1180 { "bswap", { RMeBX } },
1181 { "bswap", { RMeSP } },
1182 { "bswap", { RMeBP } },
1183 { "bswap", { RMeSI } },
1184 { "bswap", { RMeDI } },
1187 { "psrlw", { MX, EM } },
1188 { "psrld", { MX, EM } },
1189 { "psrlq", { MX, EM } },
1190 { "paddq", { MX, EM } },
1191 { "pmullw", { MX, EM } },
1193 { "pmovmskb", { Gdq, MS } },
1195 { "psubusb", { MX, EM } },
1196 { "psubusw", { MX, EM } },
1197 { "pminub", { MX, EM } },
1198 { "pand", { MX, EM } },
1199 { "paddusb", { MX, EM } },
1200 { "paddusw", { MX, EM } },
1201 { "pmaxub", { MX, EM } },
1202 { "pandn", { MX, EM } },
1204 { "pavgb", { MX, EM } },
1205 { "psraw", { MX, EM } },
1206 { "psrad", { MX, EM } },
1207 { "pavgw", { MX, EM } },
1208 { "pmulhuw", { MX, EM } },
1209 { "pmulhw", { MX, EM } },
1213 { "psubsb", { MX, EM } },
1214 { "psubsw", { MX, EM } },
1215 { "pminsw", { MX, EM } },
1216 { "por", { MX, EM } },
1217 { "paddsb", { MX, EM } },
1218 { "paddsw", { MX, EM } },
1219 { "pmaxsw", { MX, EM } },
1220 { "pxor", { MX, EM } },
1223 { "psllw", { MX, EM } },
1224 { "pslld", { MX, EM } },
1225 { "psllq", { MX, EM } },
1226 { "pmuludq", { MX, EM } },
1227 { "pmaddwd", { MX, EM } },
1228 { "psadbw", { MX, EM } },
1231 { "psubb", { MX, EM } },
1232 { "psubw", { MX, EM } },
1233 { "psubd", { MX, EM } },
1234 { "psubq", { MX, EM } },
1235 { "paddb", { MX, EM } },
1236 { "paddw", { MX, EM } },
1237 { "paddd", { MX, EM } },
1238 { "(bad)", { XX } },
1241 static const unsigned char onebyte_has_modrm[256] = {
1242 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1243 /* ------------------------------- */
1244 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1245 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1246 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1247 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1248 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1249 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1250 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1251 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1252 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1253 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1254 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1255 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1256 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1257 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1258 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1259 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1260 /* ------------------------------- */
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1264 static const unsigned char twobyte_has_modrm[256] = {
1265 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1266 /* ------------------------------- */
1267 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1268 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1269 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1270 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1271 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1272 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1273 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1274 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1275 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1276 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1277 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1278 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1279 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1280 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1281 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1282 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1283 /* ------------------------------- */
1284 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1287 static char obuf[100];
1289 static char scratchbuf[100];
1290 static unsigned char *start_codep;
1291 static unsigned char *insn_codep;
1292 static unsigned char *codep;
1293 static const char *lock_prefix;
1294 static const char *data_prefix;
1295 static const char *addr_prefix;
1296 static const char *repz_prefix;
1297 static const char *repnz_prefix;
1298 static disassemble_info *the_info;
1306 static unsigned char need_modrm;
1308 /* If we are accessing mod/rm/reg without need_modrm set, then the
1309 values are stale. Hitting this abort likely indicates that you
1310 need to update onebyte_has_modrm or twobyte_has_modrm. */
1311 #define MODRM_CHECK if (!need_modrm) abort ()
1313 static const char **names64;
1314 static const char **names32;
1315 static const char **names16;
1316 static const char **names8;
1317 static const char **names8rex;
1318 static const char **names_seg;
1319 static const char **index16;
1321 static const char *intel_names64[] = {
1322 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1323 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1325 static const char *intel_names32[] = {
1326 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1327 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1329 static const char *intel_names16[] = {
1330 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1331 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1333 static const char *intel_names8[] = {
1334 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1336 static const char *intel_names8rex[] = {
1337 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1338 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1340 static const char *intel_names_seg[] = {
1341 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1343 static const char *intel_index16[] = {
1344 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1347 static const char *att_names64[] = {
1348 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1349 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1351 static const char *att_names32[] = {
1352 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1353 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1355 static const char *att_names16[] = {
1356 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1357 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1359 static const char *att_names8[] = {
1360 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1362 static const char *att_names8rex[] = {
1363 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1364 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1366 static const char *att_names_seg[] = {
1367 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1369 static const char *att_index16[] = {
1370 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1373 static const struct dis386 grps[][8] = {
1376 { "popU", { stackEv } },
1377 { "(bad)", { XX } },
1378 { "(bad)", { XX } },
1379 { "(bad)", { XX } },
1380 { "(bad)", { XX } },
1381 { "(bad)", { XX } },
1382 { "(bad)", { XX } },
1383 { "(bad)", { XX } },
1387 { "addA", { Eb, Ib } },
1388 { "orA", { Eb, Ib } },
1389 { "adcA", { Eb, Ib } },
1390 { "sbbA", { Eb, Ib } },
1391 { "andA", { Eb, Ib } },
1392 { "subA", { Eb, Ib } },
1393 { "xorA", { Eb, Ib } },
1394 { "cmpA", { Eb, Ib } },
1398 { "addQ", { Ev, Iv } },
1399 { "orQ", { Ev, Iv } },
1400 { "adcQ", { Ev, Iv } },
1401 { "sbbQ", { Ev, Iv } },
1402 { "andQ", { Ev, Iv } },
1403 { "subQ", { Ev, Iv } },
1404 { "xorQ", { Ev, Iv } },
1405 { "cmpQ", { Ev, Iv } },
1409 { "addQ", { Ev, sIb } },
1410 { "orQ", { Ev, sIb } },
1411 { "adcQ", { Ev, sIb } },
1412 { "sbbQ", { Ev, sIb } },
1413 { "andQ", { Ev, sIb } },
1414 { "subQ", { Ev, sIb } },
1415 { "xorQ", { Ev, sIb } },
1416 { "cmpQ", { Ev, sIb } },
1420 { "rolA", { Eb, Ib } },
1421 { "rorA", { Eb, Ib } },
1422 { "rclA", { Eb, Ib } },
1423 { "rcrA", { Eb, Ib } },
1424 { "shlA", { Eb, Ib } },
1425 { "shrA", { Eb, Ib } },
1426 { "(bad)", { XX } },
1427 { "sarA", { Eb, Ib } },
1431 { "rolQ", { Ev, Ib } },
1432 { "rorQ", { Ev, Ib } },
1433 { "rclQ", { Ev, Ib } },
1434 { "rcrQ", { Ev, Ib } },
1435 { "shlQ", { Ev, Ib } },
1436 { "shrQ", { Ev, Ib } },
1437 { "(bad)", { XX } },
1438 { "sarQ", { Ev, Ib } },
1442 { "rolA", { Eb, I1 } },
1443 { "rorA", { Eb, I1 } },
1444 { "rclA", { Eb, I1 } },
1445 { "rcrA", { Eb, I1 } },
1446 { "shlA", { Eb, I1 } },
1447 { "shrA", { Eb, I1 } },
1448 { "(bad)", { XX } },
1449 { "sarA", { Eb, I1 } },
1453 { "rolQ", { Ev, I1 } },
1454 { "rorQ", { Ev, I1 } },
1455 { "rclQ", { Ev, I1 } },
1456 { "rcrQ", { Ev, I1 } },
1457 { "shlQ", { Ev, I1 } },
1458 { "shrQ", { Ev, I1 } },
1459 { "(bad)", { XX } },
1460 { "sarQ", { Ev, I1 } },
1464 { "rolA", { Eb, CL } },
1465 { "rorA", { Eb, CL } },
1466 { "rclA", { Eb, CL } },
1467 { "rcrA", { Eb, CL } },
1468 { "shlA", { Eb, CL } },
1469 { "shrA", { Eb, CL } },
1470 { "(bad)", { XX } },
1471 { "sarA", { Eb, CL } },
1475 { "rolQ", { Ev, CL } },
1476 { "rorQ", { Ev, CL } },
1477 { "rclQ", { Ev, CL } },
1478 { "rcrQ", { Ev, CL } },
1479 { "shlQ", { Ev, CL } },
1480 { "shrQ", { Ev, CL } },
1481 { "(bad)", { XX } },
1482 { "sarQ", { Ev, CL } },
1486 { "testA", { Eb, Ib } },
1487 { "(bad)", { Eb } },
1490 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1491 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1492 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1493 { "idivA", { Eb } }, /* and idiv for consistency. */
1497 { "testQ", { Ev, Iv } },
1498 { "(bad)", { XX } },
1501 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1502 { "imulQ", { Ev } },
1504 { "idivQ", { Ev } },
1510 { "(bad)", { XX } },
1511 { "(bad)", { XX } },
1512 { "(bad)", { XX } },
1513 { "(bad)", { XX } },
1514 { "(bad)", { XX } },
1515 { "(bad)", { XX } },
1521 { "callT", { indirEv } },
1522 { "JcallT", { indirEp } },
1523 { "jmpT", { indirEv } },
1524 { "JjmpT", { indirEp } },
1525 { "pushU", { stackEv } },
1526 { "(bad)", { XX } },
1530 { "sldtD", { Sv } },
1536 { "(bad)", { XX } },
1537 { "(bad)", { XX } },
1544 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1545 { "smswD", { Sv } },
1546 { "(bad)", { XX } },
1552 { "(bad)", { XX } },
1553 { "(bad)", { XX } },
1554 { "(bad)", { XX } },
1555 { "(bad)", { XX } },
1556 { "btQ", { Ev, Ib } },
1557 { "btsQ", { Ev, Ib } },
1558 { "btrQ", { Ev, Ib } },
1559 { "btcQ", { Ev, Ib } },
1563 { "(bad)", { XX } },
1564 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1565 { "(bad)", { XX } },
1566 { "(bad)", { XX } },
1567 { "(bad)", { XX } },
1568 { "(bad)", { XX } },
1574 { "movA", { Eb, Ib } },
1575 { "(bad)", { XX } },
1576 { "(bad)", { XX } },
1577 { "(bad)", { XX } },
1578 { "(bad)", { XX } },
1579 { "(bad)", { XX } },
1580 { "(bad)", { XX } },
1581 { "(bad)", { XX } },
1585 { "movQ", { Ev, Iv } },
1586 { "(bad)", { XX } },
1587 { "(bad)", { XX } },
1588 { "(bad)", { XX } },
1589 { "(bad)", { XX } },
1590 { "(bad)", { XX } },
1591 { "(bad)", { XX } },
1592 { "(bad)", { XX } },
1596 { "(bad)", { XX } },
1597 { "(bad)", { XX } },
1599 { "(bad)", { XX } },
1601 { "(bad)", { XX } },
1603 { "(bad)", { XX } },
1607 { "(bad)", { XX } },
1608 { "(bad)", { XX } },
1610 { "(bad)", { XX } },
1612 { "(bad)", { XX } },
1614 { "(bad)", { XX } },
1618 { "(bad)", { XX } },
1619 { "(bad)", { XX } },
1622 { "(bad)", { XX } },
1623 { "(bad)", { XX } },
1633 { "(bad)", { XX } },
1644 { "(bad)", { XX } },
1645 { "(bad)", { XX } },
1646 { "(bad)", { XX } },
1647 { "(bad)", { XX } },
1651 { "prefetch", { Eb } },
1652 { "prefetchw", { Eb } },
1653 { "(bad)", { XX } },
1654 { "(bad)", { XX } },
1655 { "(bad)", { XX } },
1656 { "(bad)", { XX } },
1657 { "(bad)", { XX } },
1658 { "(bad)", { XX } },
1662 { "xstore-rng", { { OP_0f07, 0 } } },
1663 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1664 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1665 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1666 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1667 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1668 { "(bad)", { { OP_0f07, 0 } } },
1669 { "(bad)", { { OP_0f07, 0 } } },
1673 { "montmul", { { OP_0f07, 0 } } },
1674 { "xsha1", { { OP_0f07, 0 } } },
1675 { "xsha256", { { OP_0f07, 0 } } },
1676 { "(bad)", { { OP_0f07, 0 } } },
1677 { "(bad)", { { OP_0f07, 0 } } },
1678 { "(bad)", { { OP_0f07, 0 } } },
1679 { "(bad)", { { OP_0f07, 0 } } },
1680 { "(bad)", { { OP_0f07, 0 } } },
1684 static const struct dis386 prefix_user_table[][4] = {
1687 { "addps", { XM, EXx } },
1688 { "addss", { XM, EXd } },
1689 { "addpd", { XM, EXx } },
1690 { "addsd", { XM, EXq } },
1694 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1695 { "", { XM, EXd, OPSIMD } },
1696 { "", { XM, EXx, OPSIMD } },
1697 { "", { XM, EXq, OPSIMD } },
1701 { "cvtpi2ps", { XM, EMCq } },
1702 { "cvtsi2ssY", { XM, Ev } },
1703 { "cvtpi2pd", { XM, EMCq } },
1704 { "cvtsi2sdY", { XM, Ev } },
1708 { "cvtps2pi", { MXC, EXq } },
1709 { "cvtss2siY", { Gv, EXd } },
1710 { "cvtpd2pi", { MXC, EXx } },
1711 { "cvtsd2siY", { Gv, EXq } },
1715 { "cvttps2pi", { MXC, EXq } },
1716 { "cvttss2siY", { Gv, EXd } },
1717 { "cvttpd2pi", { MXC, EXx } },
1718 { "cvttsd2siY", { Gv, EXq } },
1722 { "divps", { XM, EXx } },
1723 { "divss", { XM, EXd } },
1724 { "divpd", { XM, EXx } },
1725 { "divsd", { XM, EXq } },
1729 { "maxps", { XM, EXx } },
1730 { "maxss", { XM, EXd } },
1731 { "maxpd", { XM, EXx } },
1732 { "maxsd", { XM, EXq } },
1736 { "minps", { XM, EXx } },
1737 { "minss", { XM, EXd } },
1738 { "minpd", { XM, EXx } },
1739 { "minsd", { XM, EXq } },
1743 { "movups", { XM, EXx } },
1744 { "movss", { XM, EXd } },
1745 { "movupd", { XM, EXx } },
1746 { "movsd", { XM, EXq } },
1750 { "movups", { EXx, XM } },
1751 { "movss", { EXd, XM } },
1752 { "movupd", { EXx, XM } },
1753 { "movsd", { EXq, XM } },
1757 { "mulps", { XM, EXx } },
1758 { "mulss", { XM, EXd } },
1759 { "mulpd", { XM, EXx } },
1760 { "mulsd", { XM, EXq } },
1764 { "rcpps", { XM, EXx } },
1765 { "rcpss", { XM, EXd } },
1766 { "(bad)", { XM, EXx } },
1767 { "(bad)", { XM, EXx } },
1771 { "rsqrtps",{ XM, EXx } },
1772 { "rsqrtss",{ XM, EXd } },
1773 { "(bad)", { XM, EXx } },
1774 { "(bad)", { XM, EXx } },
1778 { "sqrtps", { XM, EXx } },
1779 { "sqrtss", { XM, EXd } },
1780 { "sqrtpd", { XM, EXx } },
1781 { "sqrtsd", { XM, EXq } },
1785 { "subps", { XM, EXx } },
1786 { "subss", { XM, EXd } },
1787 { "subpd", { XM, EXx } },
1788 { "subsd", { XM, EXq } },
1792 { "(bad)", { XM, EXx } },
1793 { "cvtdq2pd", { XM, EXq } },
1794 { "cvttpd2dq", { XM, EXx } },
1795 { "cvtpd2dq", { XM, EXx } },
1799 { "cvtdq2ps", { XM, EXx } },
1800 { "cvttps2dq", { XM, EXx } },
1801 { "cvtps2dq", { XM, EXx } },
1802 { "(bad)", { XM, EXx } },
1806 { "cvtps2pd", { XM, EXq } },
1807 { "cvtss2sd", { XM, EXd } },
1808 { "cvtpd2ps", { XM, EXx } },
1809 { "cvtsd2ss", { XM, EXq } },
1813 { "maskmovq", { MX, MS } },
1814 { "(bad)", { XM, EXx } },
1815 { "maskmovdqu", { XM, XS } },
1816 { "(bad)", { XM, EXx } },
1820 { "movq", { MX, EM } },
1821 { "movdqu", { XM, EXx } },
1822 { "movdqa", { XM, EXx } },
1823 { "(bad)", { XM, EXx } },
1827 { "movq", { EM, MX } },
1828 { "movdqu", { EXx, XM } },
1829 { "movdqa", { EXx, XM } },
1830 { "(bad)", { EXx, XM } },
1834 { "(bad)", { EXx, XM } },
1835 { "movq2dq",{ XM, MS } },
1836 { "movq", { EXq, XM } },
1837 { "movdq2q",{ MX, XS } },
1841 { "pshufw", { MX, EM, Ib } },
1842 { "pshufhw",{ XM, EXx, Ib } },
1843 { "pshufd", { XM, EXx, Ib } },
1844 { "pshuflw",{ XM, EXx, Ib } },
1848 { "movK", { Edq, MX } },
1849 { "movq", { XM, EXq } },
1850 { "movK", { Edq, XM } },
1851 { "(bad)", { Ed, XM } },
1855 { "(bad)", { MX, EXx } },
1856 { "(bad)", { XM, EXx } },
1857 { "punpckhqdq", { XM, EXx } },
1858 { "(bad)", { XM, EXx } },
1862 { "movntq", { EM, MX } },
1863 { "(bad)", { EM, XM } },
1864 { "movntdq",{ EM, XM } },
1865 { "(bad)", { EM, XM } },
1869 { "(bad)", { MX, EXx } },
1870 { "(bad)", { XM, EXx } },
1871 { "punpcklqdq", { XM, EXx } },
1872 { "(bad)", { XM, EXx } },
1876 { "(bad)", { MX, EXx } },
1877 { "(bad)", { XM, EXx } },
1878 { "addsubpd", { XM, EXx } },
1879 { "addsubps", { XM, EXx } },
1883 { "(bad)", { MX, EXx } },
1884 { "(bad)", { XM, EXx } },
1885 { "haddpd", { XM, EXx } },
1886 { "haddps", { XM, EXx } },
1890 { "(bad)", { MX, EXx } },
1891 { "(bad)", { XM, EXx } },
1892 { "hsubpd", { XM, EXx } },
1893 { "hsubps", { XM, EXx } },
1898 { "movsldup", { XM, EXx } },
1899 { "movlpd", { XM, EXq } },
1900 { "movddup", { XM, EXq } },
1905 { "movshdup", { XM, EXx } },
1906 { "movhpd", { XM, EXq } },
1907 { "(bad)", { XM, EXq } },
1911 { "(bad)", { XM, EXx } },
1912 { "(bad)", { XM, EXx } },
1913 { "(bad)", { XM, EXx } },
1918 {"movntps", { Ev, XM } },
1919 {"movntss", { Ed, XM } },
1920 {"movntpd", { Ev, XM } },
1921 {"movntsd", { Eq, XM } },
1926 {"vmread", { Em, Gm } },
1928 {"extrq", { XS, Ib, Ib } },
1929 {"insertq", { XM, XS, Ib, Ib } },
1934 {"vmwrite", { Gm, Em } },
1936 {"extrq", { XM, XS } },
1937 {"insertq", { XM, XS } },
1942 { "bsrS", { Gv, Ev } },
1943 { "lzcntS", { Gv, Ev } },
1944 { "bsrS", { Gv, Ev } },
1945 { "(bad)", { XX } },
1950 { "(bad)", { XX } },
1951 { "popcntS", { Gv, Ev } },
1952 { "(bad)", { XX } },
1953 { "(bad)", { XX } },
1958 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1959 { "pause", { XX } },
1960 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1961 { "(bad)", { XX } },
1966 { "(bad)", { XX } },
1967 { "(bad)", { XX } },
1968 { "pblendvb", {XM, EXx, XMM0 } },
1969 { "(bad)", { XX } },
1974 { "(bad)", { XX } },
1975 { "(bad)", { XX } },
1976 { "blendvps", {XM, EXx, XMM0 } },
1977 { "(bad)", { XX } },
1982 { "(bad)", { XX } },
1983 { "(bad)", { XX } },
1984 { "blendvpd", { XM, EXx, XMM0 } },
1985 { "(bad)", { XX } },
1990 { "(bad)", { XX } },
1991 { "(bad)", { XX } },
1992 { "ptest", { XM, EXx } },
1993 { "(bad)", { XX } },
1998 { "(bad)", { XX } },
1999 { "(bad)", { XX } },
2000 { "pmovsxbw", { XM, EXq } },
2001 { "(bad)", { XX } },
2006 { "(bad)", { XX } },
2007 { "(bad)", { XX } },
2008 { "pmovsxbd", { XM, EXd } },
2009 { "(bad)", { XX } },
2014 { "(bad)", { XX } },
2015 { "(bad)", { XX } },
2016 { "pmovsxbq", { XM, EXw } },
2017 { "(bad)", { XX } },
2022 { "(bad)", { XX } },
2023 { "(bad)", { XX } },
2024 { "pmovsxwd", { XM, EXq } },
2025 { "(bad)", { XX } },
2030 { "(bad)", { XX } },
2031 { "(bad)", { XX } },
2032 { "pmovsxwq", { XM, EXd } },
2033 { "(bad)", { XX } },
2038 { "(bad)", { XX } },
2039 { "(bad)", { XX } },
2040 { "pmovsxdq", { XM, EXq } },
2041 { "(bad)", { XX } },
2046 { "(bad)", { XX } },
2047 { "(bad)", { XX } },
2048 { "pmuldq", { XM, EXx } },
2049 { "(bad)", { XX } },
2054 { "(bad)", { XX } },
2055 { "(bad)", { XX } },
2056 { "pcmpeqq", { XM, EXx } },
2057 { "(bad)", { XX } },
2062 { "(bad)", { XX } },
2063 { "(bad)", { XX } },
2064 { "movntdqa", { XM, EM } },
2065 { "(bad)", { XX } },
2070 { "(bad)", { XX } },
2071 { "(bad)", { XX } },
2072 { "packusdw", { XM, EXx } },
2073 { "(bad)", { XX } },
2078 { "(bad)", { XX } },
2079 { "(bad)", { XX } },
2080 { "pmovzxbw", { XM, EXq } },
2081 { "(bad)", { XX } },
2086 { "(bad)", { XX } },
2087 { "(bad)", { XX } },
2088 { "pmovzxbd", { XM, EXd } },
2089 { "(bad)", { XX } },
2094 { "(bad)", { XX } },
2095 { "(bad)", { XX } },
2096 { "pmovzxbq", { XM, EXw } },
2097 { "(bad)", { XX } },
2102 { "(bad)", { XX } },
2103 { "(bad)", { XX } },
2104 { "pmovzxwd", { XM, EXq } },
2105 { "(bad)", { XX } },
2110 { "(bad)", { XX } },
2111 { "(bad)", { XX } },
2112 { "pmovzxwq", { XM, EXd } },
2113 { "(bad)", { XX } },
2118 { "(bad)", { XX } },
2119 { "(bad)", { XX } },
2120 { "pmovzxdq", { XM, EXq } },
2121 { "(bad)", { XX } },
2126 { "(bad)", { XX } },
2127 { "(bad)", { XX } },
2128 { "pminsb", { XM, EXx } },
2129 { "(bad)", { XX } },
2134 { "(bad)", { XX } },
2135 { "(bad)", { XX } },
2136 { "pminsd", { XM, EXx } },
2137 { "(bad)", { XX } },
2142 { "(bad)", { XX } },
2143 { "(bad)", { XX } },
2144 { "pminuw", { XM, EXx } },
2145 { "(bad)", { XX } },
2150 { "(bad)", { XX } },
2151 { "(bad)", { XX } },
2152 { "pminud", { XM, EXx } },
2153 { "(bad)", { XX } },
2158 { "(bad)", { XX } },
2159 { "(bad)", { XX } },
2160 { "pmaxsb", { XM, EXx } },
2161 { "(bad)", { XX } },
2166 { "(bad)", { XX } },
2167 { "(bad)", { XX } },
2168 { "pmaxsd", { XM, EXx } },
2169 { "(bad)", { XX } },
2174 { "(bad)", { XX } },
2175 { "(bad)", { XX } },
2176 { "pmaxuw", { XM, EXx } },
2177 { "(bad)", { XX } },
2182 { "(bad)", { XX } },
2183 { "(bad)", { XX } },
2184 { "pmaxud", { XM, EXx } },
2185 { "(bad)", { XX } },
2190 { "(bad)", { XX } },
2191 { "(bad)", { XX } },
2192 { "pmulld", { XM, EXx } },
2193 { "(bad)", { XX } },
2198 { "(bad)", { XX } },
2199 { "(bad)", { XX } },
2200 { "phminposuw", { XM, EXx } },
2201 { "(bad)", { XX } },
2206 { "(bad)", { XX } },
2207 { "(bad)", { XX } },
2208 { "roundps", { XM, EXx, Ib } },
2209 { "(bad)", { XX } },
2214 { "(bad)", { XX } },
2215 { "(bad)", { XX } },
2216 { "roundpd", { XM, EXx, Ib } },
2217 { "(bad)", { XX } },
2222 { "(bad)", { XX } },
2223 { "(bad)", { XX } },
2224 { "roundss", { XM, EXd, Ib } },
2225 { "(bad)", { XX } },
2230 { "(bad)", { XX } },
2231 { "(bad)", { XX } },
2232 { "roundsd", { XM, EXq, Ib } },
2233 { "(bad)", { XX } },
2238 { "(bad)", { XX } },
2239 { "(bad)", { XX } },
2240 { "blendps", { XM, EXx, Ib } },
2241 { "(bad)", { XX } },
2246 { "(bad)", { XX } },
2247 { "(bad)", { XX } },
2248 { "blendpd", { XM, EXx, Ib } },
2249 { "(bad)", { XX } },
2254 { "(bad)", { XX } },
2255 { "(bad)", { XX } },
2256 { "pblendw", { XM, EXx, Ib } },
2257 { "(bad)", { XX } },
2262 { "(bad)", { XX } },
2263 { "(bad)", { XX } },
2264 { "pextrb", { Edqb, XM, Ib } },
2265 { "(bad)", { XX } },
2270 { "(bad)", { XX } },
2271 { "(bad)", { XX } },
2272 { "pextrw", { Edqw, XM, Ib } },
2273 { "(bad)", { XX } },
2278 { "(bad)", { XX } },
2279 { "(bad)", { XX } },
2280 { "pextrK", { Edq, XM, Ib } },
2281 { "(bad)", { XX } },
2286 { "(bad)", { XX } },
2287 { "(bad)", { XX } },
2288 { "extractps", { Edqd, XM, Ib } },
2289 { "(bad)", { XX } },
2294 { "(bad)", { XX } },
2295 { "(bad)", { XX } },
2296 { "pinsrb", { XM, Edqb, Ib } },
2297 { "(bad)", { XX } },
2302 { "(bad)", { XX } },
2303 { "(bad)", { XX } },
2304 { "insertps", { XM, EXd, Ib } },
2305 { "(bad)", { XX } },
2310 { "(bad)", { XX } },
2311 { "(bad)", { XX } },
2312 { "pinsrK", { XM, Edq, Ib } },
2313 { "(bad)", { XX } },
2318 { "(bad)", { XX } },
2319 { "(bad)", { XX } },
2320 { "dpps", { XM, EXx, Ib } },
2321 { "(bad)", { XX } },
2326 { "(bad)", { XX } },
2327 { "(bad)", { XX } },
2328 { "dppd", { XM, EXx, Ib } },
2329 { "(bad)", { XX } },
2334 { "(bad)", { XX } },
2335 { "(bad)", { XX } },
2336 { "mpsadbw", { XM, EXx, Ib } },
2337 { "(bad)", { XX } },
2342 { "(bad)", { XX } },
2343 { "(bad)", { XX } },
2344 { "pcmpgtq", { XM, EXx } },
2345 { "(bad)", { XX } },
2350 { "(bad)", { XX } },
2351 { "(bad)", { XX } },
2352 { "(bad)", { XX } },
2353 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2358 { "(bad)", { XX } },
2359 { "(bad)", { XX } },
2360 { "(bad)", { XX } },
2361 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2366 { "(bad)", { XX } },
2367 { "(bad)", { XX } },
2368 { "pcmpestrm", { XM, EXx, Ib } },
2369 { "(bad)", { XX } },
2374 { "(bad)", { XX } },
2375 { "(bad)", { XX } },
2376 { "pcmpestri", { XM, EXx, Ib } },
2377 { "(bad)", { XX } },
2382 { "(bad)", { XX } },
2383 { "(bad)", { XX } },
2384 { "pcmpistrm", { XM, EXx, Ib } },
2385 { "(bad)", { XX } },
2390 { "(bad)", { XX } },
2391 { "(bad)", { XX } },
2392 { "pcmpistri", { XM, EXx, Ib } },
2393 { "(bad)", { XX } },
2398 { "ucomiss",{ XM, EXd } },
2399 { "(bad)", { XX } },
2400 { "ucomisd",{ XM, EXq } },
2401 { "(bad)", { XX } },
2406 { "comiss", { XM, EXd } },
2407 { "(bad)", { XX } },
2408 { "comisd", { XM, EXq } },
2409 { "(bad)", { XX } },
2414 { "punpcklbw",{ MX, EMd } },
2415 { "(bad)", { XX } },
2416 { "punpcklbw",{ MX, EMx } },
2417 { "(bad)", { XX } },
2422 { "punpcklwd",{ MX, EMd } },
2423 { "(bad)", { XX } },
2424 { "punpcklwd",{ MX, EMx } },
2425 { "(bad)", { XX } },
2430 { "punpckldq",{ MX, EMd } },
2431 { "(bad)", { XX } },
2432 { "punpckldq",{ MX, EMx } },
2433 { "(bad)", { XX } },
2438 { "vmptrld",{ Mq } },
2439 { "vmxon", { Mq } },
2440 { "vmclear",{ Mq } },
2441 { "(bad)", { XX } },
2446 { "(bad)", { XX } },
2447 { "(bad)", { XX } },
2448 { "psrldq", { MS, Ib } },
2449 { "(bad)", { XX } },
2454 { "(bad)", { XX } },
2455 { "(bad)", { XX } },
2456 { "pslldq", { MS, Ib } },
2457 { "(bad)", { XX } },
2461 static const struct dis386 x86_64_table[][2] = {
2463 { "pusha{P|}", { XX } },
2464 { "(bad)", { XX } },
2467 { "popa{P|}", { XX } },
2468 { "(bad)", { XX } },
2472 { "(bad)", { XX } },
2475 { "arpl", { Ew, Gw } },
2476 { "movs{||lq|xd}", { Gv, Ed } },
2480 static const struct dis386 three_byte_table[][256] = {
2484 { "pshufb", { MX, EM } },
2485 { "phaddw", { MX, EM } },
2486 { "phaddd", { MX, EM } },
2487 { "phaddsw", { MX, EM } },
2488 { "pmaddubsw", { MX, EM } },
2489 { "phsubw", { MX, EM } },
2490 { "phsubd", { MX, EM } },
2491 { "phsubsw", { MX, EM } },
2493 { "psignb", { MX, EM } },
2494 { "psignw", { MX, EM } },
2495 { "psignd", { MX, EM } },
2496 { "pmulhrsw", { MX, EM } },
2497 { "(bad)", { XX } },
2498 { "(bad)", { XX } },
2499 { "(bad)", { XX } },
2500 { "(bad)", { XX } },
2503 { "(bad)", { XX } },
2504 { "(bad)", { XX } },
2505 { "(bad)", { XX } },
2508 { "(bad)", { XX } },
2511 { "(bad)", { XX } },
2512 { "(bad)", { XX } },
2513 { "(bad)", { XX } },
2514 { "(bad)", { XX } },
2515 { "pabsb", { MX, EM } },
2516 { "pabsw", { MX, EM } },
2517 { "pabsd", { MX, EM } },
2518 { "(bad)", { XX } },
2526 { "(bad)", { XX } },
2527 { "(bad)", { XX } },
2533 { "(bad)", { XX } },
2534 { "(bad)", { XX } },
2535 { "(bad)", { XX } },
2536 { "(bad)", { XX } },
2544 { "(bad)", { XX } },
2558 { "(bad)", { XX } },
2559 { "(bad)", { XX } },
2560 { "(bad)", { XX } },
2561 { "(bad)", { XX } },
2562 { "(bad)", { XX } },
2563 { "(bad)", { XX } },
2565 { "(bad)", { XX } },
2566 { "(bad)", { XX } },
2567 { "(bad)", { XX } },
2568 { "(bad)", { XX } },
2569 { "(bad)", { XX } },
2570 { "(bad)", { XX } },
2571 { "(bad)", { XX } },
2572 { "(bad)", { XX } },
2574 { "(bad)", { XX } },
2575 { "(bad)", { XX } },
2576 { "(bad)", { XX } },
2577 { "(bad)", { XX } },
2578 { "(bad)", { XX } },
2579 { "(bad)", { XX } },
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2583 { "(bad)", { XX } },
2584 { "(bad)", { XX } },
2585 { "(bad)", { XX } },
2586 { "(bad)", { XX } },
2587 { "(bad)", { XX } },
2588 { "(bad)", { XX } },
2589 { "(bad)", { XX } },
2590 { "(bad)", { XX } },
2592 { "(bad)", { XX } },
2593 { "(bad)", { XX } },
2594 { "(bad)", { XX } },
2595 { "(bad)", { XX } },
2596 { "(bad)", { XX } },
2597 { "(bad)", { XX } },
2598 { "(bad)", { XX } },
2599 { "(bad)", { XX } },
2601 { "(bad)", { XX } },
2602 { "(bad)", { XX } },
2603 { "(bad)", { XX } },
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 { "(bad)", { XX } },
2607 { "(bad)", { XX } },
2608 { "(bad)", { XX } },
2610 { "(bad)", { XX } },
2611 { "(bad)", { XX } },
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "(bad)", { XX } },
2615 { "(bad)", { XX } },
2616 { "(bad)", { XX } },
2617 { "(bad)", { XX } },
2619 { "(bad)", { XX } },
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "(bad)", { XX } },
2624 { "(bad)", { XX } },
2625 { "(bad)", { XX } },
2626 { "(bad)", { XX } },
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "(bad)", { XX } },
2633 { "(bad)", { XX } },
2634 { "(bad)", { XX } },
2635 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "(bad)", { XX } },
2641 { "(bad)", { XX } },
2642 { "(bad)", { XX } },
2643 { "(bad)", { XX } },
2644 { "(bad)", { XX } },
2646 { "(bad)", { XX } },
2647 { "(bad)", { XX } },
2648 { "(bad)", { XX } },
2649 { "(bad)", { XX } },
2650 { "(bad)", { XX } },
2651 { "(bad)", { XX } },
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2655 { "(bad)", { XX } },
2656 { "(bad)", { XX } },
2657 { "(bad)", { XX } },
2658 { "(bad)", { XX } },
2659 { "(bad)", { XX } },
2660 { "(bad)", { XX } },
2661 { "(bad)", { XX } },
2662 { "(bad)", { XX } },
2664 { "(bad)", { XX } },
2665 { "(bad)", { XX } },
2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 { "(bad)", { XX } },
2669 { "(bad)", { XX } },
2670 { "(bad)", { XX } },
2671 { "(bad)", { XX } },
2673 { "(bad)", { XX } },
2674 { "(bad)", { XX } },
2675 { "(bad)", { XX } },
2676 { "(bad)", { XX } },
2677 { "(bad)", { XX } },
2678 { "(bad)", { XX } },
2679 { "(bad)", { XX } },
2680 { "(bad)", { XX } },
2682 { "(bad)", { XX } },
2683 { "(bad)", { XX } },
2684 { "(bad)", { XX } },
2685 { "(bad)", { XX } },
2686 { "(bad)", { XX } },
2687 { "(bad)", { XX } },
2688 { "(bad)", { XX } },
2689 { "(bad)", { XX } },
2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 { "(bad)", { XX } },
2697 { "(bad)", { XX } },
2698 { "(bad)", { XX } },
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 { "(bad)", { XX } },
2706 { "(bad)", { XX } },
2707 { "(bad)", { XX } },
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 { "(bad)", { XX } },
2715 { "(bad)", { XX } },
2716 { "(bad)", { XX } },
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 { "(bad)", { XX } },
2724 { "(bad)", { XX } },
2725 { "(bad)", { XX } },
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 { "(bad)", { XX } },
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 { "(bad)", { XX } },
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
2751 { "(bad)", { XX } },
2752 { "(bad)", { XX } },
2756 { "(bad)", { XX } },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { "(bad)", { XX } },
2761 { "(bad)", { XX } },
2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
2769 { "(bad)", { XX } },
2770 { "(bad)", { XX } },
2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
2778 { "(bad)", { XX } },
2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2791 { "palignr", { MX, EM, Ib } },
2793 { "(bad)", { XX } },
2794 { "(bad)", { XX } },
2795 { "(bad)", { XX } },
2796 { "(bad)", { XX } },
2802 { "(bad)", { XX } },
2803 { "(bad)", { XX } },
2804 { "(bad)", { XX } },
2805 { "(bad)", { XX } },
2806 { "(bad)", { XX } },
2807 { "(bad)", { XX } },
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
2814 { "(bad)", { XX } },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
2887 { "(bad)", { XX } },
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 { "(bad)", { XX } },
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3065 static const struct dis386 opc_ext_table[][2] = {
3068 { "leaS", { Gv, M } },
3069 { "(bad)", { XX } },
3073 { "les{S|}", { Gv, Mp } },
3074 { "(bad)", { XX } },
3078 { "ldsS", { Gv, Mp } },
3079 { "(bad)", { XX } },
3083 { "lssS", { Gv, Mp } },
3084 { "(bad)", { XX } },
3088 { "lfsS", { Gv, Mp } },
3089 { "(bad)", { XX } },
3093 { "lgsS", { Gv, Mp } },
3094 { "(bad)", { XX } },
3098 { "sgdt{Q|IQ||}", { M } },
3103 { "sidt{Q|IQ||}", { M } },
3108 { "lgdt{Q|Q||}", { M } },
3109 { "(bad)", { XX } },
3114 { "(bad)", { XX } },
3118 { "vmptrst", { Mq } },
3119 { "(bad)", { XX } },
3123 { "(bad)", { XX } },
3124 { "psrlw", { MS, Ib } },
3128 { "(bad)", { XX } },
3129 { "psraw", { MS, Ib } },
3133 { "(bad)", { XX } },
3134 { "psllw", { MS, Ib } },
3138 { "(bad)", { XX } },
3139 { "psrld", { MS, Ib } },
3143 { "(bad)", { XX } },
3144 { "psrad", { MS, Ib } },
3148 { "(bad)", { XX } },
3149 { "pslld", { MS, Ib } },
3153 { "(bad)", { XX } },
3154 { "psrlq", { MS, Ib } },
3158 { "(bad)", { XX } },
3163 { "(bad)", { XX } },
3164 { "psllq", { MS, Ib } },
3168 { "(bad)", { XX } },
3173 { "fxsave", { M } },
3174 { "(bad)", { XX } },
3178 { "fxrstor", { M } },
3179 { "(bad)", { XX } },
3183 { "ldmxcsr", { Md } },
3184 { "(bad)", { XX } },
3188 { "stmxcsr", { Md } },
3189 { "(bad)", { XX } },
3193 { "(bad)", { XX } },
3198 { "(bad)", { XX } },
3203 { "clflush", { Mb } },
3208 { "prefetchnta", { Mb } },
3209 { "(bad)", { XX } },
3213 { "prefetcht0", { Mb } },
3214 { "(bad)", { XX } },
3218 { "prefetcht1", { Mb } },
3219 { "(bad)", { XX } },
3223 { "prefetcht2", { Mb } },
3224 { "(bad)", { XX } },
3228 { "lddqu", { XM, M } },
3229 { "(bad)", { XX } },
3233 { "bound{S|}", { Gv, Ma } },
3234 { "(bad)", { XX } },
3238 { "movlpX", { EXq, XM } },
3239 { "(bad)", { XX } },
3243 { "movhpX", { EXq, XM } },
3244 { "(bad)", { XX } },
3248 { "movlpX", { XM, EXq } },
3249 { "movhlpX", { XM, EXq } },
3253 { "movhpX", { XM, EXq } },
3254 { "movlhpX", { XM, EXq } },
3258 { "invlpg", { Mb } },
3263 static const struct dis386 opc_ext_rm_table[][8] = {
3266 { "(bad)", { XX } },
3267 { "vmcall", { Skip_MODRM } },
3268 { "vmlaunch", { Skip_MODRM } },
3269 { "vmresume", { Skip_MODRM } },
3270 { "vmxoff", { Skip_MODRM } },
3271 { "(bad)", { XX } },
3272 { "(bad)", { XX } },
3273 { "(bad)", { XX } },
3277 { "monitor", { { OP_Monitor, 0 } } },
3278 { "mwait", { { OP_Mwait, 0 } } },
3279 { "(bad)", { XX } },
3280 { "(bad)", { XX } },
3281 { "(bad)", { XX } },
3282 { "(bad)", { XX } },
3283 { "(bad)", { XX } },
3284 { "(bad)", { XX } },
3288 { "lfence", { Skip_MODRM } },
3289 { "(bad)", { XX } },
3290 { "(bad)", { XX } },
3291 { "(bad)", { XX } },
3292 { "(bad)", { XX } },
3293 { "(bad)", { XX } },
3294 { "(bad)", { XX } },
3295 { "(bad)", { XX } },
3299 { "mfence", { Skip_MODRM } },
3300 { "(bad)", { XX } },
3301 { "(bad)", { XX } },
3302 { "(bad)", { XX } },
3303 { "(bad)", { XX } },
3304 { "(bad)", { XX } },
3305 { "(bad)", { XX } },
3306 { "(bad)", { XX } },
3310 { "sfence", { Skip_MODRM } },
3311 { "(bad)", { XX } },
3312 { "(bad)", { XX } },
3313 { "(bad)", { XX } },
3314 { "(bad)", { XX } },
3315 { "(bad)", { XX } },
3316 { "(bad)", { XX } },
3317 { "(bad)", { XX } },
3321 { "swapgs", { Skip_MODRM } },
3322 { "rdtscp", { Skip_MODRM } },
3323 { "(bad)", { XX } },
3324 { "(bad)", { XX } },
3325 { "(bad)", { XX } },
3326 { "(bad)", { XX } },
3327 { "(bad)", { XX } },
3328 { "(bad)", { XX } },
3332 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3344 FETCH_DATA (the_info, codep + 1);
3348 /* REX prefixes family. */
3365 if (address_mode == mode_64bit)
3371 prefixes |= PREFIX_REPZ;
3374 prefixes |= PREFIX_REPNZ;
3377 prefixes |= PREFIX_LOCK;
3380 prefixes |= PREFIX_CS;
3383 prefixes |= PREFIX_SS;
3386 prefixes |= PREFIX_DS;
3389 prefixes |= PREFIX_ES;
3392 prefixes |= PREFIX_FS;
3395 prefixes |= PREFIX_GS;
3398 prefixes |= PREFIX_DATA;
3401 prefixes |= PREFIX_ADDR;
3404 /* fwait is really an instruction. If there are prefixes
3405 before the fwait, they belong to the fwait, *not* to the
3406 following instruction. */
3407 if (prefixes || rex)
3409 prefixes |= PREFIX_FWAIT;
3413 prefixes = PREFIX_FWAIT;
3418 /* Rex is ignored when followed by another prefix. */
3429 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3433 prefix_name (int pref, int sizeflag)
3435 static const char *rexes [16] =
3440 "rex.XB", /* 0x43 */
3442 "rex.RB", /* 0x45 */
3443 "rex.RX", /* 0x46 */
3444 "rex.RXB", /* 0x47 */
3446 "rex.WB", /* 0x49 */
3447 "rex.WX", /* 0x4a */
3448 "rex.WXB", /* 0x4b */
3449 "rex.WR", /* 0x4c */
3450 "rex.WRB", /* 0x4d */
3451 "rex.WRX", /* 0x4e */
3452 "rex.WRXB", /* 0x4f */
3457 /* REX prefixes family. */
3474 return rexes [pref - 0x40];
3494 return (sizeflag & DFLAG) ? "data16" : "data32";
3496 if (address_mode == mode_64bit)
3497 return (sizeflag & AFLAG) ? "addr32" : "addr64";
3499 return (sizeflag & AFLAG) ? "addr16" : "addr32";
3507 static char op_out[MAX_OPERANDS][100];
3508 static int op_ad, op_index[MAX_OPERANDS];
3509 static int two_source_ops;
3510 static bfd_vma op_address[MAX_OPERANDS];
3511 static bfd_vma op_riprel[MAX_OPERANDS];
3512 static bfd_vma start_pc;
3515 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3516 * (see topic "Redundant prefixes" in the "Differences from 8086"
3517 * section of the "Virtual 8086 Mode" chapter.)
3518 * 'pc' should be the address of this instruction, it will
3519 * be used to print the target address if this is a relative jump or call
3520 * The function returns the length of this instruction in bytes.
3523 static char intel_syntax;
3524 static char open_char;
3525 static char close_char;
3526 static char separator_char;
3527 static char scale_char;
3529 /* Here for backwards compatibility. When gdb stops using
3530 print_insn_i386_att and print_insn_i386_intel these functions can
3531 disappear, and print_insn_i386 be merged into print_insn. */
3533 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
3537 return print_insn (pc, info);
3541 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
3545 return print_insn (pc, info);
3549 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3553 return print_insn (pc, info);
3557 print_i386_disassembler_options (FILE *stream)
3559 fprintf (stream, _("\n\
3560 The following i386/x86-64 specific disassembler options are supported for use\n\
3561 with the -M switch (multiple options should be separated by commas):\n"));
3563 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3564 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3565 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3566 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3567 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3568 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3569 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3570 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3571 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3572 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3573 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3576 /* Get a pointer to struct dis386 with a valid name. */
3578 static const struct dis386 *
3579 get_valid_dis386 (const struct dis386 *dp)
3583 if (dp->name != NULL)
3586 switch (dp->op[0].bytemode)
3589 dp = &grps[dp->op[1].bytemode][modrm.reg];
3592 case USE_PREFIX_USER_TABLE:
3594 used_prefixes |= (prefixes & PREFIX_REPZ);
3595 if (prefixes & PREFIX_REPZ)
3602 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3604 used_prefixes |= (prefixes & PREFIX_REPNZ);
3605 if (prefixes & PREFIX_REPNZ)
3608 repnz_prefix = NULL;
3612 used_prefixes |= (prefixes & PREFIX_DATA);
3613 if (prefixes & PREFIX_DATA)
3620 dp = &prefix_user_table[dp->op[1].bytemode][index];
3623 case X86_64_SPECIAL:
3624 index = address_mode == mode_64bit ? 1 : 0;
3625 dp = &x86_64_table[dp->op[1].bytemode][index];
3628 case USE_OPC_EXT_TABLE:
3629 index = modrm.mod == 0x3 ? 1 : 0;
3630 dp = &opc_ext_table[dp->op[1].bytemode][index];
3633 case USE_OPC_EXT_RM_TABLE:
3635 dp = &opc_ext_rm_table[dp->op[1].bytemode][index];
3639 oappend (INTERNAL_DISASSEMBLER_ERROR);
3643 if (dp->name != NULL)
3646 return get_valid_dis386 (dp);
3650 print_insn (bfd_vma pc, disassemble_info *info)
3652 const struct dis386 *dp;
3654 char *op_txt[MAX_OPERANDS];
3658 struct dis_private priv;
3660 char prefix_obuf[32];
3663 if (info->mach == bfd_mach_x86_64_intel_syntax
3664 || info->mach == bfd_mach_x86_64)
3665 address_mode = mode_64bit;
3667 address_mode = mode_32bit;
3669 if (intel_syntax == (char) -1)
3670 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3671 || info->mach == bfd_mach_x86_64_intel_syntax);
3673 if (info->mach == bfd_mach_i386_i386
3674 || info->mach == bfd_mach_x86_64
3675 || info->mach == bfd_mach_i386_i386_intel_syntax
3676 || info->mach == bfd_mach_x86_64_intel_syntax)
3677 priv.orig_sizeflag = AFLAG | DFLAG;
3678 else if (info->mach == bfd_mach_i386_i8086)
3679 priv.orig_sizeflag = 0;
3683 for (p = info->disassembler_options; p != NULL; )
3685 if (CONST_STRNEQ (p, "x86-64"))
3687 address_mode = mode_64bit;
3688 priv.orig_sizeflag = AFLAG | DFLAG;
3690 else if (CONST_STRNEQ (p, "i386"))
3692 address_mode = mode_32bit;
3693 priv.orig_sizeflag = AFLAG | DFLAG;
3695 else if (CONST_STRNEQ (p, "i8086"))
3697 address_mode = mode_16bit;
3698 priv.orig_sizeflag = 0;
3700 else if (CONST_STRNEQ (p, "intel"))
3704 else if (CONST_STRNEQ (p, "att"))
3708 else if (CONST_STRNEQ (p, "addr"))
3710 if (address_mode == mode_64bit)
3712 if (p[4] == '3' && p[5] == '2')
3713 priv.orig_sizeflag &= ~AFLAG;
3714 else if (p[4] == '6' && p[5] == '4')
3715 priv.orig_sizeflag |= AFLAG;
3719 if (p[4] == '1' && p[5] == '6')
3720 priv.orig_sizeflag &= ~AFLAG;
3721 else if (p[4] == '3' && p[5] == '2')
3722 priv.orig_sizeflag |= AFLAG;
3725 else if (CONST_STRNEQ (p, "data"))
3727 if (p[4] == '1' && p[5] == '6')
3728 priv.orig_sizeflag &= ~DFLAG;
3729 else if (p[4] == '3' && p[5] == '2')
3730 priv.orig_sizeflag |= DFLAG;
3732 else if (CONST_STRNEQ (p, "suffix"))
3733 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3735 p = strchr (p, ',');
3742 names64 = intel_names64;
3743 names32 = intel_names32;
3744 names16 = intel_names16;
3745 names8 = intel_names8;
3746 names8rex = intel_names8rex;
3747 names_seg = intel_names_seg;
3748 index16 = intel_index16;
3751 separator_char = '+';
3756 names64 = att_names64;
3757 names32 = att_names32;
3758 names16 = att_names16;
3759 names8 = att_names8;
3760 names8rex = att_names8rex;
3761 names_seg = att_names_seg;
3762 index16 = att_index16;
3765 separator_char = ',';
3769 /* The output looks better if we put 7 bytes on a line, since that
3770 puts most long word instructions on a single line. */
3771 info->bytes_per_line = 7;
3773 info->private_data = &priv;
3774 priv.max_fetched = priv.the_buffer;
3775 priv.insn_start = pc;
3778 for (i = 0; i < MAX_OPERANDS; ++i)
3786 start_codep = priv.the_buffer;
3787 codep = priv.the_buffer;
3789 if (setjmp (priv.bailout) != 0)
3793 /* Getting here means we tried for data but didn't get it. That
3794 means we have an incomplete instruction of some sort. Just
3795 print the first byte as a prefix or a .byte pseudo-op. */
3796 if (codep > priv.the_buffer)
3798 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3800 (*info->fprintf_func) (info->stream, "%s", name);
3803 /* Just print the first byte as a .byte instruction. */
3804 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3805 (unsigned int) priv.the_buffer[0]);
3818 sizeflag = priv.orig_sizeflag;
3820 FETCH_DATA (info, codep + 1);
3821 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3823 if (((prefixes & PREFIX_FWAIT)
3824 && ((*codep < 0xd8) || (*codep > 0xdf)))
3825 || (rex && rex_used))
3829 /* fwait not followed by floating point instruction, or rex followed
3830 by other prefixes. Print the first prefix. */
3831 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3833 name = INTERNAL_DISASSEMBLER_ERROR;
3834 (*info->fprintf_func) (info->stream, "%s", name);
3841 unsigned char threebyte;
3842 FETCH_DATA (info, codep + 2);
3843 threebyte = *++codep;
3844 dp = &dis386_twobyte[threebyte];
3845 need_modrm = twobyte_has_modrm[*codep];
3847 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3849 FETCH_DATA (info, codep + 2);
3855 dp = &dis386[*codep];
3856 need_modrm = onebyte_has_modrm[*codep];
3860 if ((prefixes & PREFIX_REPZ))
3862 repz_prefix = "repz ";
3863 used_prefixes |= PREFIX_REPZ;
3868 if ((prefixes & PREFIX_REPNZ))
3870 repnz_prefix = "repnz ";
3871 used_prefixes |= PREFIX_REPNZ;
3874 repnz_prefix = NULL;
3876 if ((prefixes & PREFIX_LOCK))
3878 lock_prefix = "lock ";
3879 used_prefixes |= PREFIX_LOCK;
3885 if (prefixes & PREFIX_ADDR)
3888 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3890 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3891 addr_prefix = "addr32 ";
3893 addr_prefix = "addr16 ";
3894 used_prefixes |= PREFIX_ADDR;
3899 if ((prefixes & PREFIX_DATA))
3902 if (dp->op[2].bytemode == cond_jump_mode
3903 && dp->op[0].bytemode == v_mode
3906 if (sizeflag & DFLAG)
3907 data_prefix = "data32 ";
3909 data_prefix = "data16 ";
3910 used_prefixes |= PREFIX_DATA;
3914 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3916 dp = &three_byte_table[dp->op[1].bytemode][op];
3917 modrm.mod = (*codep >> 6) & 3;
3918 modrm.reg = (*codep >> 3) & 7;
3919 modrm.rm = *codep & 7;
3921 else if (need_modrm)
3923 FETCH_DATA (info, codep + 1);
3924 modrm.mod = (*codep >> 6) & 3;
3925 modrm.reg = (*codep >> 3) & 7;
3926 modrm.rm = *codep & 7;
3929 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
3935 dp = get_valid_dis386 (dp);
3936 if (dp != NULL && putop (dp->name, sizeflag) == 0)
3938 for (i = 0; i < MAX_OPERANDS; ++i)
3941 op_ad = MAX_OPERANDS - 1 - i;
3943 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3948 /* See if any prefixes were not used. If so, print the first one
3949 separately. If we don't do this, we'll wind up printing an
3950 instruction stream which does not precisely correspond to the
3951 bytes we are disassembling. */
3952 if ((prefixes & ~used_prefixes) != 0)
3956 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3958 name = INTERNAL_DISASSEMBLER_ERROR;
3959 (*info->fprintf_func) (info->stream, "%s", name);
3962 if (rex & ~rex_used)
3965 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3967 name = INTERNAL_DISASSEMBLER_ERROR;
3968 (*info->fprintf_func) (info->stream, "%s ", name);
3972 prefix_obufp = prefix_obuf;
3974 prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
3976 prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
3978 prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
3980 prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
3982 prefix_obufp = stpcpy (prefix_obufp, data_prefix);
3984 if (prefix_obuf[0] != 0)
3985 (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
3987 obufp = obuf + strlen (obuf);
3988 for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
3991 (*info->fprintf_func) (info->stream, "%s", obuf);
3993 /* The enter and bound instructions are printed with operands in the same
3994 order as the intel book; everything else is printed in reverse order. */
3995 if (intel_syntax || two_source_ops)
3999 for (i = 0; i < MAX_OPERANDS; ++i)
4000 op_txt[i] = op_out[i];
4002 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4004 op_ad = op_index[i];
4005 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4006 op_index[MAX_OPERANDS - 1 - i] = op_ad;
4007 riprel = op_riprel[i];
4008 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4009 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
4014 for (i = 0; i < MAX_OPERANDS; ++i)
4015 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
4019 for (i = 0; i < MAX_OPERANDS; ++i)
4023 (*info->fprintf_func) (info->stream, ",");
4024 if (op_index[i] != -1 && !op_riprel[i])
4025 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4027 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4031 for (i = 0; i < MAX_OPERANDS; i++)
4032 if (op_index[i] != -1 && op_riprel[i])
4034 (*info->fprintf_func) (info->stream, " # ");
4035 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4036 + op_address[op_index[i]]), info);
4039 return codep - priv.the_buffer;
4042 static const char *float_mem[] = {
4117 static const unsigned char float_mem_mode[] = {
4192 #define ST { OP_ST, 0 }
4193 #define STi { OP_STi, 0 }
4195 #define FGRPd9_2 NULL, { { NULL, 0 } }
4196 #define FGRPd9_4 NULL, { { NULL, 1 } }
4197 #define FGRPd9_5 NULL, { { NULL, 2 } }
4198 #define FGRPd9_6 NULL, { { NULL, 3 } }
4199 #define FGRPd9_7 NULL, { { NULL, 4 } }
4200 #define FGRPda_5 NULL, { { NULL, 5 } }
4201 #define FGRPdb_4 NULL, { { NULL, 6 } }
4202 #define FGRPde_3 NULL, { { NULL, 7 } }
4203 #define FGRPdf_4 NULL, { { NULL, 8 } }
4205 static const struct dis386 float_reg[][8] = {
4208 { "fadd", { ST, STi } },
4209 { "fmul", { ST, STi } },
4210 { "fcom", { STi } },
4211 { "fcomp", { STi } },
4212 { "fsub", { ST, STi } },
4213 { "fsubr", { ST, STi } },
4214 { "fdiv", { ST, STi } },
4215 { "fdivr", { ST, STi } },
4220 { "fxch", { STi } },
4222 { "(bad)", { XX } },
4230 { "fcmovb", { ST, STi } },
4231 { "fcmove", { ST, STi } },
4232 { "fcmovbe",{ ST, STi } },
4233 { "fcmovu", { ST, STi } },
4234 { "(bad)", { XX } },
4236 { "(bad)", { XX } },
4237 { "(bad)", { XX } },
4241 { "fcmovnb",{ ST, STi } },
4242 { "fcmovne",{ ST, STi } },
4243 { "fcmovnbe",{ ST, STi } },
4244 { "fcmovnu",{ ST, STi } },
4246 { "fucomi", { ST, STi } },
4247 { "fcomi", { ST, STi } },
4248 { "(bad)", { XX } },
4252 { "fadd", { STi, ST } },
4253 { "fmul", { STi, ST } },
4254 { "(bad)", { XX } },
4255 { "(bad)", { XX } },
4257 { "fsub", { STi, ST } },
4258 { "fsubr", { STi, ST } },
4259 { "fdiv", { STi, ST } },
4260 { "fdivr", { STi, ST } },
4262 { "fsubr", { STi, ST } },
4263 { "fsub", { STi, ST } },
4264 { "fdivr", { STi, ST } },
4265 { "fdiv", { STi, ST } },
4270 { "ffree", { STi } },
4271 { "(bad)", { XX } },
4273 { "fstp", { STi } },
4274 { "fucom", { STi } },
4275 { "fucomp", { STi } },
4276 { "(bad)", { XX } },
4277 { "(bad)", { XX } },
4281 { "faddp", { STi, ST } },
4282 { "fmulp", { STi, ST } },
4283 { "(bad)", { XX } },
4286 { "fsubp", { STi, ST } },
4287 { "fsubrp", { STi, ST } },
4288 { "fdivp", { STi, ST } },
4289 { "fdivrp", { STi, ST } },
4291 { "fsubrp", { STi, ST } },
4292 { "fsubp", { STi, ST } },
4293 { "fdivrp", { STi, ST } },
4294 { "fdivp", { STi, ST } },
4299 { "ffreep", { STi } },
4300 { "(bad)", { XX } },
4301 { "(bad)", { XX } },
4302 { "(bad)", { XX } },
4304 { "fucomip", { ST, STi } },
4305 { "fcomip", { ST, STi } },
4306 { "(bad)", { XX } },
4310 static char *fgrps[][8] = {
4313 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4318 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4323 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4328 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4333 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4338 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4343 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4344 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4349 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4354 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4359 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
4360 int sizeflag ATTRIBUTE_UNUSED)
4362 /* Skip mod/rm byte. */
4368 dofloat (int sizeflag)
4370 const struct dis386 *dp;
4371 unsigned char floatop;
4373 floatop = codep[-1];
4377 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4379 putop (float_mem[fp_indx], sizeflag);
4382 OP_E (float_mem_mode[fp_indx], sizeflag);
4385 /* Skip mod/rm byte. */
4389 dp = &float_reg[floatop - 0xd8][modrm.reg];
4390 if (dp->name == NULL)
4392 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4394 /* Instruction fnstsw is only one with strange arg. */
4395 if (floatop == 0xdf && codep[-1] == 0xe0)
4396 strcpy (op_out[0], names16[0]);
4400 putop (dp->name, sizeflag);
4405 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4410 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4415 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4417 oappend ("%st" + intel_syntax);
4421 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4423 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
4424 oappend (scratchbuf + intel_syntax);
4427 /* Capital letters in template are macros. */
4429 putop (const char *template, int sizeflag)
4434 for (p = template; *p; p++)
4445 if (address_mode == mode_64bit)
4453 /* Alternative not valid. */
4454 strcpy (obuf, "(bad)");
4458 else if (*p == '\0')
4479 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4485 if (sizeflag & SUFFIX_ALWAYS)
4489 if (intel_syntax && !alt)
4491 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4493 if (sizeflag & DFLAG)
4494 *obufp++ = intel_syntax ? 'd' : 'l';
4496 *obufp++ = intel_syntax ? 'w' : 's';
4497 used_prefixes |= (prefixes & PREFIX_DATA);
4501 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4508 else if (sizeflag & DFLAG)
4509 *obufp++ = intel_syntax ? 'd' : 'l';
4512 used_prefixes |= (prefixes & PREFIX_DATA);
4517 case 'E': /* For jcxz/jecxz */
4518 if (address_mode == mode_64bit)
4520 if (sizeflag & AFLAG)
4526 if (sizeflag & AFLAG)
4528 used_prefixes |= (prefixes & PREFIX_ADDR);
4533 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4535 if (sizeflag & AFLAG)
4536 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4538 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4539 used_prefixes |= (prefixes & PREFIX_ADDR);
4543 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4545 if ((rex & REX_W) || (sizeflag & DFLAG))
4550 used_prefixes |= (prefixes & PREFIX_DATA);
4555 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4556 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4558 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4561 if (prefixes & PREFIX_DS)
4582 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4591 if (sizeflag & SUFFIX_ALWAYS)
4595 if ((prefixes & PREFIX_FWAIT) == 0)
4598 used_prefixes |= PREFIX_FWAIT;
4604 else if (intel_syntax && (sizeflag & DFLAG))
4609 used_prefixes |= (prefixes & PREFIX_DATA);
4614 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4623 if ((prefixes & PREFIX_DATA)
4625 || (sizeflag & SUFFIX_ALWAYS))
4632 if (sizeflag & DFLAG)
4637 used_prefixes |= (prefixes & PREFIX_DATA);
4643 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4645 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4651 if (intel_syntax && !alt)
4654 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4660 if (sizeflag & DFLAG)
4661 *obufp++ = intel_syntax ? 'd' : 'l';
4665 used_prefixes |= (prefixes & PREFIX_DATA);
4672 else if (sizeflag & DFLAG)
4681 if (intel_syntax && !p[1]
4682 && ((rex & REX_W) || (sizeflag & DFLAG)))
4685 used_prefixes |= (prefixes & PREFIX_DATA);
4690 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4692 if (sizeflag & SUFFIX_ALWAYS)
4700 if (sizeflag & SUFFIX_ALWAYS)
4706 if (sizeflag & DFLAG)
4710 used_prefixes |= (prefixes & PREFIX_DATA);
4715 if (prefixes & PREFIX_DATA)
4719 used_prefixes |= (prefixes & PREFIX_DATA);
4730 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4732 /* operand size flag for cwtl, cbtw */
4741 else if (sizeflag & DFLAG)
4746 used_prefixes |= (prefixes & PREFIX_DATA);
4756 oappend (const char *s)
4759 obufp += strlen (s);
4765 if (prefixes & PREFIX_CS)
4767 used_prefixes |= PREFIX_CS;
4768 oappend ("%cs:" + intel_syntax);
4770 if (prefixes & PREFIX_DS)
4772 used_prefixes |= PREFIX_DS;
4773 oappend ("%ds:" + intel_syntax);
4775 if (prefixes & PREFIX_SS)
4777 used_prefixes |= PREFIX_SS;
4778 oappend ("%ss:" + intel_syntax);
4780 if (prefixes & PREFIX_ES)
4782 used_prefixes |= PREFIX_ES;
4783 oappend ("%es:" + intel_syntax);
4785 if (prefixes & PREFIX_FS)
4787 used_prefixes |= PREFIX_FS;
4788 oappend ("%fs:" + intel_syntax);
4790 if (prefixes & PREFIX_GS)
4792 used_prefixes |= PREFIX_GS;
4793 oappend ("%gs:" + intel_syntax);
4798 OP_indirE (int bytemode, int sizeflag)
4802 OP_E (bytemode, sizeflag);
4806 print_operand_value (char *buf, int hex, bfd_vma disp)
4808 if (address_mode == mode_64bit)
4816 sprintf_vma (tmp, disp);
4817 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
4818 strcpy (buf + 2, tmp + i);
4822 bfd_signed_vma v = disp;
4829 /* Check for possible overflow on 0x8000000000000000. */
4832 strcpy (buf, "9223372036854775808");
4846 tmp[28 - i] = (v % 10) + '0';
4850 strcpy (buf, tmp + 29 - i);
4856 sprintf (buf, "0x%x", (unsigned int) disp);
4858 sprintf (buf, "%d", (int) disp);
4862 /* Put DISP in BUF as signed hex number. */
4865 print_displacement (char *buf, bfd_vma disp)
4867 bfd_signed_vma val = disp;
4876 /* Check for possible overflow. */
4879 switch (address_mode)
4882 strcpy (buf + j, "0x8000000000000000");
4885 strcpy (buf + j, "0x80000000");
4888 strcpy (buf + j, "0x8000");
4898 sprintf_vma (tmp, val);
4899 for (i = 0; tmp[i] == '0'; i++)
4903 strcpy (buf + j, tmp + i);
4907 intel_operand_size (int bytemode, int sizeflag)
4913 oappend ("BYTE PTR ");
4917 oappend ("WORD PTR ");
4920 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4922 oappend ("QWORD PTR ");
4923 used_prefixes |= (prefixes & PREFIX_DATA);
4931 oappend ("QWORD PTR ");
4932 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4933 oappend ("DWORD PTR ");
4935 oappend ("WORD PTR ");
4936 used_prefixes |= (prefixes & PREFIX_DATA);
4939 if ((rex & REX_W) || (sizeflag & DFLAG))
4941 oappend ("WORD PTR ");
4943 used_prefixes |= (prefixes & PREFIX_DATA);
4947 oappend ("DWORD PTR ");
4950 oappend ("QWORD PTR ");
4953 if (address_mode == mode_64bit)
4954 oappend ("QWORD PTR ");
4956 oappend ("DWORD PTR ");
4959 if (sizeflag & DFLAG)
4960 oappend ("FWORD PTR ");
4962 oappend ("DWORD PTR ");
4963 used_prefixes |= (prefixes & PREFIX_DATA);
4966 oappend ("TBYTE PTR ");
4969 oappend ("XMMWORD PTR ");
4972 oappend ("OWORD PTR ");
4980 OP_E (int bytemode, int sizeflag)
4989 /* Skip mod/rm byte. */
5000 oappend (names8rex[modrm.rm + add]);
5002 oappend (names8[modrm.rm + add]);
5005 oappend (names16[modrm.rm + add]);
5008 oappend (names32[modrm.rm + add]);
5011 oappend (names64[modrm.rm + add]);
5014 if (address_mode == mode_64bit)
5015 oappend (names64[modrm.rm + add]);
5017 oappend (names32[modrm.rm + add]);
5020 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5022 oappend (names64[modrm.rm + add]);
5023 used_prefixes |= (prefixes & PREFIX_DATA);
5035 oappend (names64[modrm.rm + add]);
5036 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5037 oappend (names32[modrm.rm + add]);
5039 oappend (names16[modrm.rm + add]);
5040 used_prefixes |= (prefixes & PREFIX_DATA);
5045 oappend (INTERNAL_DISASSEMBLER_ERROR);
5053 intel_operand_size (bytemode, sizeflag);
5056 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5058 /* 32/64 bit address mode */
5073 FETCH_DATA (the_info, codep + 1);
5074 index = (*codep >> 3) & 7;
5075 if (address_mode == mode_64bit || index != 0x4)
5076 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5077 scale = (*codep >> 6) & 3;
5089 if ((base & 7) == 5)
5092 if (address_mode == mode_64bit && !havesib)
5098 FETCH_DATA (the_info, codep + 1);
5100 if ((disp & 0x80) != 0)
5108 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5111 if (modrm.mod != 0 || (base & 7) == 5)
5113 if (havedisp || riprel)
5114 print_displacement (scratchbuf, disp);
5116 print_operand_value (scratchbuf, 1, disp);
5117 oappend (scratchbuf);
5125 if (havedisp || (intel_syntax && riprel))
5127 *obufp++ = open_char;
5128 if (intel_syntax && riprel)
5135 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5136 ? names64[base] : names32[base]);
5141 if (!intel_syntax || havebase)
5143 *obufp++ = separator_char;
5146 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5147 ? names64[index] : names32[index]);
5149 if (scale != 0 || (!intel_syntax && index != 4))
5151 *obufp++ = scale_char;
5153 sprintf (scratchbuf, "%d", 1 << scale);
5154 oappend (scratchbuf);
5158 && (disp || modrm.mod != 0 || (base & 7) == 5))
5160 if ((bfd_signed_vma) disp >= 0)
5165 else if (modrm.mod != 1)
5169 disp = - (bfd_signed_vma) disp;
5172 print_displacement (scratchbuf, disp);
5173 oappend (scratchbuf);
5176 *obufp++ = close_char;
5179 else if (intel_syntax)
5181 if (modrm.mod != 0 || (base & 7) == 5)
5183 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5184 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5188 oappend (names_seg[ds_reg - es_reg]);
5191 print_operand_value (scratchbuf, 1, disp);
5192 oappend (scratchbuf);
5197 { /* 16 bit address mode */
5204 if ((disp & 0x8000) != 0)
5209 FETCH_DATA (the_info, codep + 1);
5211 if ((disp & 0x80) != 0)
5216 if ((disp & 0x8000) != 0)
5222 if (modrm.mod != 0 || modrm.rm == 6)
5224 print_displacement (scratchbuf, disp);
5225 oappend (scratchbuf);
5228 if (modrm.mod != 0 || modrm.rm != 6)
5230 *obufp++ = open_char;
5232 oappend (index16[modrm.rm]);
5234 && (disp || modrm.mod != 0 || modrm.rm == 6))
5236 if ((bfd_signed_vma) disp >= 0)
5241 else if (modrm.mod != 1)
5245 disp = - (bfd_signed_vma) disp;
5248 print_displacement (scratchbuf, disp);
5249 oappend (scratchbuf);
5252 *obufp++ = close_char;
5255 else if (intel_syntax)
5257 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5258 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5262 oappend (names_seg[ds_reg - es_reg]);
5265 print_operand_value (scratchbuf, 1, disp & 0xffff);
5266 oappend (scratchbuf);
5272 OP_G (int bytemode, int sizeflag)
5283 oappend (names8rex[modrm.reg + add]);
5285 oappend (names8[modrm.reg + add]);
5288 oappend (names16[modrm.reg + add]);
5291 oappend (names32[modrm.reg + add]);
5294 oappend (names64[modrm.reg + add]);
5303 oappend (names64[modrm.reg + add]);
5304 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5305 oappend (names32[modrm.reg + add]);
5307 oappend (names16[modrm.reg + add]);
5308 used_prefixes |= (prefixes & PREFIX_DATA);
5311 if (address_mode == mode_64bit)
5312 oappend (names64[modrm.reg + add]);
5314 oappend (names32[modrm.reg + add]);
5317 oappend (INTERNAL_DISASSEMBLER_ERROR);
5330 FETCH_DATA (the_info, codep + 8);
5331 a = *codep++ & 0xff;
5332 a |= (*codep++ & 0xff) << 8;
5333 a |= (*codep++ & 0xff) << 16;
5334 a |= (*codep++ & 0xff) << 24;
5335 b = *codep++ & 0xff;
5336 b |= (*codep++ & 0xff) << 8;
5337 b |= (*codep++ & 0xff) << 16;
5338 b |= (*codep++ & 0xff) << 24;
5339 x = a + ((bfd_vma) b << 32);
5347 static bfd_signed_vma
5350 bfd_signed_vma x = 0;
5352 FETCH_DATA (the_info, codep + 4);
5353 x = *codep++ & (bfd_signed_vma) 0xff;
5354 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5355 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5356 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5360 static bfd_signed_vma
5363 bfd_signed_vma x = 0;
5365 FETCH_DATA (the_info, codep + 4);
5366 x = *codep++ & (bfd_signed_vma) 0xff;
5367 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5368 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5369 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5371 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5381 FETCH_DATA (the_info, codep + 2);
5382 x = *codep++ & 0xff;
5383 x |= (*codep++ & 0xff) << 8;
5388 set_op (bfd_vma op, int riprel)
5390 op_index[op_ad] = op_ad;
5391 if (address_mode == mode_64bit)
5393 op_address[op_ad] = op;
5394 op_riprel[op_ad] = riprel;
5398 /* Mask to get a 32-bit address. */
5399 op_address[op_ad] = op & 0xffffffff;
5400 op_riprel[op_ad] = riprel & 0xffffffff;
5405 OP_REG (int code, int sizeflag)
5415 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5416 case sp_reg: case bp_reg: case si_reg: case di_reg:
5417 s = names16[code - ax_reg + add];
5419 case es_reg: case ss_reg: case cs_reg:
5420 case ds_reg: case fs_reg: case gs_reg:
5421 s = names_seg[code - es_reg + add];
5423 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5424 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5427 s = names8rex[code - al_reg + add];
5429 s = names8[code - al_reg];
5431 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5432 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5433 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5435 s = names64[code - rAX_reg + add];
5438 code += eAX_reg - rAX_reg;
5440 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5441 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5444 s = names64[code - eAX_reg + add];
5445 else if (sizeflag & DFLAG)
5446 s = names32[code - eAX_reg + add];
5448 s = names16[code - eAX_reg + add];
5449 used_prefixes |= (prefixes & PREFIX_DATA);
5452 s = INTERNAL_DISASSEMBLER_ERROR;
5459 OP_IMREG (int code, int sizeflag)
5471 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5472 case sp_reg: case bp_reg: case si_reg: case di_reg:
5473 s = names16[code - ax_reg];
5475 case es_reg: case ss_reg: case cs_reg:
5476 case ds_reg: case fs_reg: case gs_reg:
5477 s = names_seg[code - es_reg];
5479 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5480 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5483 s = names8rex[code - al_reg];
5485 s = names8[code - al_reg];
5487 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5488 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5491 s = names64[code - eAX_reg];
5492 else if (sizeflag & DFLAG)
5493 s = names32[code - eAX_reg];
5495 s = names16[code - eAX_reg];
5496 used_prefixes |= (prefixes & PREFIX_DATA);
5499 if ((rex & REX_W) || (sizeflag & DFLAG))
5504 used_prefixes |= (prefixes & PREFIX_DATA);
5507 s = INTERNAL_DISASSEMBLER_ERROR;
5514 OP_I (int bytemode, int sizeflag)
5517 bfd_signed_vma mask = -1;
5522 FETCH_DATA (the_info, codep + 1);
5527 if (address_mode == mode_64bit)
5537 else if (sizeflag & DFLAG)
5547 used_prefixes |= (prefixes & PREFIX_DATA);
5558 oappend (INTERNAL_DISASSEMBLER_ERROR);
5563 scratchbuf[0] = '$';
5564 print_operand_value (scratchbuf + 1, 1, op);
5565 oappend (scratchbuf + intel_syntax);
5566 scratchbuf[0] = '\0';
5570 OP_I64 (int bytemode, int sizeflag)
5573 bfd_signed_vma mask = -1;
5575 if (address_mode != mode_64bit)
5577 OP_I (bytemode, sizeflag);
5584 FETCH_DATA (the_info, codep + 1);
5592 else if (sizeflag & DFLAG)
5602 used_prefixes |= (prefixes & PREFIX_DATA);
5609 oappend (INTERNAL_DISASSEMBLER_ERROR);
5614 scratchbuf[0] = '$';
5615 print_operand_value (scratchbuf + 1, 1, op);
5616 oappend (scratchbuf + intel_syntax);
5617 scratchbuf[0] = '\0';
5621 OP_sI (int bytemode, int sizeflag)
5624 bfd_signed_vma mask = -1;
5629 FETCH_DATA (the_info, codep + 1);
5631 if ((op & 0x80) != 0)
5639 else if (sizeflag & DFLAG)
5648 if ((op & 0x8000) != 0)
5651 used_prefixes |= (prefixes & PREFIX_DATA);
5656 if ((op & 0x8000) != 0)
5660 oappend (INTERNAL_DISASSEMBLER_ERROR);
5664 scratchbuf[0] = '$';
5665 print_operand_value (scratchbuf + 1, 1, op);
5666 oappend (scratchbuf + intel_syntax);
5670 OP_J (int bytemode, int sizeflag)
5674 bfd_vma segment = 0;
5679 FETCH_DATA (the_info, codep + 1);
5681 if ((disp & 0x80) != 0)
5685 if ((sizeflag & DFLAG) || (rex & REX_W))
5690 if ((disp & 0x8000) != 0)
5692 /* In 16bit mode, address is wrapped around at 64k within
5693 the same segment. Otherwise, a data16 prefix on a jump
5694 instruction means that the pc is masked to 16 bits after
5695 the displacement is added! */
5697 if ((prefixes & PREFIX_DATA) == 0)
5698 segment = ((start_pc + codep - start_codep)
5699 & ~((bfd_vma) 0xffff));
5701 used_prefixes |= (prefixes & PREFIX_DATA);
5704 oappend (INTERNAL_DISASSEMBLER_ERROR);
5707 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5709 print_operand_value (scratchbuf, 1, disp);
5710 oappend (scratchbuf);
5714 OP_SEG (int bytemode, int sizeflag)
5716 if (bytemode == w_mode)
5717 oappend (names_seg[modrm.reg]);
5719 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5723 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5727 if (sizeflag & DFLAG)
5737 used_prefixes |= (prefixes & PREFIX_DATA);
5739 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
5741 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
5742 oappend (scratchbuf);
5746 OP_OFF (int bytemode, int sizeflag)
5750 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5751 intel_operand_size (bytemode, sizeflag);
5754 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5761 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5762 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5764 oappend (names_seg[ds_reg - es_reg]);
5768 print_operand_value (scratchbuf, 1, off);
5769 oappend (scratchbuf);
5773 OP_OFF64 (int bytemode, int sizeflag)
5777 if (address_mode != mode_64bit
5778 || (prefixes & PREFIX_ADDR))
5780 OP_OFF (bytemode, sizeflag);
5784 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5785 intel_operand_size (bytemode, sizeflag);
5792 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5793 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5795 oappend (names_seg[ds_reg - es_reg]);
5799 print_operand_value (scratchbuf, 1, off);
5800 oappend (scratchbuf);
5804 ptr_reg (int code, int sizeflag)
5808 *obufp++ = open_char;
5809 used_prefixes |= (prefixes & PREFIX_ADDR);
5810 if (address_mode == mode_64bit)
5812 if (!(sizeflag & AFLAG))
5813 s = names32[code - eAX_reg];
5815 s = names64[code - eAX_reg];
5817 else if (sizeflag & AFLAG)
5818 s = names32[code - eAX_reg];
5820 s = names16[code - eAX_reg];
5822 *obufp++ = close_char;
5827 OP_ESreg (int code, int sizeflag)
5833 case 0x6d: /* insw/insl */
5834 intel_operand_size (z_mode, sizeflag);
5836 case 0xa5: /* movsw/movsl/movsq */
5837 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5838 case 0xab: /* stosw/stosl */
5839 case 0xaf: /* scasw/scasl */
5840 intel_operand_size (v_mode, sizeflag);
5843 intel_operand_size (b_mode, sizeflag);
5846 oappend ("%es:" + intel_syntax);
5847 ptr_reg (code, sizeflag);
5851 OP_DSreg (int code, int sizeflag)
5857 case 0x6f: /* outsw/outsl */
5858 intel_operand_size (z_mode, sizeflag);
5860 case 0xa5: /* movsw/movsl/movsq */
5861 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5862 case 0xad: /* lodsw/lodsl/lodsq */
5863 intel_operand_size (v_mode, sizeflag);
5866 intel_operand_size (b_mode, sizeflag);
5876 prefixes |= PREFIX_DS;
5878 ptr_reg (code, sizeflag);
5882 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5890 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5893 used_prefixes |= PREFIX_LOCK;
5896 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
5897 oappend (scratchbuf + intel_syntax);
5901 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5908 sprintf (scratchbuf, "db%d", modrm.reg + add);
5910 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
5911 oappend (scratchbuf);
5915 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5917 sprintf (scratchbuf, "%%tr%d", modrm.reg);
5918 oappend (scratchbuf + intel_syntax);
5922 OP_R (int bytemode, int sizeflag)
5925 OP_E (bytemode, sizeflag);
5931 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5933 used_prefixes |= (prefixes & PREFIX_DATA);
5934 if (prefixes & PREFIX_DATA)
5940 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5943 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5944 oappend (scratchbuf + intel_syntax);
5948 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5954 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5955 oappend (scratchbuf + intel_syntax);
5959 OP_EM (int bytemode, int sizeflag)
5963 if (intel_syntax && bytemode == v_mode)
5965 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5966 used_prefixes |= (prefixes & PREFIX_DATA);
5968 OP_E (bytemode, sizeflag);
5972 /* Skip mod/rm byte. */
5975 used_prefixes |= (prefixes & PREFIX_DATA);
5976 if (prefixes & PREFIX_DATA)
5983 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
5986 sprintf (scratchbuf, "%%mm%d", modrm.rm);
5987 oappend (scratchbuf + intel_syntax);
5990 /* cvt* are the only instructions in sse2 which have
5991 both SSE and MMX operands and also have 0x66 prefix
5992 in their opcode. 0x66 was originally used to differentiate
5993 between SSE and MMX instruction(operands). So we have to handle the
5994 cvt* separately using OP_EMC and OP_MXC */
5996 OP_EMC (int bytemode, int sizeflag)
6000 if (intel_syntax && bytemode == v_mode)
6002 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6003 used_prefixes |= (prefixes & PREFIX_DATA);
6005 OP_E (bytemode, sizeflag);
6009 /* Skip mod/rm byte. */
6012 used_prefixes |= (prefixes & PREFIX_DATA);
6013 sprintf (scratchbuf, "%%mm%d", modrm.rm);
6014 oappend (scratchbuf + intel_syntax);
6018 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6020 used_prefixes |= (prefixes & PREFIX_DATA);
6021 sprintf (scratchbuf, "%%mm%d", modrm.reg);
6022 oappend (scratchbuf + intel_syntax);
6026 OP_EX (int bytemode, int sizeflag)
6031 OP_E (bytemode, sizeflag);
6038 /* Skip mod/rm byte. */
6041 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
6042 oappend (scratchbuf + intel_syntax);
6046 OP_MS (int bytemode, int sizeflag)
6049 OP_EM (bytemode, sizeflag);
6055 OP_XS (int bytemode, int sizeflag)
6058 OP_EX (bytemode, sizeflag);
6064 OP_M (int bytemode, int sizeflag)
6067 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6070 OP_E (bytemode, sizeflag);
6074 OP_0f07 (int bytemode, int sizeflag)
6076 if (modrm.mod != 3 || modrm.rm != 0)
6079 OP_E (bytemode, sizeflag);
6082 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6083 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6086 NOP_Fixup1 (int bytemode, int sizeflag)
6088 if ((prefixes & PREFIX_DATA) != 0
6091 && address_mode == mode_64bit))
6092 OP_REG (bytemode, sizeflag);
6094 strcpy (obuf, "nop");
6098 NOP_Fixup2 (int bytemode, int sizeflag)
6100 if ((prefixes & PREFIX_DATA) != 0
6103 && address_mode == mode_64bit))
6104 OP_IMREG (bytemode, sizeflag);
6107 static const char *const Suffix3DNow[] = {
6108 /* 00 */ NULL, NULL, NULL, NULL,
6109 /* 04 */ NULL, NULL, NULL, NULL,
6110 /* 08 */ NULL, NULL, NULL, NULL,
6111 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6112 /* 10 */ NULL, NULL, NULL, NULL,
6113 /* 14 */ NULL, NULL, NULL, NULL,
6114 /* 18 */ NULL, NULL, NULL, NULL,
6115 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
6116 /* 20 */ NULL, NULL, NULL, NULL,
6117 /* 24 */ NULL, NULL, NULL, NULL,
6118 /* 28 */ NULL, NULL, NULL, NULL,
6119 /* 2C */ NULL, NULL, NULL, NULL,
6120 /* 30 */ NULL, NULL, NULL, NULL,
6121 /* 34 */ NULL, NULL, NULL, NULL,
6122 /* 38 */ NULL, NULL, NULL, NULL,
6123 /* 3C */ NULL, NULL, NULL, NULL,
6124 /* 40 */ NULL, NULL, NULL, NULL,
6125 /* 44 */ NULL, NULL, NULL, NULL,
6126 /* 48 */ NULL, NULL, NULL, NULL,
6127 /* 4C */ NULL, NULL, NULL, NULL,
6128 /* 50 */ NULL, NULL, NULL, NULL,
6129 /* 54 */ NULL, NULL, NULL, NULL,
6130 /* 58 */ NULL, NULL, NULL, NULL,
6131 /* 5C */ NULL, NULL, NULL, NULL,
6132 /* 60 */ NULL, NULL, NULL, NULL,
6133 /* 64 */ NULL, NULL, NULL, NULL,
6134 /* 68 */ NULL, NULL, NULL, NULL,
6135 /* 6C */ NULL, NULL, NULL, NULL,
6136 /* 70 */ NULL, NULL, NULL, NULL,
6137 /* 74 */ NULL, NULL, NULL, NULL,
6138 /* 78 */ NULL, NULL, NULL, NULL,
6139 /* 7C */ NULL, NULL, NULL, NULL,
6140 /* 80 */ NULL, NULL, NULL, NULL,
6141 /* 84 */ NULL, NULL, NULL, NULL,
6142 /* 88 */ NULL, NULL, "pfnacc", NULL,
6143 /* 8C */ NULL, NULL, "pfpnacc", NULL,
6144 /* 90 */ "pfcmpge", NULL, NULL, NULL,
6145 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6146 /* 98 */ NULL, NULL, "pfsub", NULL,
6147 /* 9C */ NULL, NULL, "pfadd", NULL,
6148 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
6149 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6150 /* A8 */ NULL, NULL, "pfsubr", NULL,
6151 /* AC */ NULL, NULL, "pfacc", NULL,
6152 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
6153 /* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
6154 /* B8 */ NULL, NULL, NULL, "pswapd",
6155 /* BC */ NULL, NULL, NULL, "pavgusb",
6156 /* C0 */ NULL, NULL, NULL, NULL,
6157 /* C4 */ NULL, NULL, NULL, NULL,
6158 /* C8 */ NULL, NULL, NULL, NULL,
6159 /* CC */ NULL, NULL, NULL, NULL,
6160 /* D0 */ NULL, NULL, NULL, NULL,
6161 /* D4 */ NULL, NULL, NULL, NULL,
6162 /* D8 */ NULL, NULL, NULL, NULL,
6163 /* DC */ NULL, NULL, NULL, NULL,
6164 /* E0 */ NULL, NULL, NULL, NULL,
6165 /* E4 */ NULL, NULL, NULL, NULL,
6166 /* E8 */ NULL, NULL, NULL, NULL,
6167 /* EC */ NULL, NULL, NULL, NULL,
6168 /* F0 */ NULL, NULL, NULL, NULL,
6169 /* F4 */ NULL, NULL, NULL, NULL,
6170 /* F8 */ NULL, NULL, NULL, NULL,
6171 /* FC */ NULL, NULL, NULL, NULL,
6175 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6177 const char *mnemonic;
6179 FETCH_DATA (the_info, codep + 1);
6180 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6181 place where an 8-bit immediate would normally go. ie. the last
6182 byte of the instruction. */
6183 obufp = obuf + strlen (obuf);
6184 mnemonic = Suffix3DNow[*codep++ & 0xff];
6189 /* Since a variable sized modrm/sib chunk is between the start
6190 of the opcode (0x0f0f) and the opcode suffix, we need to do
6191 all the modrm processing first, and don't know until now that
6192 we have a bad opcode. This necessitates some cleaning up. */
6193 op_out[0][0] = '\0';
6194 op_out[1][0] = '\0';
6199 static const char *simd_cmp_op[] = {
6211 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6213 unsigned int cmp_type;
6215 FETCH_DATA (the_info, codep + 1);
6216 obufp = obuf + strlen (obuf);
6217 cmp_type = *codep++ & 0xff;
6220 char suffix1 = 'p', suffix2 = 's';
6221 used_prefixes |= (prefixes & PREFIX_REPZ);
6222 if (prefixes & PREFIX_REPZ)
6226 used_prefixes |= (prefixes & PREFIX_DATA);
6227 if (prefixes & PREFIX_DATA)
6231 used_prefixes |= (prefixes & PREFIX_REPNZ);
6232 if (prefixes & PREFIX_REPNZ)
6233 suffix1 = 's', suffix2 = 'd';
6236 sprintf (scratchbuf, "cmp%s%c%c",
6237 simd_cmp_op[cmp_type], suffix1, suffix2);
6238 used_prefixes |= (prefixes & PREFIX_REPZ);
6239 oappend (scratchbuf);
6243 /* We have a bad extension byte. Clean up. */
6244 op_out[0][0] = '\0';
6245 op_out[1][0] = '\0';
6251 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
6252 int sizeflag ATTRIBUTE_UNUSED)
6254 /* mwait %eax,%ecx */
6257 const char **names = (address_mode == mode_64bit
6258 ? names64 : names32);
6259 strcpy (op_out[0], names[0]);
6260 strcpy (op_out[1], names[1]);
6263 /* Skip mod/rm byte. */
6269 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
6270 int sizeflag ATTRIBUTE_UNUSED)
6272 /* monitor %eax,%ecx,%edx" */
6275 const char **op1_names;
6276 const char **names = (address_mode == mode_64bit
6277 ? names64 : names32);
6279 if (!(prefixes & PREFIX_ADDR))
6280 op1_names = (address_mode == mode_16bit
6284 /* Remove "addr16/addr32". */
6286 op1_names = (address_mode != mode_32bit
6287 ? names32 : names16);
6288 used_prefixes |= PREFIX_ADDR;
6290 strcpy (op_out[0], op1_names[0]);
6291 strcpy (op_out[1], names[1]);
6292 strcpy (op_out[2], names[2]);
6295 /* Skip mod/rm byte. */
6301 SVME_Fixup (int bytemode, int sizeflag)
6333 OP_M (bytemode, sizeflag);
6336 /* Override "lidt". */
6337 p = obuf + strlen (obuf) - 4;
6338 /* We might have a suffix. */
6342 if (!(prefixes & PREFIX_ADDR))
6347 used_prefixes |= PREFIX_ADDR;
6351 strcpy (op_out[1], names32[1]);
6357 *obufp++ = open_char;
6358 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6362 strcpy (obufp, alt);
6363 obufp += strlen (alt);
6364 *obufp++ = close_char;
6373 /* Throw away prefixes and 1st. opcode byte. */
6374 codep = insn_codep + 1;
6379 REP_Fixup (int bytemode, int sizeflag)
6381 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6383 if (prefixes & PREFIX_REPZ)
6384 repz_prefix = "rep ";
6391 OP_IMREG (bytemode, sizeflag);
6394 OP_ESreg (bytemode, sizeflag);
6397 OP_DSreg (bytemode, sizeflag);
6406 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6411 /* Change cmpxchg8b to cmpxchg16b. */
6412 char *p = obuf + strlen (obuf) - 2;
6416 OP_M (bytemode, sizeflag);
6420 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6422 sprintf (scratchbuf, "%%xmm%d", reg);
6423 oappend (scratchbuf + intel_syntax);
6427 CRC32_Fixup (int bytemode, int sizeflag)
6429 /* Add proper suffix to "crc32". */
6430 char *p = obuf + strlen (obuf);
6447 else if (sizeflag & DFLAG)
6451 used_prefixes |= (prefixes & PREFIX_DATA);
6454 oappend (INTERNAL_DISASSEMBLER_ERROR);
6463 /* Skip mod/rm byte. */
6468 add = (rex & REX_B) ? 8 : 0;
6469 if (bytemode == b_mode)
6473 oappend (names8rex[modrm.rm + add]);
6475 oappend (names8[modrm.rm + add]);
6481 oappend (names64[modrm.rm + add]);
6482 else if ((prefixes & PREFIX_DATA))
6483 oappend (names16[modrm.rm + add]);
6485 oappend (names32[modrm.rm + add]);
6489 OP_E (bytemode, sizeflag);