1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
48 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma, disassemble_info *);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_VMX (int, int);
92 static void OP_0fae (int, int);
93 static void OP_0f07 (int, int);
94 static void NOP_Fixup (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void PNI_Fixup (int, int);
99 static void SVME_Fixup (int, int);
100 static void INVLPG_Fixup (int, int);
101 static void BadOp (void);
102 static void SEG_Fixup (int, int);
103 static void VMX_Fixup (int, int);
106 /* Points to first byte not fetched. */
107 bfd_byte *max_fetched;
108 bfd_byte the_buffer[MAXLEN];
114 /* The opcode for the fwait instruction, which we treat as a prefix
116 #define FWAIT_OPCODE (0x9b)
118 /* Set to 1 for 64bit mode disassembly. */
119 static int mode_64bit;
121 /* Flags for the prefixes for the current instruction. See below. */
124 /* REX prefix the current instruction. See below. */
126 /* Bits of REX we've already used. */
132 /* Mark parts used in the REX prefix. When we are testing for
133 empty prefix (for 8bit register REX extension), just mask it
134 out. Otherwise test for REX bit is excuse for existence of REX
135 only in case value is nonzero. */
136 #define USED_REX(value) \
139 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
144 /* Flags for prefixes which we somehow handled when printing the
145 current instruction. */
146 static int used_prefixes;
148 /* Flags stored in PREFIXES. */
149 #define PREFIX_REPZ 1
150 #define PREFIX_REPNZ 2
151 #define PREFIX_LOCK 4
153 #define PREFIX_SS 0x10
154 #define PREFIX_DS 0x20
155 #define PREFIX_ES 0x40
156 #define PREFIX_FS 0x80
157 #define PREFIX_GS 0x100
158 #define PREFIX_DATA 0x200
159 #define PREFIX_ADDR 0x400
160 #define PREFIX_FWAIT 0x800
162 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
163 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
165 #define FETCH_DATA(info, addr) \
166 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
167 ? 1 : fetch_data ((info), (addr)))
170 fetch_data (struct disassemble_info *info, bfd_byte *addr)
173 struct dis_private *priv = (struct dis_private *) info->private_data;
174 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
176 status = (*info->read_memory_func) (start,
178 addr - priv->max_fetched,
182 /* If we did manage to read at least one byte, then
183 print_insn_i386 will do something sensible. Otherwise, print
184 an error. We do that here because this is where we know
186 if (priv->max_fetched == priv->the_buffer)
187 (*info->memory_error_func) (status, start, info);
188 longjmp (priv->bailout, 1);
191 priv->max_fetched = addr;
197 #define Eb OP_E, b_mode
198 #define Ev OP_E, v_mode
199 #define Ed OP_E, d_mode
200 #define Eq OP_E, q_mode
201 #define Edq OP_E, dq_mode
202 #define Edqw OP_E, dqw_mode
203 #define indirEv OP_indirE, stack_v_mode
204 #define indirEp OP_indirE, f_mode
205 #define stackEv OP_E, stack_v_mode
206 #define Em OP_E, m_mode
207 #define Ew OP_E, w_mode
208 #define Ma OP_E, v_mode
209 #define M OP_M, 0 /* lea, lgdt, etc. */
210 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
211 #define Gb OP_G, b_mode
212 #define Gv OP_G, v_mode
213 #define Gd OP_G, d_mode
214 #define Gdq OP_G, dq_mode
215 #define Gm OP_G, m_mode
216 #define Gw OP_G, w_mode
217 #define Rd OP_Rd, d_mode
218 #define Rm OP_Rd, m_mode
219 #define Ib OP_I, b_mode
220 #define sIb OP_sI, b_mode /* sign extened byte */
221 #define Iv OP_I, v_mode
222 #define Iq OP_I, q_mode
223 #define Iv64 OP_I64, v_mode
224 #define Iw OP_I, w_mode
225 #define I1 OP_I, const_1_mode
226 #define Jb OP_J, b_mode
227 #define Jv OP_J, v_mode
228 #define Cm OP_C, m_mode
229 #define Dm OP_D, m_mode
230 #define Td OP_T, d_mode
231 #define Sv SEG_Fixup, v_mode
233 #define RMeAX OP_REG, eAX_reg
234 #define RMeBX OP_REG, eBX_reg
235 #define RMeCX OP_REG, eCX_reg
236 #define RMeDX OP_REG, eDX_reg
237 #define RMeSP OP_REG, eSP_reg
238 #define RMeBP OP_REG, eBP_reg
239 #define RMeSI OP_REG, eSI_reg
240 #define RMeDI OP_REG, eDI_reg
241 #define RMrAX OP_REG, rAX_reg
242 #define RMrBX OP_REG, rBX_reg
243 #define RMrCX OP_REG, rCX_reg
244 #define RMrDX OP_REG, rDX_reg
245 #define RMrSP OP_REG, rSP_reg
246 #define RMrBP OP_REG, rBP_reg
247 #define RMrSI OP_REG, rSI_reg
248 #define RMrDI OP_REG, rDI_reg
249 #define RMAL OP_REG, al_reg
250 #define RMAL OP_REG, al_reg
251 #define RMCL OP_REG, cl_reg
252 #define RMDL OP_REG, dl_reg
253 #define RMBL OP_REG, bl_reg
254 #define RMAH OP_REG, ah_reg
255 #define RMCH OP_REG, ch_reg
256 #define RMDH OP_REG, dh_reg
257 #define RMBH OP_REG, bh_reg
258 #define RMAX OP_REG, ax_reg
259 #define RMDX OP_REG, dx_reg
261 #define eAX OP_IMREG, eAX_reg
262 #define eBX OP_IMREG, eBX_reg
263 #define eCX OP_IMREG, eCX_reg
264 #define eDX OP_IMREG, eDX_reg
265 #define eSP OP_IMREG, eSP_reg
266 #define eBP OP_IMREG, eBP_reg
267 #define eSI OP_IMREG, eSI_reg
268 #define eDI OP_IMREG, eDI_reg
269 #define AL OP_IMREG, al_reg
270 #define AL OP_IMREG, al_reg
271 #define CL OP_IMREG, cl_reg
272 #define DL OP_IMREG, dl_reg
273 #define BL OP_IMREG, bl_reg
274 #define AH OP_IMREG, ah_reg
275 #define CH OP_IMREG, ch_reg
276 #define DH OP_IMREG, dh_reg
277 #define BH OP_IMREG, bh_reg
278 #define AX OP_IMREG, ax_reg
279 #define DX OP_IMREG, dx_reg
280 #define indirDX OP_IMREG, indir_dx_reg
282 #define Sw OP_SEG, w_mode
284 #define Ob OP_OFF64, b_mode
285 #define Ov OP_OFF64, v_mode
286 #define Xb OP_DSreg, eSI_reg
287 #define Xv OP_DSreg, eSI_reg
288 #define Yb OP_ESreg, eDI_reg
289 #define Yv OP_ESreg, eDI_reg
290 #define DSBX OP_DSreg, eBX_reg
292 #define es OP_REG, es_reg
293 #define ss OP_REG, ss_reg
294 #define cs OP_REG, cs_reg
295 #define ds OP_REG, ds_reg
296 #define fs OP_REG, fs_reg
297 #define gs OP_REG, gs_reg
301 #define EM OP_EM, v_mode
302 #define EX OP_EX, v_mode
303 #define MS OP_MS, v_mode
304 #define XS OP_XS, v_mode
305 #define VM OP_VMX, q_mode
306 #define OPSUF OP_3DNowSuffix, 0
307 #define OPSIMD OP_SIMD_Suffix, 0
309 #define cond_jump_flag NULL, cond_jump_mode
310 #define loop_jcxz_flag NULL, loop_jcxz_mode
312 /* bits in sizeflag */
313 #define SUFFIX_ALWAYS 4
317 #define b_mode 1 /* byte operand */
318 #define v_mode 2 /* operand size depends on prefixes */
319 #define w_mode 3 /* word operand */
320 #define d_mode 4 /* double word operand */
321 #define q_mode 5 /* quad word operand */
322 #define t_mode 6 /* ten-byte operand */
323 #define x_mode 7 /* 16-byte XMM operand */
324 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
325 #define cond_jump_mode 9
326 #define loop_jcxz_mode 10
327 #define dq_mode 11 /* operand size depends on REX prefixes. */
328 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
329 #define f_mode 13 /* 4- or 6-byte pointer operand */
330 #define const_1_mode 14
331 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
376 #define indir_dx_reg 150
380 #define USE_PREFIX_USER_TABLE 3
381 #define X86_64_SPECIAL 4
383 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
385 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
386 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
387 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
388 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
389 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
390 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
391 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
392 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
393 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
394 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
395 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
396 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
397 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
398 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
399 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
400 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
401 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
402 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
403 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
404 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
405 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
406 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
407 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
408 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
409 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
411 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
412 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
413 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
414 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
415 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
416 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
417 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
418 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
419 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
420 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
421 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
422 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
423 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
424 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
425 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
426 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
427 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
428 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
429 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
430 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
431 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
432 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
433 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
434 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
435 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
436 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
437 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
438 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
439 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
440 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
441 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
442 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
443 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
445 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
447 typedef void (*op_rtn) (int bytemode, int sizeflag);
459 /* Upper case letters in the instruction names here are macros.
460 'A' => print 'b' if no register operands or suffix_always is true
461 'B' => print 'b' if suffix_always is true
462 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
464 'E' => print 'e' if 32-bit form of jcxz
465 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
466 'H' => print ",pt" or ",pn" branch hint
467 'I' => honor following macro letter even in Intel mode (implemented only
468 . for some of the macro letters)
470 'L' => print 'l' if suffix_always is true
471 'N' => print 'n' if instruction has no wait "prefix"
472 'O' => print 'd', or 'o'
473 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
474 . or suffix_always is true. print 'q' if rex prefix is present.
475 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
477 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
478 'S' => print 'w', 'l' or 'q' if suffix_always is true
479 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
480 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
481 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
482 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
483 'X' => print 's', 'd' depending on data16 prefix (for XMM)
484 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
486 Many of the above letters print nothing in Intel mode. See "putop"
489 Braces '{' and '}', and vertical bars '|', indicate alternative
490 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
491 modes. In cases where there are only two alternatives, the X86_64
492 instruction is reserved, and "(bad)" is printed.
495 static const struct dis386 dis386[] = {
497 { "addB", Eb, Gb, XX },
498 { "addS", Ev, Gv, XX },
499 { "addB", Gb, Eb, XX },
500 { "addS", Gv, Ev, XX },
501 { "addB", AL, Ib, XX },
502 { "addS", eAX, Iv, XX },
503 { "push{T|}", es, XX, XX },
504 { "pop{T|}", es, XX, XX },
506 { "orB", Eb, Gb, XX },
507 { "orS", Ev, Gv, XX },
508 { "orB", Gb, Eb, XX },
509 { "orS", Gv, Ev, XX },
510 { "orB", AL, Ib, XX },
511 { "orS", eAX, Iv, XX },
512 { "push{T|}", cs, XX, XX },
513 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
515 { "adcB", Eb, Gb, XX },
516 { "adcS", Ev, Gv, XX },
517 { "adcB", Gb, Eb, XX },
518 { "adcS", Gv, Ev, XX },
519 { "adcB", AL, Ib, XX },
520 { "adcS", eAX, Iv, XX },
521 { "push{T|}", ss, XX, XX },
522 { "pop{T|}", ss, XX, XX },
524 { "sbbB", Eb, Gb, XX },
525 { "sbbS", Ev, Gv, XX },
526 { "sbbB", Gb, Eb, XX },
527 { "sbbS", Gv, Ev, XX },
528 { "sbbB", AL, Ib, XX },
529 { "sbbS", eAX, Iv, XX },
530 { "push{T|}", ds, XX, XX },
531 { "pop{T|}", ds, XX, XX },
533 { "andB", Eb, Gb, XX },
534 { "andS", Ev, Gv, XX },
535 { "andB", Gb, Eb, XX },
536 { "andS", Gv, Ev, XX },
537 { "andB", AL, Ib, XX },
538 { "andS", eAX, Iv, XX },
539 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
540 { "daa{|}", XX, XX, XX },
542 { "subB", Eb, Gb, XX },
543 { "subS", Ev, Gv, XX },
544 { "subB", Gb, Eb, XX },
545 { "subS", Gv, Ev, XX },
546 { "subB", AL, Ib, XX },
547 { "subS", eAX, Iv, XX },
548 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
549 { "das{|}", XX, XX, XX },
551 { "xorB", Eb, Gb, XX },
552 { "xorS", Ev, Gv, XX },
553 { "xorB", Gb, Eb, XX },
554 { "xorS", Gv, Ev, XX },
555 { "xorB", AL, Ib, XX },
556 { "xorS", eAX, Iv, XX },
557 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
558 { "aaa{|}", XX, XX, XX },
560 { "cmpB", Eb, Gb, XX },
561 { "cmpS", Ev, Gv, XX },
562 { "cmpB", Gb, Eb, XX },
563 { "cmpS", Gv, Ev, XX },
564 { "cmpB", AL, Ib, XX },
565 { "cmpS", eAX, Iv, XX },
566 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
567 { "aas{|}", XX, XX, XX },
569 { "inc{S|}", RMeAX, XX, XX },
570 { "inc{S|}", RMeCX, XX, XX },
571 { "inc{S|}", RMeDX, XX, XX },
572 { "inc{S|}", RMeBX, XX, XX },
573 { "inc{S|}", RMeSP, XX, XX },
574 { "inc{S|}", RMeBP, XX, XX },
575 { "inc{S|}", RMeSI, XX, XX },
576 { "inc{S|}", RMeDI, XX, XX },
578 { "dec{S|}", RMeAX, XX, XX },
579 { "dec{S|}", RMeCX, XX, XX },
580 { "dec{S|}", RMeDX, XX, XX },
581 { "dec{S|}", RMeBX, XX, XX },
582 { "dec{S|}", RMeSP, XX, XX },
583 { "dec{S|}", RMeBP, XX, XX },
584 { "dec{S|}", RMeSI, XX, XX },
585 { "dec{S|}", RMeDI, XX, XX },
587 { "pushV", RMrAX, XX, XX },
588 { "pushV", RMrCX, XX, XX },
589 { "pushV", RMrDX, XX, XX },
590 { "pushV", RMrBX, XX, XX },
591 { "pushV", RMrSP, XX, XX },
592 { "pushV", RMrBP, XX, XX },
593 { "pushV", RMrSI, XX, XX },
594 { "pushV", RMrDI, XX, XX },
596 { "popV", RMrAX, XX, XX },
597 { "popV", RMrCX, XX, XX },
598 { "popV", RMrDX, XX, XX },
599 { "popV", RMrBX, XX, XX },
600 { "popV", RMrSP, XX, XX },
601 { "popV", RMrBP, XX, XX },
602 { "popV", RMrSI, XX, XX },
603 { "popV", RMrDI, XX, XX },
605 { "pusha{P|}", XX, XX, XX },
606 { "popa{P|}", XX, XX, XX },
607 { "bound{S|}", Gv, Ma, XX },
609 { "(bad)", XX, XX, XX }, /* seg fs */
610 { "(bad)", XX, XX, XX }, /* seg gs */
611 { "(bad)", XX, XX, XX }, /* op size prefix */
612 { "(bad)", XX, XX, XX }, /* adr size prefix */
614 { "pushT", Iq, XX, XX },
615 { "imulS", Gv, Ev, Iv },
616 { "pushT", sIb, XX, XX },
617 { "imulS", Gv, Ev, sIb },
618 { "ins{b||b|}", Yb, indirDX, XX },
619 { "ins{R||R|}", Yv, indirDX, XX },
620 { "outs{b||b|}", indirDX, Xb, XX },
621 { "outs{R||R|}", indirDX, Xv, XX },
623 { "joH", Jb, XX, cond_jump_flag },
624 { "jnoH", Jb, XX, cond_jump_flag },
625 { "jbH", Jb, XX, cond_jump_flag },
626 { "jaeH", Jb, XX, cond_jump_flag },
627 { "jeH", Jb, XX, cond_jump_flag },
628 { "jneH", Jb, XX, cond_jump_flag },
629 { "jbeH", Jb, XX, cond_jump_flag },
630 { "jaH", Jb, XX, cond_jump_flag },
632 { "jsH", Jb, XX, cond_jump_flag },
633 { "jnsH", Jb, XX, cond_jump_flag },
634 { "jpH", Jb, XX, cond_jump_flag },
635 { "jnpH", Jb, XX, cond_jump_flag },
636 { "jlH", Jb, XX, cond_jump_flag },
637 { "jgeH", Jb, XX, cond_jump_flag },
638 { "jleH", Jb, XX, cond_jump_flag },
639 { "jgH", Jb, XX, cond_jump_flag },
643 { "(bad)", XX, XX, XX },
645 { "testB", Eb, Gb, XX },
646 { "testS", Ev, Gv, XX },
647 { "xchgB", Eb, Gb, XX },
648 { "xchgS", Ev, Gv, XX },
650 { "movB", Eb, Gb, XX },
651 { "movS", Ev, Gv, XX },
652 { "movB", Gb, Eb, XX },
653 { "movS", Gv, Ev, XX },
654 { "movQ", Sv, Sw, XX },
655 { "leaS", Gv, M, XX },
656 { "movQ", Sw, Sv, XX },
657 { "popU", stackEv, XX, XX },
659 { "nop", NOP_Fixup, 0, XX, XX },
660 { "xchgS", RMeCX, eAX, XX },
661 { "xchgS", RMeDX, eAX, XX },
662 { "xchgS", RMeBX, eAX, XX },
663 { "xchgS", RMeSP, eAX, XX },
664 { "xchgS", RMeBP, eAX, XX },
665 { "xchgS", RMeSI, eAX, XX },
666 { "xchgS", RMeDI, eAX, XX },
668 { "cW{tR||tR|}", XX, XX, XX },
669 { "cR{tO||tO|}", XX, XX, XX },
670 { "Jcall{T|}", Ap, XX, XX },
671 { "(bad)", XX, XX, XX }, /* fwait */
672 { "pushfT", XX, XX, XX },
673 { "popfT", XX, XX, XX },
674 { "sahf{|}", XX, XX, XX },
675 { "lahf{|}", XX, XX, XX },
677 { "movB", AL, Ob, XX },
678 { "movS", eAX, Ov, XX },
679 { "movB", Ob, AL, XX },
680 { "movS", Ov, eAX, XX },
681 { "movs{b||b|}", Yb, Xb, XX },
682 { "movs{R||R|}", Yv, Xv, XX },
683 { "cmps{b||b|}", Xb, Yb, XX },
684 { "cmps{R||R|}", Xv, Yv, XX },
686 { "testB", AL, Ib, XX },
687 { "testS", eAX, Iv, XX },
688 { "stosB", Yb, AL, XX },
689 { "stosS", Yv, eAX, XX },
690 { "lodsB", AL, Xb, XX },
691 { "lodsS", eAX, Xv, XX },
692 { "scasB", AL, Yb, XX },
693 { "scasS", eAX, Yv, XX },
695 { "movB", RMAL, Ib, XX },
696 { "movB", RMCL, Ib, XX },
697 { "movB", RMDL, Ib, XX },
698 { "movB", RMBL, Ib, XX },
699 { "movB", RMAH, Ib, XX },
700 { "movB", RMCH, Ib, XX },
701 { "movB", RMDH, Ib, XX },
702 { "movB", RMBH, Ib, XX },
704 { "movS", RMeAX, Iv64, XX },
705 { "movS", RMeCX, Iv64, XX },
706 { "movS", RMeDX, Iv64, XX },
707 { "movS", RMeBX, Iv64, XX },
708 { "movS", RMeSP, Iv64, XX },
709 { "movS", RMeBP, Iv64, XX },
710 { "movS", RMeSI, Iv64, XX },
711 { "movS", RMeDI, Iv64, XX },
715 { "retT", Iw, XX, XX },
716 { "retT", XX, XX, XX },
717 { "les{S|}", Gv, Mp, XX },
718 { "ldsS", Gv, Mp, XX },
719 { "movA", Eb, Ib, XX },
720 { "movQ", Ev, Iv, XX },
722 { "enterT", Iw, Ib, XX },
723 { "leaveT", XX, XX, XX },
724 { "lretP", Iw, XX, XX },
725 { "lretP", XX, XX, XX },
726 { "int3", XX, XX, XX },
727 { "int", Ib, XX, XX },
728 { "into{|}", XX, XX, XX },
729 { "iretP", XX, XX, XX },
735 { "aam{|}", sIb, XX, XX },
736 { "aad{|}", sIb, XX, XX },
737 { "(bad)", XX, XX, XX },
738 { "xlat", DSBX, XX, XX },
749 { "loopneFH", Jb, XX, loop_jcxz_flag },
750 { "loopeFH", Jb, XX, loop_jcxz_flag },
751 { "loopFH", Jb, XX, loop_jcxz_flag },
752 { "jEcxzH", Jb, XX, loop_jcxz_flag },
753 { "inB", AL, Ib, XX },
754 { "inS", eAX, Ib, XX },
755 { "outB", Ib, AL, XX },
756 { "outS", Ib, eAX, XX },
758 { "callT", Jv, XX, XX },
759 { "jmpT", Jv, XX, XX },
760 { "Jjmp{T|}", Ap, XX, XX },
761 { "jmp", Jb, XX, XX },
762 { "inB", AL, indirDX, XX },
763 { "inS", eAX, indirDX, XX },
764 { "outB", indirDX, AL, XX },
765 { "outS", indirDX, eAX, XX },
767 { "(bad)", XX, XX, XX }, /* lock prefix */
768 { "icebp", XX, XX, XX },
769 { "(bad)", XX, XX, XX }, /* repne */
770 { "(bad)", XX, XX, XX }, /* repz */
771 { "hlt", XX, XX, XX },
772 { "cmc", XX, XX, XX },
776 { "clc", XX, XX, XX },
777 { "stc", XX, XX, XX },
778 { "cli", XX, XX, XX },
779 { "sti", XX, XX, XX },
780 { "cld", XX, XX, XX },
781 { "std", XX, XX, XX },
786 static const struct dis386 dis386_twobyte[] = {
790 { "larS", Gv, Ew, XX },
791 { "lslS", Gv, Ew, XX },
792 { "(bad)", XX, XX, XX },
793 { "syscall", XX, XX, XX },
794 { "clts", XX, XX, XX },
795 { "sysretP", XX, XX, XX },
797 { "invd", XX, XX, XX },
798 { "wbinvd", XX, XX, XX },
799 { "(bad)", XX, XX, XX },
800 { "ud2a", XX, XX, XX },
801 { "(bad)", XX, XX, XX },
803 { "femms", XX, XX, XX },
804 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
809 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
810 { "unpcklpX", XM, EX, XX },
811 { "unpckhpX", XM, EX, XX },
813 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
816 { "(bad)", XX, XX, XX },
817 { "(bad)", XX, XX, XX },
818 { "(bad)", XX, XX, XX },
819 { "(bad)", XX, XX, XX },
820 { "(bad)", XX, XX, XX },
821 { "(bad)", XX, XX, XX },
822 { "(bad)", XX, XX, XX },
824 { "movL", Rm, Cm, XX },
825 { "movL", Rm, Dm, XX },
826 { "movL", Cm, Rm, XX },
827 { "movL", Dm, Rm, XX },
828 { "movL", Rd, Td, XX },
829 { "(bad)", XX, XX, XX },
830 { "movL", Td, Rd, XX },
831 { "(bad)", XX, XX, XX },
833 { "movapX", XM, EX, XX },
834 { "movapX", EX, XM, XX },
836 { "movntpX", Ev, XM, XX },
839 { "ucomisX", XM,EX, XX },
840 { "comisX", XM,EX, XX },
842 { "wrmsr", XX, XX, XX },
843 { "rdtsc", XX, XX, XX },
844 { "rdmsr", XX, XX, XX },
845 { "rdpmc", XX, XX, XX },
846 { "sysenter", XX, XX, XX },
847 { "sysexit", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
851 { "(bad)", XX, XX, XX },
852 { "(bad)", XX, XX, XX },
853 { "(bad)", XX, XX, XX },
854 { "(bad)", XX, XX, XX },
855 { "(bad)", XX, XX, XX },
856 { "(bad)", XX, XX, XX },
857 { "(bad)", XX, XX, XX },
858 { "(bad)", XX, XX, XX },
860 { "cmovo", Gv, Ev, XX },
861 { "cmovno", Gv, Ev, XX },
862 { "cmovb", Gv, Ev, XX },
863 { "cmovae", Gv, Ev, XX },
864 { "cmove", Gv, Ev, XX },
865 { "cmovne", Gv, Ev, XX },
866 { "cmovbe", Gv, Ev, XX },
867 { "cmova", Gv, Ev, XX },
869 { "cmovs", Gv, Ev, XX },
870 { "cmovns", Gv, Ev, XX },
871 { "cmovp", Gv, Ev, XX },
872 { "cmovnp", Gv, Ev, XX },
873 { "cmovl", Gv, Ev, XX },
874 { "cmovge", Gv, Ev, XX },
875 { "cmovle", Gv, Ev, XX },
876 { "cmovg", Gv, Ev, XX },
878 { "movmskpX", Gdq, XS, XX },
882 { "andpX", XM, EX, XX },
883 { "andnpX", XM, EX, XX },
884 { "orpX", XM, EX, XX },
885 { "xorpX", XM, EX, XX },
896 { "punpcklbw", MX, EM, XX },
897 { "punpcklwd", MX, EM, XX },
898 { "punpckldq", MX, EM, XX },
899 { "packsswb", MX, EM, XX },
900 { "pcmpgtb", MX, EM, XX },
901 { "pcmpgtw", MX, EM, XX },
902 { "pcmpgtd", MX, EM, XX },
903 { "packuswb", MX, EM, XX },
905 { "punpckhbw", MX, EM, XX },
906 { "punpckhwd", MX, EM, XX },
907 { "punpckhdq", MX, EM, XX },
908 { "packssdw", MX, EM, XX },
911 { "movd", MX, Edq, XX },
918 { "pcmpeqb", MX, EM, XX },
919 { "pcmpeqw", MX, EM, XX },
920 { "pcmpeqd", MX, EM, XX },
921 { "emms", XX, XX, XX },
923 { "vmread", Em, Gm, XX },
924 { "vmwrite", Gm, Em, XX },
925 { "(bad)", XX, XX, XX },
926 { "(bad)", XX, XX, XX },
932 { "joH", Jv, XX, cond_jump_flag },
933 { "jnoH", Jv, XX, cond_jump_flag },
934 { "jbH", Jv, XX, cond_jump_flag },
935 { "jaeH", Jv, XX, cond_jump_flag },
936 { "jeH", Jv, XX, cond_jump_flag },
937 { "jneH", Jv, XX, cond_jump_flag },
938 { "jbeH", Jv, XX, cond_jump_flag },
939 { "jaH", Jv, XX, cond_jump_flag },
941 { "jsH", Jv, XX, cond_jump_flag },
942 { "jnsH", Jv, XX, cond_jump_flag },
943 { "jpH", Jv, XX, cond_jump_flag },
944 { "jnpH", Jv, XX, cond_jump_flag },
945 { "jlH", Jv, XX, cond_jump_flag },
946 { "jgeH", Jv, XX, cond_jump_flag },
947 { "jleH", Jv, XX, cond_jump_flag },
948 { "jgH", Jv, XX, cond_jump_flag },
950 { "seto", Eb, XX, XX },
951 { "setno", Eb, XX, XX },
952 { "setb", Eb, XX, XX },
953 { "setae", Eb, XX, XX },
954 { "sete", Eb, XX, XX },
955 { "setne", Eb, XX, XX },
956 { "setbe", Eb, XX, XX },
957 { "seta", Eb, XX, XX },
959 { "sets", Eb, XX, XX },
960 { "setns", Eb, XX, XX },
961 { "setp", Eb, XX, XX },
962 { "setnp", Eb, XX, XX },
963 { "setl", Eb, XX, XX },
964 { "setge", Eb, XX, XX },
965 { "setle", Eb, XX, XX },
966 { "setg", Eb, XX, XX },
968 { "pushT", fs, XX, XX },
969 { "popT", fs, XX, XX },
970 { "cpuid", XX, XX, XX },
971 { "btS", Ev, Gv, XX },
972 { "shldS", Ev, Gv, Ib },
973 { "shldS", Ev, Gv, CL },
977 { "pushT", gs, XX, XX },
978 { "popT", gs, XX, XX },
979 { "rsm", XX, XX, XX },
980 { "btsS", Ev, Gv, XX },
981 { "shrdS", Ev, Gv, Ib },
982 { "shrdS", Ev, Gv, CL },
984 { "imulS", Gv, Ev, XX },
986 { "cmpxchgB", Eb, Gb, XX },
987 { "cmpxchgS", Ev, Gv, XX },
988 { "lssS", Gv, Mp, XX },
989 { "btrS", Ev, Gv, XX },
990 { "lfsS", Gv, Mp, XX },
991 { "lgsS", Gv, Mp, XX },
992 { "movz{bR|x|bR|x}", Gv, Eb, XX },
993 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
995 { "(bad)", XX, XX, XX },
996 { "ud2b", XX, XX, XX },
998 { "btcS", Ev, Gv, XX },
999 { "bsfS", Gv, Ev, XX },
1000 { "bsrS", Gv, Ev, XX },
1001 { "movs{bR|x|bR|x}", Gv, Eb, XX },
1002 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
1004 { "xaddB", Eb, Gb, XX },
1005 { "xaddS", Ev, Gv, XX },
1007 { "movntiS", Ev, Gv, XX },
1008 { "pinsrw", MX, Edqw, Ib },
1009 { "pextrw", Gdq, MS, Ib },
1010 { "shufpX", XM, EX, Ib },
1013 { "bswap", RMeAX, XX, XX },
1014 { "bswap", RMeCX, XX, XX },
1015 { "bswap", RMeDX, XX, XX },
1016 { "bswap", RMeBX, XX, XX },
1017 { "bswap", RMeSP, XX, XX },
1018 { "bswap", RMeBP, XX, XX },
1019 { "bswap", RMeSI, XX, XX },
1020 { "bswap", RMeDI, XX, XX },
1023 { "psrlw", MX, EM, XX },
1024 { "psrld", MX, EM, XX },
1025 { "psrlq", MX, EM, XX },
1026 { "paddq", MX, EM, XX },
1027 { "pmullw", MX, EM, XX },
1029 { "pmovmskb", Gdq, MS, XX },
1031 { "psubusb", MX, EM, XX },
1032 { "psubusw", MX, EM, XX },
1033 { "pminub", MX, EM, XX },
1034 { "pand", MX, EM, XX },
1035 { "paddusb", MX, EM, XX },
1036 { "paddusw", MX, EM, XX },
1037 { "pmaxub", MX, EM, XX },
1038 { "pandn", MX, EM, XX },
1040 { "pavgb", MX, EM, XX },
1041 { "psraw", MX, EM, XX },
1042 { "psrad", MX, EM, XX },
1043 { "pavgw", MX, EM, XX },
1044 { "pmulhuw", MX, EM, XX },
1045 { "pmulhw", MX, EM, XX },
1049 { "psubsb", MX, EM, XX },
1050 { "psubsw", MX, EM, XX },
1051 { "pminsw", MX, EM, XX },
1052 { "por", MX, EM, XX },
1053 { "paddsb", MX, EM, XX },
1054 { "paddsw", MX, EM, XX },
1055 { "pmaxsw", MX, EM, XX },
1056 { "pxor", MX, EM, XX },
1059 { "psllw", MX, EM, XX },
1060 { "pslld", MX, EM, XX },
1061 { "psllq", MX, EM, XX },
1062 { "pmuludq", MX, EM, XX },
1063 { "pmaddwd", MX, EM, XX },
1064 { "psadbw", MX, EM, XX },
1067 { "psubb", MX, EM, XX },
1068 { "psubw", MX, EM, XX },
1069 { "psubd", MX, EM, XX },
1070 { "psubq", MX, EM, XX },
1071 { "paddb", MX, EM, XX },
1072 { "paddw", MX, EM, XX },
1073 { "paddd", MX, EM, XX },
1074 { "(bad)", XX, XX, XX }
1077 static const unsigned char onebyte_has_modrm[256] = {
1078 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1079 /* ------------------------------- */
1080 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1081 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1082 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1083 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1084 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1085 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1086 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1087 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1088 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1089 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1090 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1091 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1092 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1093 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1094 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1095 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1096 /* ------------------------------- */
1097 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1100 static const unsigned char twobyte_has_modrm[256] = {
1101 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1102 /* ------------------------------- */
1103 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1104 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1105 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1106 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1107 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1108 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1109 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1110 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1111 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1112 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1113 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1114 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1115 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1116 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1117 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1118 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1119 /* ------------------------------- */
1120 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1123 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1124 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1125 /* ------------------------------- */
1126 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1127 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1128 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1129 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1130 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1131 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1132 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1133 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1134 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1135 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1136 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1137 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1138 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1139 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1140 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1141 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1142 /* ------------------------------- */
1143 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1146 static char obuf[100];
1148 static char scratchbuf[100];
1149 static unsigned char *start_codep;
1150 static unsigned char *insn_codep;
1151 static unsigned char *codep;
1152 static disassemble_info *the_info;
1156 static unsigned char need_modrm;
1158 /* If we are accessing mod/rm/reg without need_modrm set, then the
1159 values are stale. Hitting this abort likely indicates that you
1160 need to update onebyte_has_modrm or twobyte_has_modrm. */
1161 #define MODRM_CHECK if (!need_modrm) abort ()
1163 static const char **names64;
1164 static const char **names32;
1165 static const char **names16;
1166 static const char **names8;
1167 static const char **names8rex;
1168 static const char **names_seg;
1169 static const char **index16;
1171 static const char *intel_names64[] = {
1172 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1173 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1175 static const char *intel_names32[] = {
1176 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1177 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1179 static const char *intel_names16[] = {
1180 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1181 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1183 static const char *intel_names8[] = {
1184 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1186 static const char *intel_names8rex[] = {
1187 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1188 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1190 static const char *intel_names_seg[] = {
1191 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1193 static const char *intel_index16[] = {
1194 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1197 static const char *att_names64[] = {
1198 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1199 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1201 static const char *att_names32[] = {
1202 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1203 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1205 static const char *att_names16[] = {
1206 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1207 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1209 static const char *att_names8[] = {
1210 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1212 static const char *att_names8rex[] = {
1213 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1214 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1216 static const char *att_names_seg[] = {
1217 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1219 static const char *att_index16[] = {
1220 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1223 static const struct dis386 grps[][8] = {
1226 { "addA", Eb, Ib, XX },
1227 { "orA", Eb, Ib, XX },
1228 { "adcA", Eb, Ib, XX },
1229 { "sbbA", Eb, Ib, XX },
1230 { "andA", Eb, Ib, XX },
1231 { "subA", Eb, Ib, XX },
1232 { "xorA", Eb, Ib, XX },
1233 { "cmpA", Eb, Ib, XX }
1237 { "addQ", Ev, Iv, XX },
1238 { "orQ", Ev, Iv, XX },
1239 { "adcQ", Ev, Iv, XX },
1240 { "sbbQ", Ev, Iv, XX },
1241 { "andQ", Ev, Iv, XX },
1242 { "subQ", Ev, Iv, XX },
1243 { "xorQ", Ev, Iv, XX },
1244 { "cmpQ", Ev, Iv, XX }
1248 { "addQ", Ev, sIb, XX },
1249 { "orQ", Ev, sIb, XX },
1250 { "adcQ", Ev, sIb, XX },
1251 { "sbbQ", Ev, sIb, XX },
1252 { "andQ", Ev, sIb, XX },
1253 { "subQ", Ev, sIb, XX },
1254 { "xorQ", Ev, sIb, XX },
1255 { "cmpQ", Ev, sIb, XX }
1259 { "rolA", Eb, Ib, XX },
1260 { "rorA", Eb, Ib, XX },
1261 { "rclA", Eb, Ib, XX },
1262 { "rcrA", Eb, Ib, XX },
1263 { "shlA", Eb, Ib, XX },
1264 { "shrA", Eb, Ib, XX },
1265 { "(bad)", XX, XX, XX },
1266 { "sarA", Eb, Ib, XX },
1270 { "rolQ", Ev, Ib, XX },
1271 { "rorQ", Ev, Ib, XX },
1272 { "rclQ", Ev, Ib, XX },
1273 { "rcrQ", Ev, Ib, XX },
1274 { "shlQ", Ev, Ib, XX },
1275 { "shrQ", Ev, Ib, XX },
1276 { "(bad)", XX, XX, XX },
1277 { "sarQ", Ev, Ib, XX },
1281 { "rolA", Eb, I1, XX },
1282 { "rorA", Eb, I1, XX },
1283 { "rclA", Eb, I1, XX },
1284 { "rcrA", Eb, I1, XX },
1285 { "shlA", Eb, I1, XX },
1286 { "shrA", Eb, I1, XX },
1287 { "(bad)", XX, XX, XX },
1288 { "sarA", Eb, I1, XX },
1292 { "rolQ", Ev, I1, XX },
1293 { "rorQ", Ev, I1, XX },
1294 { "rclQ", Ev, I1, XX },
1295 { "rcrQ", Ev, I1, XX },
1296 { "shlQ", Ev, I1, XX },
1297 { "shrQ", Ev, I1, XX },
1298 { "(bad)", XX, XX, XX},
1299 { "sarQ", Ev, I1, XX },
1303 { "rolA", Eb, CL, XX },
1304 { "rorA", Eb, CL, XX },
1305 { "rclA", Eb, CL, XX },
1306 { "rcrA", Eb, CL, XX },
1307 { "shlA", Eb, CL, XX },
1308 { "shrA", Eb, CL, XX },
1309 { "(bad)", XX, XX, XX },
1310 { "sarA", Eb, CL, XX },
1314 { "rolQ", Ev, CL, XX },
1315 { "rorQ", Ev, CL, XX },
1316 { "rclQ", Ev, CL, XX },
1317 { "rcrQ", Ev, CL, XX },
1318 { "shlQ", Ev, CL, XX },
1319 { "shrQ", Ev, CL, XX },
1320 { "(bad)", XX, XX, XX },
1321 { "sarQ", Ev, CL, XX }
1325 { "testA", Eb, Ib, XX },
1326 { "(bad)", Eb, XX, XX },
1327 { "notA", Eb, XX, XX },
1328 { "negA", Eb, XX, XX },
1329 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1330 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1331 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1332 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1336 { "testQ", Ev, Iv, XX },
1337 { "(bad)", XX, XX, XX },
1338 { "notQ", Ev, XX, XX },
1339 { "negQ", Ev, XX, XX },
1340 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1341 { "imulQ", Ev, XX, XX },
1342 { "divQ", Ev, XX, XX },
1343 { "idivQ", Ev, XX, XX },
1347 { "incA", Eb, XX, XX },
1348 { "decA", Eb, XX, XX },
1349 { "(bad)", XX, XX, XX },
1350 { "(bad)", XX, XX, XX },
1351 { "(bad)", XX, XX, XX },
1352 { "(bad)", XX, XX, XX },
1353 { "(bad)", XX, XX, XX },
1354 { "(bad)", XX, XX, XX },
1358 { "incQ", Ev, XX, XX },
1359 { "decQ", Ev, XX, XX },
1360 { "callT", indirEv, XX, XX },
1361 { "JcallT", indirEp, XX, XX },
1362 { "jmpT", indirEv, XX, XX },
1363 { "JjmpT", indirEp, XX, XX },
1364 { "pushU", stackEv, XX, XX },
1365 { "(bad)", XX, XX, XX },
1369 { "sldtQ", Ev, XX, XX },
1370 { "strQ", Ev, XX, XX },
1371 { "lldt", Ew, XX, XX },
1372 { "ltr", Ew, XX, XX },
1373 { "verr", Ew, XX, XX },
1374 { "verw", Ew, XX, XX },
1375 { "(bad)", XX, XX, XX },
1376 { "(bad)", XX, XX, XX }
1380 { "sgdtIQ", VMX_Fixup, 0, XX, XX },
1381 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1382 { "lgdt{Q|Q||}", M, XX, XX },
1383 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
1384 { "smswQ", Ev, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "lmsw", Ew, XX, XX },
1387 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1391 { "(bad)", XX, XX, XX },
1392 { "(bad)", XX, XX, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "btQ", Ev, Ib, XX },
1396 { "btsQ", Ev, Ib, XX },
1397 { "btrQ", Ev, Ib, XX },
1398 { "btcQ", Ev, Ib, XX },
1402 { "(bad)", XX, XX, XX },
1403 { "cmpxchg8b", Eq, XX, XX },
1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "", VM, XX, XX }, /* See OP_VMX. */
1409 { "vmptrst", Eq, XX, XX },
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "psrlw", MS, Ib, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psraw", MS, Ib, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "psllw", MS, Ib, XX },
1420 { "(bad)", XX, XX, XX },
1424 { "(bad)", XX, XX, XX },
1425 { "(bad)", XX, XX, XX },
1426 { "psrld", MS, Ib, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "psrad", MS, Ib, XX },
1429 { "(bad)", XX, XX, XX },
1430 { "pslld", MS, Ib, XX },
1431 { "(bad)", XX, XX, XX },
1435 { "(bad)", XX, XX, XX },
1436 { "(bad)", XX, XX, XX },
1437 { "psrlq", MS, Ib, XX },
1438 { "psrldq", MS, Ib, XX },
1439 { "(bad)", XX, XX, XX },
1440 { "(bad)", XX, XX, XX },
1441 { "psllq", MS, Ib, XX },
1442 { "pslldq", MS, Ib, XX },
1446 { "fxsave", Ev, XX, XX },
1447 { "fxrstor", Ev, XX, XX },
1448 { "ldmxcsr", Ev, XX, XX },
1449 { "stmxcsr", Ev, XX, XX },
1450 { "(bad)", XX, XX, XX },
1451 { "lfence", OP_0fae, 0, XX, XX },
1452 { "mfence", OP_0fae, 0, XX, XX },
1453 { "clflush", OP_0fae, 0, XX, XX },
1457 { "prefetchnta", Ev, XX, XX },
1458 { "prefetcht0", Ev, XX, XX },
1459 { "prefetcht1", Ev, XX, XX },
1460 { "prefetcht2", Ev, XX, XX },
1461 { "(bad)", XX, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1468 { "prefetch", Eb, XX, XX },
1469 { "prefetchw", Eb, XX, XX },
1470 { "(bad)", XX, XX, XX },
1471 { "(bad)", XX, XX, XX },
1472 { "(bad)", XX, XX, XX },
1473 { "(bad)", XX, XX, XX },
1474 { "(bad)", XX, XX, XX },
1475 { "(bad)", XX, XX, XX },
1479 { "xstore-rng", OP_0f07, 0, XX, XX },
1480 { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1481 { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1482 { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1483 { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1484 { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1490 { "montmul", OP_0f07, 0, XX, XX },
1491 { "xsha1", OP_0f07, 0, XX, XX },
1492 { "xsha256", OP_0f07, 0, XX, XX },
1493 { "(bad)", OP_0f07, 0, XX, XX },
1494 { "(bad)", OP_0f07, 0, XX, XX },
1495 { "(bad)", OP_0f07, 0, XX, XX },
1496 { "(bad)", OP_0f07, 0, XX, XX },
1497 { "(bad)", OP_0f07, 0, XX, XX },
1501 static const struct dis386 prefix_user_table[][4] = {
1504 { "addps", XM, EX, XX },
1505 { "addss", XM, EX, XX },
1506 { "addpd", XM, EX, XX },
1507 { "addsd", XM, EX, XX },
1511 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1512 { "", XM, EX, OPSIMD },
1513 { "", XM, EX, OPSIMD },
1514 { "", XM, EX, OPSIMD },
1518 { "cvtpi2ps", XM, EM, XX },
1519 { "cvtsi2ssY", XM, Ev, XX },
1520 { "cvtpi2pd", XM, EM, XX },
1521 { "cvtsi2sdY", XM, Ev, XX },
1525 { "cvtps2pi", MX, EX, XX },
1526 { "cvtss2siY", Gv, EX, XX },
1527 { "cvtpd2pi", MX, EX, XX },
1528 { "cvtsd2siY", Gv, EX, XX },
1532 { "cvttps2pi", MX, EX, XX },
1533 { "cvttss2siY", Gv, EX, XX },
1534 { "cvttpd2pi", MX, EX, XX },
1535 { "cvttsd2siY", Gv, EX, XX },
1539 { "divps", XM, EX, XX },
1540 { "divss", XM, EX, XX },
1541 { "divpd", XM, EX, XX },
1542 { "divsd", XM, EX, XX },
1546 { "maxps", XM, EX, XX },
1547 { "maxss", XM, EX, XX },
1548 { "maxpd", XM, EX, XX },
1549 { "maxsd", XM, EX, XX },
1553 { "minps", XM, EX, XX },
1554 { "minss", XM, EX, XX },
1555 { "minpd", XM, EX, XX },
1556 { "minsd", XM, EX, XX },
1560 { "movups", XM, EX, XX },
1561 { "movss", XM, EX, XX },
1562 { "movupd", XM, EX, XX },
1563 { "movsd", XM, EX, XX },
1567 { "movups", EX, XM, XX },
1568 { "movss", EX, XM, XX },
1569 { "movupd", EX, XM, XX },
1570 { "movsd", EX, XM, XX },
1574 { "mulps", XM, EX, XX },
1575 { "mulss", XM, EX, XX },
1576 { "mulpd", XM, EX, XX },
1577 { "mulsd", XM, EX, XX },
1581 { "rcpps", XM, EX, XX },
1582 { "rcpss", XM, EX, XX },
1583 { "(bad)", XM, EX, XX },
1584 { "(bad)", XM, EX, XX },
1588 { "rsqrtps", XM, EX, XX },
1589 { "rsqrtss", XM, EX, XX },
1590 { "(bad)", XM, EX, XX },
1591 { "(bad)", XM, EX, XX },
1595 { "sqrtps", XM, EX, XX },
1596 { "sqrtss", XM, EX, XX },
1597 { "sqrtpd", XM, EX, XX },
1598 { "sqrtsd", XM, EX, XX },
1602 { "subps", XM, EX, XX },
1603 { "subss", XM, EX, XX },
1604 { "subpd", XM, EX, XX },
1605 { "subsd", XM, EX, XX },
1609 { "(bad)", XM, EX, XX },
1610 { "cvtdq2pd", XM, EX, XX },
1611 { "cvttpd2dq", XM, EX, XX },
1612 { "cvtpd2dq", XM, EX, XX },
1616 { "cvtdq2ps", XM, EX, XX },
1617 { "cvttps2dq",XM, EX, XX },
1618 { "cvtps2dq",XM, EX, XX },
1619 { "(bad)", XM, EX, XX },
1623 { "cvtps2pd", XM, EX, XX },
1624 { "cvtss2sd", XM, EX, XX },
1625 { "cvtpd2ps", XM, EX, XX },
1626 { "cvtsd2ss", XM, EX, XX },
1630 { "maskmovq", MX, MS, XX },
1631 { "(bad)", XM, EX, XX },
1632 { "maskmovdqu", XM, EX, XX },
1633 { "(bad)", XM, EX, XX },
1637 { "movq", MX, EM, XX },
1638 { "movdqu", XM, EX, XX },
1639 { "movdqa", XM, EX, XX },
1640 { "(bad)", XM, EX, XX },
1644 { "movq", EM, MX, XX },
1645 { "movdqu", EX, XM, XX },
1646 { "movdqa", EX, XM, XX },
1647 { "(bad)", EX, XM, XX },
1651 { "(bad)", EX, XM, XX },
1652 { "movq2dq", XM, MS, XX },
1653 { "movq", EX, XM, XX },
1654 { "movdq2q", MX, XS, XX },
1658 { "pshufw", MX, EM, Ib },
1659 { "pshufhw", XM, EX, Ib },
1660 { "pshufd", XM, EX, Ib },
1661 { "pshuflw", XM, EX, Ib },
1665 { "movd", Edq, MX, XX },
1666 { "movq", XM, EX, XX },
1667 { "movd", Edq, XM, XX },
1668 { "(bad)", Ed, XM, XX },
1672 { "(bad)", MX, EX, XX },
1673 { "(bad)", XM, EX, XX },
1674 { "punpckhqdq", XM, EX, XX },
1675 { "(bad)", XM, EX, XX },
1679 { "movntq", EM, MX, XX },
1680 { "(bad)", EM, XM, XX },
1681 { "movntdq", EM, XM, XX },
1682 { "(bad)", EM, XM, XX },
1686 { "(bad)", MX, EX, XX },
1687 { "(bad)", XM, EX, XX },
1688 { "punpcklqdq", XM, EX, XX },
1689 { "(bad)", XM, EX, XX },
1693 { "(bad)", MX, EX, XX },
1694 { "(bad)", XM, EX, XX },
1695 { "addsubpd", XM, EX, XX },
1696 { "addsubps", XM, EX, XX },
1700 { "(bad)", MX, EX, XX },
1701 { "(bad)", XM, EX, XX },
1702 { "haddpd", XM, EX, XX },
1703 { "haddps", XM, EX, XX },
1707 { "(bad)", MX, EX, XX },
1708 { "(bad)", XM, EX, XX },
1709 { "hsubpd", XM, EX, XX },
1710 { "hsubps", XM, EX, XX },
1714 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1715 { "movsldup", XM, EX, XX },
1716 { "movlpd", XM, EX, XX },
1717 { "movddup", XM, EX, XX },
1721 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1722 { "movshdup", XM, EX, XX },
1723 { "movhpd", XM, EX, XX },
1724 { "(bad)", XM, EX, XX },
1728 { "(bad)", XM, EX, XX },
1729 { "(bad)", XM, EX, XX },
1730 { "(bad)", XM, EX, XX },
1731 { "lddqu", XM, M, XX },
1735 static const struct dis386 x86_64_table[][2] = {
1737 { "arpl", Ew, Gw, XX },
1738 { "movs{||lq|xd}", Gv, Ed, XX },
1742 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1754 FETCH_DATA (the_info, codep + 1);
1758 /* REX prefixes family. */
1781 prefixes |= PREFIX_REPZ;
1784 prefixes |= PREFIX_REPNZ;
1787 prefixes |= PREFIX_LOCK;
1790 prefixes |= PREFIX_CS;
1793 prefixes |= PREFIX_SS;
1796 prefixes |= PREFIX_DS;
1799 prefixes |= PREFIX_ES;
1802 prefixes |= PREFIX_FS;
1805 prefixes |= PREFIX_GS;
1808 prefixes |= PREFIX_DATA;
1811 prefixes |= PREFIX_ADDR;
1814 /* fwait is really an instruction. If there are prefixes
1815 before the fwait, they belong to the fwait, *not* to the
1816 following instruction. */
1817 if (prefixes || rex)
1819 prefixes |= PREFIX_FWAIT;
1823 prefixes = PREFIX_FWAIT;
1828 /* Rex is ignored when followed by another prefix. */
1839 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1843 prefix_name (int pref, int sizeflag)
1847 /* REX prefixes family. */
1899 return (sizeflag & DFLAG) ? "data16" : "data32";
1902 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1904 return (sizeflag & AFLAG) ? "addr16" : "addr32";
1912 static char op1out[100], op2out[100], op3out[100];
1913 static int op_ad, op_index[3];
1914 static int two_source_ops;
1915 static bfd_vma op_address[3];
1916 static bfd_vma op_riprel[3];
1917 static bfd_vma start_pc;
1920 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1921 * (see topic "Redundant prefixes" in the "Differences from 8086"
1922 * section of the "Virtual 8086 Mode" chapter.)
1923 * 'pc' should be the address of this instruction, it will
1924 * be used to print the target address if this is a relative jump or call
1925 * The function returns the length of this instruction in bytes.
1928 static char intel_syntax;
1929 static char open_char;
1930 static char close_char;
1931 static char separator_char;
1932 static char scale_char;
1934 /* Here for backwards compatibility. When gdb stops using
1935 print_insn_i386_att and print_insn_i386_intel these functions can
1936 disappear, and print_insn_i386 be merged into print_insn. */
1938 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1942 return print_insn (pc, info);
1946 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1950 return print_insn (pc, info);
1954 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1958 return print_insn (pc, info);
1962 print_insn (bfd_vma pc, disassemble_info *info)
1964 const struct dis386 *dp;
1966 char *first, *second, *third;
1968 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1971 struct dis_private priv;
1973 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1974 || info->mach == bfd_mach_x86_64);
1976 if (intel_syntax == (char) -1)
1977 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1978 || info->mach == bfd_mach_x86_64_intel_syntax);
1980 if (info->mach == bfd_mach_i386_i386
1981 || info->mach == bfd_mach_x86_64
1982 || info->mach == bfd_mach_i386_i386_intel_syntax
1983 || info->mach == bfd_mach_x86_64_intel_syntax)
1984 priv.orig_sizeflag = AFLAG | DFLAG;
1985 else if (info->mach == bfd_mach_i386_i8086)
1986 priv.orig_sizeflag = 0;
1990 for (p = info->disassembler_options; p != NULL; )
1992 if (strncmp (p, "x86-64", 6) == 0)
1995 priv.orig_sizeflag = AFLAG | DFLAG;
1997 else if (strncmp (p, "i386", 4) == 0)
2000 priv.orig_sizeflag = AFLAG | DFLAG;
2002 else if (strncmp (p, "i8086", 5) == 0)
2005 priv.orig_sizeflag = 0;
2007 else if (strncmp (p, "intel", 5) == 0)
2011 else if (strncmp (p, "att", 3) == 0)
2015 else if (strncmp (p, "addr", 4) == 0)
2017 if (p[4] == '1' && p[5] == '6')
2018 priv.orig_sizeflag &= ~AFLAG;
2019 else if (p[4] == '3' && p[5] == '2')
2020 priv.orig_sizeflag |= AFLAG;
2022 else if (strncmp (p, "data", 4) == 0)
2024 if (p[4] == '1' && p[5] == '6')
2025 priv.orig_sizeflag &= ~DFLAG;
2026 else if (p[4] == '3' && p[5] == '2')
2027 priv.orig_sizeflag |= DFLAG;
2029 else if (strncmp (p, "suffix", 6) == 0)
2030 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2032 p = strchr (p, ',');
2039 names64 = intel_names64;
2040 names32 = intel_names32;
2041 names16 = intel_names16;
2042 names8 = intel_names8;
2043 names8rex = intel_names8rex;
2044 names_seg = intel_names_seg;
2045 index16 = intel_index16;
2048 separator_char = '+';
2053 names64 = att_names64;
2054 names32 = att_names32;
2055 names16 = att_names16;
2056 names8 = att_names8;
2057 names8rex = att_names8rex;
2058 names_seg = att_names_seg;
2059 index16 = att_index16;
2062 separator_char = ',';
2066 /* The output looks better if we put 7 bytes on a line, since that
2067 puts most long word instructions on a single line. */
2068 info->bytes_per_line = 7;
2070 info->private_data = &priv;
2071 priv.max_fetched = priv.the_buffer;
2072 priv.insn_start = pc;
2079 op_index[0] = op_index[1] = op_index[2] = -1;
2083 start_codep = priv.the_buffer;
2084 codep = priv.the_buffer;
2086 if (setjmp (priv.bailout) != 0)
2090 /* Getting here means we tried for data but didn't get it. That
2091 means we have an incomplete instruction of some sort. Just
2092 print the first byte as a prefix or a .byte pseudo-op. */
2093 if (codep > priv.the_buffer)
2095 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2097 (*info->fprintf_func) (info->stream, "%s", name);
2100 /* Just print the first byte as a .byte instruction. */
2101 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2102 (unsigned int) priv.the_buffer[0]);
2115 sizeflag = priv.orig_sizeflag;
2117 FETCH_DATA (info, codep + 1);
2118 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2120 if (((prefixes & PREFIX_FWAIT)
2121 && ((*codep < 0xd8) || (*codep > 0xdf)))
2122 || (rex && rex_used))
2126 /* fwait not followed by floating point instruction, or rex followed
2127 by other prefixes. Print the first prefix. */
2128 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2130 name = INTERNAL_DISASSEMBLER_ERROR;
2131 (*info->fprintf_func) (info->stream, "%s", name);
2137 FETCH_DATA (info, codep + 2);
2138 dp = &dis386_twobyte[*++codep];
2139 need_modrm = twobyte_has_modrm[*codep];
2140 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2141 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2145 dp = &dis386[*codep];
2146 need_modrm = onebyte_has_modrm[*codep];
2147 uses_SSE_prefix = 0;
2148 uses_LOCK_prefix = 0;
2152 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2155 used_prefixes |= PREFIX_REPZ;
2157 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2160 used_prefixes |= PREFIX_REPNZ;
2162 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2165 used_prefixes |= PREFIX_LOCK;
2168 if (prefixes & PREFIX_ADDR)
2171 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2173 if ((sizeflag & AFLAG) || mode_64bit)
2174 oappend ("addr32 ");
2176 oappend ("addr16 ");
2177 used_prefixes |= PREFIX_ADDR;
2181 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2184 if (dp->bytemode3 == cond_jump_mode
2185 && dp->bytemode1 == v_mode
2188 if (sizeflag & DFLAG)
2189 oappend ("data32 ");
2191 oappend ("data16 ");
2192 used_prefixes |= PREFIX_DATA;
2198 FETCH_DATA (info, codep + 1);
2199 mod = (*codep >> 6) & 3;
2200 reg = (*codep >> 3) & 7;
2204 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2211 if (dp->name == NULL)
2213 switch (dp->bytemode1)
2216 dp = &grps[dp->bytemode2][reg];
2219 case USE_PREFIX_USER_TABLE:
2221 used_prefixes |= (prefixes & PREFIX_REPZ);
2222 if (prefixes & PREFIX_REPZ)
2226 used_prefixes |= (prefixes & PREFIX_DATA);
2227 if (prefixes & PREFIX_DATA)
2231 used_prefixes |= (prefixes & PREFIX_REPNZ);
2232 if (prefixes & PREFIX_REPNZ)
2236 dp = &prefix_user_table[dp->bytemode2][index];
2239 case X86_64_SPECIAL:
2240 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2244 oappend (INTERNAL_DISASSEMBLER_ERROR);
2249 if (putop (dp->name, sizeflag) == 0)
2254 (*dp->op1) (dp->bytemode1, sizeflag);
2259 (*dp->op2) (dp->bytemode2, sizeflag);
2264 (*dp->op3) (dp->bytemode3, sizeflag);
2268 /* See if any prefixes were not used. If so, print the first one
2269 separately. If we don't do this, we'll wind up printing an
2270 instruction stream which does not precisely correspond to the
2271 bytes we are disassembling. */
2272 if ((prefixes & ~used_prefixes) != 0)
2276 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2278 name = INTERNAL_DISASSEMBLER_ERROR;
2279 (*info->fprintf_func) (info->stream, "%s", name);
2282 if (rex & ~rex_used)
2285 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2287 name = INTERNAL_DISASSEMBLER_ERROR;
2288 (*info->fprintf_func) (info->stream, "%s ", name);
2291 obufp = obuf + strlen (obuf);
2292 for (i = strlen (obuf); i < 6; i++)
2295 (*info->fprintf_func) (info->stream, "%s", obuf);
2297 /* The enter and bound instructions are printed with operands in the same
2298 order as the intel book; everything else is printed in reverse order. */
2299 if (intel_syntax || two_source_ops)
2304 op_ad = op_index[0];
2305 op_index[0] = op_index[2];
2306 op_index[2] = op_ad;
2317 if (op_index[0] != -1 && !op_riprel[0])
2318 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2320 (*info->fprintf_func) (info->stream, "%s", first);
2326 (*info->fprintf_func) (info->stream, ",");
2327 if (op_index[1] != -1 && !op_riprel[1])
2328 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2330 (*info->fprintf_func) (info->stream, "%s", second);
2336 (*info->fprintf_func) (info->stream, ",");
2337 if (op_index[2] != -1 && !op_riprel[2])
2338 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2340 (*info->fprintf_func) (info->stream, "%s", third);
2342 for (i = 0; i < 3; i++)
2343 if (op_index[i] != -1 && op_riprel[i])
2345 (*info->fprintf_func) (info->stream, " # ");
2346 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2347 + op_address[op_index[i]]), info);
2349 return codep - priv.the_buffer;
2352 static const char *float_mem[] = {
2427 static const unsigned char float_mem_mode[] = {
2503 #define STi OP_STi, 0
2505 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2506 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2507 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2508 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2509 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2510 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2511 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2512 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2513 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2515 static const struct dis386 float_reg[][8] = {
2518 { "fadd", ST, STi, XX },
2519 { "fmul", ST, STi, XX },
2520 { "fcom", STi, XX, XX },
2521 { "fcomp", STi, XX, XX },
2522 { "fsub", ST, STi, XX },
2523 { "fsubr", ST, STi, XX },
2524 { "fdiv", ST, STi, XX },
2525 { "fdivr", ST, STi, XX },
2529 { "fld", STi, XX, XX },
2530 { "fxch", STi, XX, XX },
2532 { "(bad)", XX, XX, XX },
2540 { "fcmovb", ST, STi, XX },
2541 { "fcmove", ST, STi, XX },
2542 { "fcmovbe",ST, STi, XX },
2543 { "fcmovu", ST, STi, XX },
2544 { "(bad)", XX, XX, XX },
2546 { "(bad)", XX, XX, XX },
2547 { "(bad)", XX, XX, XX },
2551 { "fcmovnb",ST, STi, XX },
2552 { "fcmovne",ST, STi, XX },
2553 { "fcmovnbe",ST, STi, XX },
2554 { "fcmovnu",ST, STi, XX },
2556 { "fucomi", ST, STi, XX },
2557 { "fcomi", ST, STi, XX },
2558 { "(bad)", XX, XX, XX },
2562 { "fadd", STi, ST, XX },
2563 { "fmul", STi, ST, XX },
2564 { "(bad)", XX, XX, XX },
2565 { "(bad)", XX, XX, XX },
2567 { "fsub", STi, ST, XX },
2568 { "fsubr", STi, ST, XX },
2569 { "fdiv", STi, ST, XX },
2570 { "fdivr", STi, ST, XX },
2572 { "fsubr", STi, ST, XX },
2573 { "fsub", STi, ST, XX },
2574 { "fdivr", STi, ST, XX },
2575 { "fdiv", STi, ST, XX },
2580 { "ffree", STi, XX, XX },
2581 { "(bad)", XX, XX, XX },
2582 { "fst", STi, XX, XX },
2583 { "fstp", STi, XX, XX },
2584 { "fucom", STi, XX, XX },
2585 { "fucomp", STi, XX, XX },
2586 { "(bad)", XX, XX, XX },
2587 { "(bad)", XX, XX, XX },
2591 { "faddp", STi, ST, XX },
2592 { "fmulp", STi, ST, XX },
2593 { "(bad)", XX, XX, XX },
2596 { "fsubp", STi, ST, XX },
2597 { "fsubrp", STi, ST, XX },
2598 { "fdivp", STi, ST, XX },
2599 { "fdivrp", STi, ST, XX },
2601 { "fsubrp", STi, ST, XX },
2602 { "fsubp", STi, ST, XX },
2603 { "fdivrp", STi, ST, XX },
2604 { "fdivp", STi, ST, XX },
2609 { "ffreep", STi, XX, XX },
2610 { "(bad)", XX, XX, XX },
2611 { "(bad)", XX, XX, XX },
2612 { "(bad)", XX, XX, XX },
2614 { "fucomip",ST, STi, XX },
2615 { "fcomip", ST, STi, XX },
2616 { "(bad)", XX, XX, XX },
2620 static char *fgrps[][8] = {
2623 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2628 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2633 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2638 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2643 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2648 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2653 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2654 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2659 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2664 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2669 dofloat (int sizeflag)
2671 const struct dis386 *dp;
2672 unsigned char floatop;
2674 floatop = codep[-1];
2678 int fp_indx = (floatop - 0xd8) * 8 + reg;
2680 putop (float_mem[fp_indx], sizeflag);
2682 OP_E (float_mem_mode[fp_indx], sizeflag);
2685 /* Skip mod/rm byte. */
2689 dp = &float_reg[floatop - 0xd8][reg];
2690 if (dp->name == NULL)
2692 putop (fgrps[dp->bytemode1][rm], sizeflag);
2694 /* Instruction fnstsw is only one with strange arg. */
2695 if (floatop == 0xdf && codep[-1] == 0xe0)
2696 strcpy (op1out, names16[0]);
2700 putop (dp->name, sizeflag);
2704 (*dp->op1) (dp->bytemode1, sizeflag);
2707 (*dp->op2) (dp->bytemode2, sizeflag);
2712 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2718 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2720 sprintf (scratchbuf, "%%st(%d)", rm);
2721 oappend (scratchbuf + intel_syntax);
2724 /* Capital letters in template are macros. */
2726 putop (const char *template, int sizeflag)
2731 for (p = template; *p; p++)
2750 /* Alternative not valid. */
2751 strcpy (obuf, "(bad)");
2755 else if (*p == '\0')
2776 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2782 if (sizeflag & SUFFIX_ALWAYS)
2786 if (intel_syntax && !alt)
2788 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2790 if (sizeflag & DFLAG)
2791 *obufp++ = intel_syntax ? 'd' : 'l';
2793 *obufp++ = intel_syntax ? 'w' : 's';
2794 used_prefixes |= (prefixes & PREFIX_DATA);
2797 case 'E': /* For jcxz/jecxz */
2800 if (sizeflag & AFLAG)
2806 if (sizeflag & AFLAG)
2808 used_prefixes |= (prefixes & PREFIX_ADDR);
2813 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2815 if (sizeflag & AFLAG)
2816 *obufp++ = mode_64bit ? 'q' : 'l';
2818 *obufp++ = mode_64bit ? 'l' : 'w';
2819 used_prefixes |= (prefixes & PREFIX_ADDR);
2825 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2826 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2828 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2831 if (prefixes & PREFIX_DS)
2845 if (sizeflag & SUFFIX_ALWAYS)
2849 if ((prefixes & PREFIX_FWAIT) == 0)
2852 used_prefixes |= PREFIX_FWAIT;
2855 USED_REX (REX_MODE64);
2856 if (rex & REX_MODE64)
2864 if (mode_64bit && (sizeflag & DFLAG))
2873 if ((prefixes & PREFIX_DATA)
2874 || (rex & REX_MODE64)
2875 || (sizeflag & SUFFIX_ALWAYS))
2877 USED_REX (REX_MODE64);
2878 if (rex & REX_MODE64)
2882 if (sizeflag & DFLAG)
2887 used_prefixes |= (prefixes & PREFIX_DATA);
2893 if (mode_64bit && (sizeflag & DFLAG))
2895 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2901 if (intel_syntax && !alt)
2903 USED_REX (REX_MODE64);
2904 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2906 if (rex & REX_MODE64)
2910 if (sizeflag & DFLAG)
2911 *obufp++ = intel_syntax ? 'd' : 'l';
2915 used_prefixes |= (prefixes & PREFIX_DATA);
2919 USED_REX (REX_MODE64);
2922 if (rex & REX_MODE64)
2927 else if (sizeflag & DFLAG)
2940 if (rex & REX_MODE64)
2942 else if (sizeflag & DFLAG)
2947 if (!(rex & REX_MODE64))
2948 used_prefixes |= (prefixes & PREFIX_DATA);
2953 if (mode_64bit && (sizeflag & DFLAG))
2955 if (sizeflag & SUFFIX_ALWAYS)
2963 if (sizeflag & SUFFIX_ALWAYS)
2965 if (rex & REX_MODE64)
2969 if (sizeflag & DFLAG)
2973 used_prefixes |= (prefixes & PREFIX_DATA);
2978 if (prefixes & PREFIX_DATA)
2982 used_prefixes |= (prefixes & PREFIX_DATA);
2987 if (rex & REX_MODE64)
2989 USED_REX (REX_MODE64);
2993 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2995 /* operand size flag for cwtl, cbtw */
2999 else if (sizeflag & DFLAG)
3010 if (sizeflag & DFLAG)
3021 used_prefixes |= (prefixes & PREFIX_DATA);
3031 oappend (const char *s)
3034 obufp += strlen (s);
3040 if (prefixes & PREFIX_CS)
3042 used_prefixes |= PREFIX_CS;
3043 oappend ("%cs:" + intel_syntax);
3045 if (prefixes & PREFIX_DS)
3047 used_prefixes |= PREFIX_DS;
3048 oappend ("%ds:" + intel_syntax);
3050 if (prefixes & PREFIX_SS)
3052 used_prefixes |= PREFIX_SS;
3053 oappend ("%ss:" + intel_syntax);
3055 if (prefixes & PREFIX_ES)
3057 used_prefixes |= PREFIX_ES;
3058 oappend ("%es:" + intel_syntax);
3060 if (prefixes & PREFIX_FS)
3062 used_prefixes |= PREFIX_FS;
3063 oappend ("%fs:" + intel_syntax);
3065 if (prefixes & PREFIX_GS)
3067 used_prefixes |= PREFIX_GS;
3068 oappend ("%gs:" + intel_syntax);
3073 OP_indirE (int bytemode, int sizeflag)
3077 OP_E (bytemode, sizeflag);
3081 print_operand_value (char *buf, int hex, bfd_vma disp)
3091 sprintf_vma (tmp, disp);
3092 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3093 strcpy (buf + 2, tmp + i);
3097 bfd_signed_vma v = disp;
3104 /* Check for possible overflow on 0x8000000000000000. */
3107 strcpy (buf, "9223372036854775808");
3121 tmp[28 - i] = (v % 10) + '0';
3125 strcpy (buf, tmp + 29 - i);
3131 sprintf (buf, "0x%x", (unsigned int) disp);
3133 sprintf (buf, "%d", (int) disp);
3138 intel_operand_size (int bytemode, int sizeflag)
3143 oappend ("BYTE PTR ");
3147 oappend ("WORD PTR ");
3150 if (mode_64bit && (sizeflag & DFLAG))
3152 oappend ("QWORD PTR ");
3153 used_prefixes |= (prefixes & PREFIX_DATA);
3159 USED_REX (REX_MODE64);
3160 if (rex & REX_MODE64)
3161 oappend ("QWORD PTR ");
3162 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3163 oappend ("DWORD PTR ");
3165 oappend ("WORD PTR ");
3166 used_prefixes |= (prefixes & PREFIX_DATA);
3169 oappend ("DWORD PTR ");
3172 oappend ("QWORD PTR ");
3176 oappend ("QWORD PTR ");
3178 oappend ("DWORD PTR ");
3181 if (sizeflag & DFLAG)
3182 oappend ("FWORD PTR ");
3184 oappend ("DWORD PTR ");
3185 used_prefixes |= (prefixes & PREFIX_DATA);
3188 oappend ("TBYTE PTR ");
3191 oappend ("XMMWORD PTR ");
3199 OP_E (int bytemode, int sizeflag)
3204 USED_REX (REX_EXTZ);
3208 /* Skip mod/rm byte. */
3219 oappend (names8rex[rm + add]);
3221 oappend (names8[rm + add]);
3224 oappend (names16[rm + add]);
3227 oappend (names32[rm + add]);
3230 oappend (names64[rm + add]);
3234 oappend (names64[rm + add]);
3236 oappend (names32[rm + add]);
3239 if (mode_64bit && (sizeflag & DFLAG))
3241 oappend (names64[rm + add]);
3242 used_prefixes |= (prefixes & PREFIX_DATA);
3250 USED_REX (REX_MODE64);
3251 if (rex & REX_MODE64)
3252 oappend (names64[rm + add]);
3253 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3254 oappend (names32[rm + add]);
3256 oappend (names16[rm + add]);
3257 used_prefixes |= (prefixes & PREFIX_DATA);
3262 oappend (INTERNAL_DISASSEMBLER_ERROR);
3270 intel_operand_size (bytemode, sizeflag);
3273 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3288 FETCH_DATA (the_info, codep + 1);
3289 index = (*codep >> 3) & 7;
3290 if (mode_64bit || index != 0x4)
3291 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3292 scale = (*codep >> 6) & 3;
3294 USED_REX (REX_EXTY);
3304 if ((base & 7) == 5)
3307 if (mode_64bit && !havesib)
3313 FETCH_DATA (the_info, codep + 1);
3315 if ((disp & 0x80) != 0)
3324 if (mod != 0 || (base & 7) == 5)
3326 print_operand_value (scratchbuf, !riprel, disp);
3327 oappend (scratchbuf);
3335 if (havebase || (havesib && (index != 4 || scale != 0)))
3337 *obufp++ = open_char;
3338 if (intel_syntax && riprel)
3342 oappend (mode_64bit && (sizeflag & AFLAG)
3343 ? names64[base] : names32[base]);
3348 if (!intel_syntax || havebase)
3350 *obufp++ = separator_char;
3353 oappend (mode_64bit && (sizeflag & AFLAG)
3354 ? names64[index] : names32[index]);
3356 if (scale != 0 || (!intel_syntax && index != 4))
3358 *obufp++ = scale_char;
3360 sprintf (scratchbuf, "%d", 1 << scale);
3361 oappend (scratchbuf);
3364 if (intel_syntax && disp)
3366 if ((bfd_signed_vma) disp > 0)
3375 disp = - (bfd_signed_vma) disp;
3378 print_operand_value (scratchbuf, mod != 1, disp);
3379 oappend (scratchbuf);
3382 *obufp++ = close_char;
3385 else if (intel_syntax)
3387 if (mod != 0 || (base & 7) == 5)
3389 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3390 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3394 oappend (names_seg[ds_reg - es_reg]);
3397 print_operand_value (scratchbuf, 1, disp);
3398 oappend (scratchbuf);
3403 { /* 16 bit address mode */
3410 if ((disp & 0x8000) != 0)
3415 FETCH_DATA (the_info, codep + 1);
3417 if ((disp & 0x80) != 0)
3422 if ((disp & 0x8000) != 0)
3428 if (mod != 0 || rm == 6)
3430 print_operand_value (scratchbuf, 0, disp);
3431 oappend (scratchbuf);
3434 if (mod != 0 || rm != 6)
3436 *obufp++ = open_char;
3438 oappend (index16[rm]);
3439 if (intel_syntax && disp)
3441 if ((bfd_signed_vma) disp > 0)
3450 disp = - (bfd_signed_vma) disp;
3453 print_operand_value (scratchbuf, mod != 1, disp);
3454 oappend (scratchbuf);
3457 *obufp++ = close_char;
3460 else if (intel_syntax)
3462 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3463 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3467 oappend (names_seg[ds_reg - es_reg]);
3470 print_operand_value (scratchbuf, 1, disp & 0xffff);
3471 oappend (scratchbuf);
3477 OP_G (int bytemode, int sizeflag)
3480 USED_REX (REX_EXTX);
3488 oappend (names8rex[reg + add]);
3490 oappend (names8[reg + add]);
3493 oappend (names16[reg + add]);
3496 oappend (names32[reg + add]);
3499 oappend (names64[reg + add]);
3504 USED_REX (REX_MODE64);
3505 if (rex & REX_MODE64)
3506 oappend (names64[reg + add]);
3507 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3508 oappend (names32[reg + add]);
3510 oappend (names16[reg + add]);
3511 used_prefixes |= (prefixes & PREFIX_DATA);
3515 oappend (names64[reg + add]);
3517 oappend (names32[reg + add]);
3520 oappend (INTERNAL_DISASSEMBLER_ERROR);
3533 FETCH_DATA (the_info, codep + 8);
3534 a = *codep++ & 0xff;
3535 a |= (*codep++ & 0xff) << 8;
3536 a |= (*codep++ & 0xff) << 16;
3537 a |= (*codep++ & 0xff) << 24;
3538 b = *codep++ & 0xff;
3539 b |= (*codep++ & 0xff) << 8;
3540 b |= (*codep++ & 0xff) << 16;
3541 b |= (*codep++ & 0xff) << 24;
3542 x = a + ((bfd_vma) b << 32);
3550 static bfd_signed_vma
3553 bfd_signed_vma x = 0;
3555 FETCH_DATA (the_info, codep + 4);
3556 x = *codep++ & (bfd_signed_vma) 0xff;
3557 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3558 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3559 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3563 static bfd_signed_vma
3566 bfd_signed_vma x = 0;
3568 FETCH_DATA (the_info, codep + 4);
3569 x = *codep++ & (bfd_signed_vma) 0xff;
3570 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3571 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3572 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3574 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3584 FETCH_DATA (the_info, codep + 2);
3585 x = *codep++ & 0xff;
3586 x |= (*codep++ & 0xff) << 8;
3591 set_op (bfd_vma op, int riprel)
3593 op_index[op_ad] = op_ad;
3596 op_address[op_ad] = op;
3597 op_riprel[op_ad] = riprel;
3601 /* Mask to get a 32-bit address. */
3602 op_address[op_ad] = op & 0xffffffff;
3603 op_riprel[op_ad] = riprel & 0xffffffff;
3608 OP_REG (int code, int sizeflag)
3612 USED_REX (REX_EXTZ);
3624 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3625 case sp_reg: case bp_reg: case si_reg: case di_reg:
3626 s = names16[code - ax_reg + add];
3628 case es_reg: case ss_reg: case cs_reg:
3629 case ds_reg: case fs_reg: case gs_reg:
3630 s = names_seg[code - es_reg + add];
3632 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3633 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3636 s = names8rex[code - al_reg + add];
3638 s = names8[code - al_reg];
3640 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3641 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3642 if (mode_64bit && (sizeflag & DFLAG))
3644 s = names64[code - rAX_reg + add];
3647 code += eAX_reg - rAX_reg;
3649 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3650 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3651 USED_REX (REX_MODE64);
3652 if (rex & REX_MODE64)
3653 s = names64[code - eAX_reg + add];
3654 else if (sizeflag & DFLAG)
3655 s = names32[code - eAX_reg + add];
3657 s = names16[code - eAX_reg + add];
3658 used_prefixes |= (prefixes & PREFIX_DATA);
3661 s = INTERNAL_DISASSEMBLER_ERROR;
3668 OP_IMREG (int code, int sizeflag)
3680 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3681 case sp_reg: case bp_reg: case si_reg: case di_reg:
3682 s = names16[code - ax_reg];
3684 case es_reg: case ss_reg: case cs_reg:
3685 case ds_reg: case fs_reg: case gs_reg:
3686 s = names_seg[code - es_reg];
3688 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3689 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3692 s = names8rex[code - al_reg];
3694 s = names8[code - al_reg];
3696 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3697 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3698 USED_REX (REX_MODE64);
3699 if (rex & REX_MODE64)
3700 s = names64[code - eAX_reg];
3701 else if (sizeflag & DFLAG)
3702 s = names32[code - eAX_reg];
3704 s = names16[code - eAX_reg];
3705 used_prefixes |= (prefixes & PREFIX_DATA);
3708 s = INTERNAL_DISASSEMBLER_ERROR;
3715 OP_I (int bytemode, int sizeflag)
3718 bfd_signed_vma mask = -1;
3723 FETCH_DATA (the_info, codep + 1);
3735 USED_REX (REX_MODE64);
3736 if (rex & REX_MODE64)
3738 else if (sizeflag & DFLAG)
3748 used_prefixes |= (prefixes & PREFIX_DATA);
3759 oappend (INTERNAL_DISASSEMBLER_ERROR);
3764 scratchbuf[0] = '$';
3765 print_operand_value (scratchbuf + 1, 1, op);
3766 oappend (scratchbuf + intel_syntax);
3767 scratchbuf[0] = '\0';
3771 OP_I64 (int bytemode, int sizeflag)
3774 bfd_signed_vma mask = -1;
3778 OP_I (bytemode, sizeflag);
3785 FETCH_DATA (the_info, codep + 1);
3790 USED_REX (REX_MODE64);
3791 if (rex & REX_MODE64)
3793 else if (sizeflag & DFLAG)
3803 used_prefixes |= (prefixes & PREFIX_DATA);
3810 oappend (INTERNAL_DISASSEMBLER_ERROR);
3815 scratchbuf[0] = '$';
3816 print_operand_value (scratchbuf + 1, 1, op);
3817 oappend (scratchbuf + intel_syntax);
3818 scratchbuf[0] = '\0';
3822 OP_sI (int bytemode, int sizeflag)
3825 bfd_signed_vma mask = -1;
3830 FETCH_DATA (the_info, codep + 1);
3832 if ((op & 0x80) != 0)
3837 USED_REX (REX_MODE64);
3838 if (rex & REX_MODE64)
3840 else if (sizeflag & DFLAG)
3849 if ((op & 0x8000) != 0)
3852 used_prefixes |= (prefixes & PREFIX_DATA);
3857 if ((op & 0x8000) != 0)
3861 oappend (INTERNAL_DISASSEMBLER_ERROR);
3865 scratchbuf[0] = '$';
3866 print_operand_value (scratchbuf + 1, 1, op);
3867 oappend (scratchbuf + intel_syntax);
3871 OP_J (int bytemode, int sizeflag)
3879 FETCH_DATA (the_info, codep + 1);
3881 if ((disp & 0x80) != 0)
3885 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
3890 /* For some reason, a data16 prefix on a jump instruction
3891 means that the pc is masked to 16 bits after the
3892 displacement is added! */
3897 oappend (INTERNAL_DISASSEMBLER_ERROR);
3900 disp = (start_pc + codep - start_codep + disp) & mask;
3902 print_operand_value (scratchbuf, 1, disp);
3903 oappend (scratchbuf);
3907 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3909 oappend (names_seg[reg]);
3913 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3917 if (sizeflag & DFLAG)
3927 used_prefixes |= (prefixes & PREFIX_DATA);
3929 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
3931 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3932 oappend (scratchbuf);
3936 OP_OFF (int bytemode, int sizeflag)
3940 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
3941 intel_operand_size (bytemode, sizeflag);
3944 if ((sizeflag & AFLAG) || mode_64bit)
3951 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3952 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3954 oappend (names_seg[ds_reg - es_reg]);
3958 print_operand_value (scratchbuf, 1, off);
3959 oappend (scratchbuf);
3963 OP_OFF64 (int bytemode, int sizeflag)
3969 OP_OFF (bytemode, sizeflag);
3973 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
3974 intel_operand_size (bytemode, sizeflag);
3981 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3982 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3984 oappend (names_seg[ds_reg - es_reg]);
3988 print_operand_value (scratchbuf, 1, off);
3989 oappend (scratchbuf);
3993 ptr_reg (int code, int sizeflag)
3997 *obufp++ = open_char;
3998 used_prefixes |= (prefixes & PREFIX_ADDR);
4001 if (!(sizeflag & AFLAG))
4002 s = names32[code - eAX_reg];
4004 s = names64[code - eAX_reg];
4006 else if (sizeflag & AFLAG)
4007 s = names32[code - eAX_reg];
4009 s = names16[code - eAX_reg];
4011 *obufp++ = close_char;
4016 OP_ESreg (int code, int sizeflag)
4019 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
4020 oappend ("%es:" + intel_syntax);
4021 ptr_reg (code, sizeflag);
4025 OP_DSreg (int code, int sizeflag)
4028 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4039 prefixes |= PREFIX_DS;
4041 ptr_reg (code, sizeflag);
4045 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4050 USED_REX (REX_EXTX);
4053 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4055 used_prefixes |= PREFIX_LOCK;
4058 sprintf (scratchbuf, "%%cr%d", reg + add);
4059 oappend (scratchbuf + intel_syntax);
4063 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4066 USED_REX (REX_EXTX);
4070 sprintf (scratchbuf, "db%d", reg + add);
4072 sprintf (scratchbuf, "%%db%d", reg + add);
4073 oappend (scratchbuf);
4077 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4079 sprintf (scratchbuf, "%%tr%d", reg);
4080 oappend (scratchbuf + intel_syntax);
4084 OP_Rd (int bytemode, int sizeflag)
4087 OP_E (bytemode, sizeflag);
4093 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4095 used_prefixes |= (prefixes & PREFIX_DATA);
4096 if (prefixes & PREFIX_DATA)
4099 USED_REX (REX_EXTX);
4102 sprintf (scratchbuf, "%%xmm%d", reg + add);
4105 sprintf (scratchbuf, "%%mm%d", reg);
4106 oappend (scratchbuf + intel_syntax);
4110 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4113 USED_REX (REX_EXTX);
4116 sprintf (scratchbuf, "%%xmm%d", reg + add);
4117 oappend (scratchbuf + intel_syntax);
4121 OP_EM (int bytemode, int sizeflag)
4125 if (intel_syntax && bytemode == v_mode)
4127 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4128 used_prefixes |= (prefixes & PREFIX_DATA);
4130 OP_E (bytemode, sizeflag);
4134 /* Skip mod/rm byte. */
4137 used_prefixes |= (prefixes & PREFIX_DATA);
4138 if (prefixes & PREFIX_DATA)
4142 USED_REX (REX_EXTZ);
4145 sprintf (scratchbuf, "%%xmm%d", rm + add);
4148 sprintf (scratchbuf, "%%mm%d", rm);
4149 oappend (scratchbuf + intel_syntax);
4153 OP_EX (int bytemode, int sizeflag)
4158 if (intel_syntax && bytemode == v_mode)
4160 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4162 case 0: bytemode = x_mode; break;
4163 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4164 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4165 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4166 default: bytemode = 0; break;
4169 OP_E (bytemode, sizeflag);
4172 USED_REX (REX_EXTZ);
4176 /* Skip mod/rm byte. */
4179 sprintf (scratchbuf, "%%xmm%d", rm + add);
4180 oappend (scratchbuf + intel_syntax);
4184 OP_MS (int bytemode, int sizeflag)
4187 OP_EM (bytemode, sizeflag);
4193 OP_XS (int bytemode, int sizeflag)
4196 OP_EX (bytemode, sizeflag);
4202 OP_M (int bytemode, int sizeflag)
4205 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4207 OP_E (bytemode, sizeflag);
4211 OP_0f07 (int bytemode, int sizeflag)
4213 if (mod != 3 || rm != 0)
4216 OP_E (bytemode, sizeflag);
4220 OP_0fae (int bytemode, int sizeflag)
4225 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4227 if (reg < 5 || rm != 0)
4229 BadOp (); /* bad sfence, mfence, or lfence */
4235 BadOp (); /* bad clflush */
4239 OP_E (bytemode, sizeflag);
4243 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4245 /* NOP with REPZ prefix is called PAUSE. */
4246 if (prefixes == PREFIX_REPZ)
4247 strcpy (obuf, "pause");
4250 static const char *const Suffix3DNow[] = {
4251 /* 00 */ NULL, NULL, NULL, NULL,
4252 /* 04 */ NULL, NULL, NULL, NULL,
4253 /* 08 */ NULL, NULL, NULL, NULL,
4254 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4255 /* 10 */ NULL, NULL, NULL, NULL,
4256 /* 14 */ NULL, NULL, NULL, NULL,
4257 /* 18 */ NULL, NULL, NULL, NULL,
4258 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4259 /* 20 */ NULL, NULL, NULL, NULL,
4260 /* 24 */ NULL, NULL, NULL, NULL,
4261 /* 28 */ NULL, NULL, NULL, NULL,
4262 /* 2C */ NULL, NULL, NULL, NULL,
4263 /* 30 */ NULL, NULL, NULL, NULL,
4264 /* 34 */ NULL, NULL, NULL, NULL,
4265 /* 38 */ NULL, NULL, NULL, NULL,
4266 /* 3C */ NULL, NULL, NULL, NULL,
4267 /* 40 */ NULL, NULL, NULL, NULL,
4268 /* 44 */ NULL, NULL, NULL, NULL,
4269 /* 48 */ NULL, NULL, NULL, NULL,
4270 /* 4C */ NULL, NULL, NULL, NULL,
4271 /* 50 */ NULL, NULL, NULL, NULL,
4272 /* 54 */ NULL, NULL, NULL, NULL,
4273 /* 58 */ NULL, NULL, NULL, NULL,
4274 /* 5C */ NULL, NULL, NULL, NULL,
4275 /* 60 */ NULL, NULL, NULL, NULL,
4276 /* 64 */ NULL, NULL, NULL, NULL,
4277 /* 68 */ NULL, NULL, NULL, NULL,
4278 /* 6C */ NULL, NULL, NULL, NULL,
4279 /* 70 */ NULL, NULL, NULL, NULL,
4280 /* 74 */ NULL, NULL, NULL, NULL,
4281 /* 78 */ NULL, NULL, NULL, NULL,
4282 /* 7C */ NULL, NULL, NULL, NULL,
4283 /* 80 */ NULL, NULL, NULL, NULL,
4284 /* 84 */ NULL, NULL, NULL, NULL,
4285 /* 88 */ NULL, NULL, "pfnacc", NULL,
4286 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4287 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4288 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4289 /* 98 */ NULL, NULL, "pfsub", NULL,
4290 /* 9C */ NULL, NULL, "pfadd", NULL,
4291 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4292 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4293 /* A8 */ NULL, NULL, "pfsubr", NULL,
4294 /* AC */ NULL, NULL, "pfacc", NULL,
4295 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4296 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4297 /* B8 */ NULL, NULL, NULL, "pswapd",
4298 /* BC */ NULL, NULL, NULL, "pavgusb",
4299 /* C0 */ NULL, NULL, NULL, NULL,
4300 /* C4 */ NULL, NULL, NULL, NULL,
4301 /* C8 */ NULL, NULL, NULL, NULL,
4302 /* CC */ NULL, NULL, NULL, NULL,
4303 /* D0 */ NULL, NULL, NULL, NULL,
4304 /* D4 */ NULL, NULL, NULL, NULL,
4305 /* D8 */ NULL, NULL, NULL, NULL,
4306 /* DC */ NULL, NULL, NULL, NULL,
4307 /* E0 */ NULL, NULL, NULL, NULL,
4308 /* E4 */ NULL, NULL, NULL, NULL,
4309 /* E8 */ NULL, NULL, NULL, NULL,
4310 /* EC */ NULL, NULL, NULL, NULL,
4311 /* F0 */ NULL, NULL, NULL, NULL,
4312 /* F4 */ NULL, NULL, NULL, NULL,
4313 /* F8 */ NULL, NULL, NULL, NULL,
4314 /* FC */ NULL, NULL, NULL, NULL,
4318 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4320 const char *mnemonic;
4322 FETCH_DATA (the_info, codep + 1);
4323 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4324 place where an 8-bit immediate would normally go. ie. the last
4325 byte of the instruction. */
4326 obufp = obuf + strlen (obuf);
4327 mnemonic = Suffix3DNow[*codep++ & 0xff];
4332 /* Since a variable sized modrm/sib chunk is between the start
4333 of the opcode (0x0f0f) and the opcode suffix, we need to do
4334 all the modrm processing first, and don't know until now that
4335 we have a bad opcode. This necessitates some cleaning up. */
4342 static const char *simd_cmp_op[] = {
4354 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4356 unsigned int cmp_type;
4358 FETCH_DATA (the_info, codep + 1);
4359 obufp = obuf + strlen (obuf);
4360 cmp_type = *codep++ & 0xff;
4363 char suffix1 = 'p', suffix2 = 's';
4364 used_prefixes |= (prefixes & PREFIX_REPZ);
4365 if (prefixes & PREFIX_REPZ)
4369 used_prefixes |= (prefixes & PREFIX_DATA);
4370 if (prefixes & PREFIX_DATA)
4374 used_prefixes |= (prefixes & PREFIX_REPNZ);
4375 if (prefixes & PREFIX_REPNZ)
4376 suffix1 = 's', suffix2 = 'd';
4379 sprintf (scratchbuf, "cmp%s%c%c",
4380 simd_cmp_op[cmp_type], suffix1, suffix2);
4381 used_prefixes |= (prefixes & PREFIX_REPZ);
4382 oappend (scratchbuf);
4386 /* We have a bad extension byte. Clean up. */
4394 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4396 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4397 forms of these instructions. */
4400 char *p = obuf + strlen (obuf);
4403 *(p - 1) = *(p - 2);
4404 *(p - 2) = *(p - 3);
4405 *(p - 3) = extrachar;
4410 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4412 if (mod == 3 && reg == 1 && rm <= 1)
4414 /* Override "sidt". */
4415 char *p = obuf + strlen (obuf) - 4;
4417 /* We might have a suffix when disassembling with -Msuffix. */
4423 /* mwait %eax,%ecx */
4424 strcpy (p, "mwait");
4426 strcpy (op1out, names32[0]);
4430 /* monitor %eax,%ecx,%edx" */
4431 strcpy (p, "monitor");
4435 strcpy (op1out, names32[0]);
4436 else if (!(prefixes & PREFIX_ADDR))
4437 strcpy (op1out, names64[0]);
4440 strcpy (op1out, names32[0]);
4441 used_prefixes |= PREFIX_ADDR;
4443 strcpy (op3out, names32[2]);
4448 strcpy (op2out, names32[1]);
4459 SVME_Fixup (int bytemode, int sizeflag)
4491 OP_M (bytemode, sizeflag);
4494 /* Override "lidt". */
4495 p = obuf + strlen (obuf) - 4;
4496 /* We might have a suffix. */
4500 if (!(prefixes & PREFIX_ADDR))
4505 used_prefixes |= PREFIX_ADDR;
4509 strcpy (op2out, names32[1]);
4515 *obufp++ = open_char;
4516 if (mode_64bit || (sizeflag & AFLAG))
4520 strcpy (obufp, alt);
4521 obufp += strlen (alt);
4522 *obufp++ = close_char;
4529 INVLPG_Fixup (int bytemode, int sizeflag)
4542 OP_M (bytemode, sizeflag);
4545 /* Override "invlpg". */
4546 strcpy (obuf + strlen (obuf) - 6, alt);
4553 /* Throw away prefixes and 1st. opcode byte. */
4554 codep = insn_codep + 1;
4559 SEG_Fixup (int extrachar, int sizeflag)
4563 /* We need to add a proper suffix with
4574 if (prefixes & PREFIX_DATA)
4578 USED_REX (REX_MODE64);
4579 if (rex & REX_MODE64)
4584 strcat (obuf, suffix);
4588 /* We need to fix the suffix for
4595 Override "mov[l|q]". */
4596 char *p = obuf + strlen (obuf) - 1;
4598 /* We might not have a suffix. */
4604 OP_E (extrachar, sizeflag);
4608 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4610 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
4612 /* Override "sgdt". */
4613 char *p = obuf + strlen (obuf) - 4;
4615 /* We might have a suffix when disassembling with -Msuffix. */
4622 strcpy (p, "vmcall");
4625 strcpy (p, "vmlaunch");
4628 strcpy (p, "vmresume");
4631 strcpy (p, "vmxoff");
4642 OP_VMX (int bytemode, int sizeflag)
4644 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
4645 if (prefixes & PREFIX_DATA)
4646 strcpy (obuf, "vmclear");
4647 else if (prefixes & PREFIX_REPZ)
4648 strcpy (obuf, "vmxon");
4650 strcpy (obuf, "vmptrld");
4651 OP_E (bytemode, sizeflag);