3 { VEX_W_TABLE (EVEX_W_0F10_P_0) },
4 { MOD_TABLE (MOD_EVEX_0F10_PREFIX_1) },
5 { VEX_W_TABLE (EVEX_W_0F10_P_2) },
6 { MOD_TABLE (MOD_EVEX_0F10_PREFIX_3) },
10 { VEX_W_TABLE (EVEX_W_0F11_P_0) },
11 { MOD_TABLE (MOD_EVEX_0F11_PREFIX_1) },
12 { VEX_W_TABLE (EVEX_W_0F11_P_2) },
13 { MOD_TABLE (MOD_EVEX_0F11_PREFIX_3) },
15 /* PREFIX_EVEX_0F12 */
17 { MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
18 { VEX_W_TABLE (EVEX_W_0F12_P_1) },
19 { VEX_W_TABLE (EVEX_W_0F12_P_2) },
20 { VEX_W_TABLE (EVEX_W_0F12_P_3) },
22 /* PREFIX_EVEX_0F13 */
24 { VEX_W_TABLE (EVEX_W_0F13_P_0) },
26 { VEX_W_TABLE (EVEX_W_0F13_P_2) },
28 /* PREFIX_EVEX_0F14 */
30 { VEX_W_TABLE (EVEX_W_0F14_P_0) },
32 { VEX_W_TABLE (EVEX_W_0F14_P_2) },
34 /* PREFIX_EVEX_0F15 */
36 { VEX_W_TABLE (EVEX_W_0F15_P_0) },
38 { VEX_W_TABLE (EVEX_W_0F15_P_2) },
40 /* PREFIX_EVEX_0F16 */
42 { MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
43 { VEX_W_TABLE (EVEX_W_0F16_P_1) },
44 { VEX_W_TABLE (EVEX_W_0F16_P_2) },
46 /* PREFIX_EVEX_0F17 */
48 { VEX_W_TABLE (EVEX_W_0F17_P_0) },
50 { VEX_W_TABLE (EVEX_W_0F17_P_2) },
52 /* PREFIX_EVEX_0F28 */
54 { VEX_W_TABLE (EVEX_W_0F28_P_0) },
56 { VEX_W_TABLE (EVEX_W_0F28_P_2) },
58 /* PREFIX_EVEX_0F29 */
60 { VEX_W_TABLE (EVEX_W_0F29_P_0) },
62 { VEX_W_TABLE (EVEX_W_0F29_P_2) },
64 /* PREFIX_EVEX_0F2A */
67 { "vcvtsi2ss%LQ", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
69 { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
71 /* PREFIX_EVEX_0F2B */
73 { VEX_W_TABLE (EVEX_W_0F2B_P_0) },
75 { VEX_W_TABLE (EVEX_W_0F2B_P_2) },
77 /* PREFIX_EVEX_0F2C */
80 { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS }, 0 },
82 { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
84 /* PREFIX_EVEX_0F2D */
87 { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR }, 0 },
89 { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
91 /* PREFIX_EVEX_0F2E */
93 { VEX_W_TABLE (EVEX_W_0F2E_P_0) },
95 { VEX_W_TABLE (EVEX_W_0F2E_P_2) },
97 /* PREFIX_EVEX_0F2F */
99 { VEX_W_TABLE (EVEX_W_0F2F_P_0) },
101 { VEX_W_TABLE (EVEX_W_0F2F_P_2) },
103 /* PREFIX_EVEX_0F51 */
105 { VEX_W_TABLE (EVEX_W_0F51_P_0) },
106 { VEX_W_TABLE (EVEX_W_0F51_P_1) },
107 { VEX_W_TABLE (EVEX_W_0F51_P_2) },
108 { VEX_W_TABLE (EVEX_W_0F51_P_3) },
110 /* PREFIX_EVEX_0F54 */
112 { VEX_W_TABLE (EVEX_W_0F54_P_0) },
114 { VEX_W_TABLE (EVEX_W_0F54_P_2) },
116 /* PREFIX_EVEX_0F55 */
118 { VEX_W_TABLE (EVEX_W_0F55_P_0) },
120 { VEX_W_TABLE (EVEX_W_0F55_P_2) },
122 /* PREFIX_EVEX_0F56 */
124 { VEX_W_TABLE (EVEX_W_0F56_P_0) },
126 { VEX_W_TABLE (EVEX_W_0F56_P_2) },
128 /* PREFIX_EVEX_0F57 */
130 { VEX_W_TABLE (EVEX_W_0F57_P_0) },
132 { VEX_W_TABLE (EVEX_W_0F57_P_2) },
134 /* PREFIX_EVEX_0F58 */
136 { VEX_W_TABLE (EVEX_W_0F58_P_0) },
137 { VEX_W_TABLE (EVEX_W_0F58_P_1) },
138 { VEX_W_TABLE (EVEX_W_0F58_P_2) },
139 { VEX_W_TABLE (EVEX_W_0F58_P_3) },
141 /* PREFIX_EVEX_0F59 */
143 { VEX_W_TABLE (EVEX_W_0F59_P_0) },
144 { VEX_W_TABLE (EVEX_W_0F59_P_1) },
145 { VEX_W_TABLE (EVEX_W_0F59_P_2) },
146 { VEX_W_TABLE (EVEX_W_0F59_P_3) },
148 /* PREFIX_EVEX_0F5A */
150 { VEX_W_TABLE (EVEX_W_0F5A_P_0) },
151 { VEX_W_TABLE (EVEX_W_0F5A_P_1) },
152 { VEX_W_TABLE (EVEX_W_0F5A_P_2) },
153 { VEX_W_TABLE (EVEX_W_0F5A_P_3) },
155 /* PREFIX_EVEX_0F5B */
157 { VEX_W_TABLE (EVEX_W_0F5B_P_0) },
158 { VEX_W_TABLE (EVEX_W_0F5B_P_1) },
159 { VEX_W_TABLE (EVEX_W_0F5B_P_2) },
161 /* PREFIX_EVEX_0F5C */
163 { VEX_W_TABLE (EVEX_W_0F5C_P_0) },
164 { VEX_W_TABLE (EVEX_W_0F5C_P_1) },
165 { VEX_W_TABLE (EVEX_W_0F5C_P_2) },
166 { VEX_W_TABLE (EVEX_W_0F5C_P_3) },
168 /* PREFIX_EVEX_0F5D */
170 { VEX_W_TABLE (EVEX_W_0F5D_P_0) },
171 { VEX_W_TABLE (EVEX_W_0F5D_P_1) },
172 { VEX_W_TABLE (EVEX_W_0F5D_P_2) },
173 { VEX_W_TABLE (EVEX_W_0F5D_P_3) },
175 /* PREFIX_EVEX_0F5E */
177 { VEX_W_TABLE (EVEX_W_0F5E_P_0) },
178 { VEX_W_TABLE (EVEX_W_0F5E_P_1) },
179 { VEX_W_TABLE (EVEX_W_0F5E_P_2) },
180 { VEX_W_TABLE (EVEX_W_0F5E_P_3) },
182 /* PREFIX_EVEX_0F5F */
184 { VEX_W_TABLE (EVEX_W_0F5F_P_0) },
185 { VEX_W_TABLE (EVEX_W_0F5F_P_1) },
186 { VEX_W_TABLE (EVEX_W_0F5F_P_2) },
187 { VEX_W_TABLE (EVEX_W_0F5F_P_3) },
189 /* PREFIX_EVEX_0F60 */
193 { "vpunpcklbw", { XM, Vex, EXx }, 0 },
195 /* PREFIX_EVEX_0F61 */
199 { "vpunpcklwd", { XM, Vex, EXx }, 0 },
201 /* PREFIX_EVEX_0F62 */
205 { VEX_W_TABLE (EVEX_W_0F62_P_2) },
207 /* PREFIX_EVEX_0F63 */
211 { "vpacksswb", { XM, Vex, EXx }, 0 },
213 /* PREFIX_EVEX_0F64 */
217 { "vpcmpgtb", { XMask, Vex, EXx }, 0 },
219 /* PREFIX_EVEX_0F65 */
223 { "vpcmpgtw", { XMask, Vex, EXx }, 0 },
225 /* PREFIX_EVEX_0F66 */
229 { VEX_W_TABLE (EVEX_W_0F66_P_2) },
231 /* PREFIX_EVEX_0F67 */
235 { "vpackuswb", { XM, Vex, EXx }, 0 },
237 /* PREFIX_EVEX_0F68 */
241 { "vpunpckhbw", { XM, Vex, EXx }, 0 },
243 /* PREFIX_EVEX_0F69 */
247 { "vpunpckhwd", { XM, Vex, EXx }, 0 },
249 /* PREFIX_EVEX_0F6A */
253 { VEX_W_TABLE (EVEX_W_0F6A_P_2) },
255 /* PREFIX_EVEX_0F6B */
259 { VEX_W_TABLE (EVEX_W_0F6B_P_2) },
261 /* PREFIX_EVEX_0F6C */
265 { VEX_W_TABLE (EVEX_W_0F6C_P_2) },
267 /* PREFIX_EVEX_0F6D */
271 { VEX_W_TABLE (EVEX_W_0F6D_P_2) },
273 /* PREFIX_EVEX_0F6E */
277 { EVEX_LEN_TABLE (EVEX_LEN_0F6E_P_2) },
279 /* PREFIX_EVEX_0F6F */
282 { VEX_W_TABLE (EVEX_W_0F6F_P_1) },
283 { VEX_W_TABLE (EVEX_W_0F6F_P_2) },
284 { VEX_W_TABLE (EVEX_W_0F6F_P_3) },
286 /* PREFIX_EVEX_0F70 */
289 { "vpshufhw", { XM, EXx, Ib }, 0 },
290 { VEX_W_TABLE (EVEX_W_0F70_P_2) },
291 { "vpshuflw", { XM, EXx, Ib }, 0 },
293 /* PREFIX_EVEX_0F71_REG_2 */
297 { "vpsrlw", { Vex, EXx, Ib }, 0 },
299 /* PREFIX_EVEX_0F71_REG_4 */
303 { "vpsraw", { Vex, EXx, Ib }, 0 },
305 /* PREFIX_EVEX_0F71_REG_6 */
309 { "vpsllw", { Vex, EXx, Ib }, 0 },
311 /* PREFIX_EVEX_0F72_REG_0 */
315 { "vpror%LW", { Vex, EXx, Ib }, 0 },
317 /* PREFIX_EVEX_0F72_REG_1 */
321 { "vprol%LW", { Vex, EXx, Ib }, 0 },
323 /* PREFIX_EVEX_0F72_REG_2 */
327 { VEX_W_TABLE (EVEX_W_0F72_R_2_P_2) },
329 /* PREFIX_EVEX_0F72_REG_4 */
333 { "vpsra%LW", { Vex, EXx, Ib }, 0 },
335 /* PREFIX_EVEX_0F72_REG_6 */
339 { VEX_W_TABLE (EVEX_W_0F72_R_6_P_2) },
341 /* PREFIX_EVEX_0F73_REG_2 */
345 { VEX_W_TABLE (EVEX_W_0F73_R_2_P_2) },
347 /* PREFIX_EVEX_0F73_REG_3 */
351 { "vpsrldq", { Vex, EXx, Ib }, 0 },
353 /* PREFIX_EVEX_0F73_REG_6 */
357 { VEX_W_TABLE (EVEX_W_0F73_R_6_P_2) },
359 /* PREFIX_EVEX_0F73_REG_7 */
363 { "vpslldq", { Vex, EXx, Ib }, 0 },
365 /* PREFIX_EVEX_0F74 */
369 { "vpcmpeqb", { XMask, Vex, EXx }, 0 },
371 /* PREFIX_EVEX_0F75 */
375 { "vpcmpeqw", { XMask, Vex, EXx }, 0 },
377 /* PREFIX_EVEX_0F76 */
381 { VEX_W_TABLE (EVEX_W_0F76_P_2) },
383 /* PREFIX_EVEX_0F78 */
385 { VEX_W_TABLE (EVEX_W_0F78_P_0) },
386 { "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 },
387 { VEX_W_TABLE (EVEX_W_0F78_P_2) },
388 { "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
390 /* PREFIX_EVEX_0F79 */
392 { VEX_W_TABLE (EVEX_W_0F79_P_0) },
393 { "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 },
394 { VEX_W_TABLE (EVEX_W_0F79_P_2) },
395 { "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
397 /* PREFIX_EVEX_0F7A */
400 { VEX_W_TABLE (EVEX_W_0F7A_P_1) },
401 { VEX_W_TABLE (EVEX_W_0F7A_P_2) },
402 { VEX_W_TABLE (EVEX_W_0F7A_P_3) },
404 /* PREFIX_EVEX_0F7B */
407 { "vcvtusi2ss%LQ", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
408 { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
409 { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
411 /* PREFIX_EVEX_0F7E */
414 { EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_1) },
415 { EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_2) },
417 /* PREFIX_EVEX_0F7F */
420 { VEX_W_TABLE (EVEX_W_0F7F_P_1) },
421 { VEX_W_TABLE (EVEX_W_0F7F_P_2) },
422 { VEX_W_TABLE (EVEX_W_0F7F_P_3) },
424 /* PREFIX_EVEX_0FC2 */
426 { VEX_W_TABLE (EVEX_W_0FC2_P_0) },
427 { VEX_W_TABLE (EVEX_W_0FC2_P_1) },
428 { VEX_W_TABLE (EVEX_W_0FC2_P_2) },
429 { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
431 /* PREFIX_EVEX_0FC4 */
435 { "vpinsrw", { XM, Vex128, Edw, Ib }, 0 },
437 /* PREFIX_EVEX_0FC5 */
441 { "vpextrw", { Gdq, XS, Ib }, 0 },
443 /* PREFIX_EVEX_0FC6 */
445 { VEX_W_TABLE (EVEX_W_0FC6_P_0) },
447 { VEX_W_TABLE (EVEX_W_0FC6_P_2) },
449 /* PREFIX_EVEX_0FD1 */
453 { "vpsrlw", { XM, Vex, EXxmm }, 0 },
455 /* PREFIX_EVEX_0FD2 */
459 { VEX_W_TABLE (EVEX_W_0FD2_P_2) },
461 /* PREFIX_EVEX_0FD3 */
465 { VEX_W_TABLE (EVEX_W_0FD3_P_2) },
467 /* PREFIX_EVEX_0FD4 */
471 { VEX_W_TABLE (EVEX_W_0FD4_P_2) },
473 /* PREFIX_EVEX_0FD5 */
477 { "vpmullw", { XM, Vex, EXx }, 0 },
479 /* PREFIX_EVEX_0FD6 */
483 { EVEX_LEN_TABLE (EVEX_LEN_0FD6_P_2) },
485 /* PREFIX_EVEX_0FD8 */
489 { "vpsubusb", { XM, Vex, EXx }, 0 },
491 /* PREFIX_EVEX_0FD9 */
495 { "vpsubusw", { XM, Vex, EXx }, 0 },
497 /* PREFIX_EVEX_0FDA */
501 { "vpminub", { XM, Vex, EXx }, 0 },
503 /* PREFIX_EVEX_0FDB */
507 { "vpand%LW", { XM, Vex, EXx }, 0 },
509 /* PREFIX_EVEX_0FDC */
513 { "vpaddusb", { XM, Vex, EXx }, 0 },
515 /* PREFIX_EVEX_0FDD */
519 { "vpaddusw", { XM, Vex, EXx }, 0 },
521 /* PREFIX_EVEX_0FDE */
525 { "vpmaxub", { XM, Vex, EXx }, 0 },
527 /* PREFIX_EVEX_0FDF */
531 { "vpandn%LW", { XM, Vex, EXx }, 0 },
533 /* PREFIX_EVEX_0FE0 */
537 { "vpavgb", { XM, Vex, EXx }, 0 },
539 /* PREFIX_EVEX_0FE1 */
543 { "vpsraw", { XM, Vex, EXxmm }, 0 },
545 /* PREFIX_EVEX_0FE2 */
549 { "vpsra%LW", { XM, Vex, EXxmm }, 0 },
551 /* PREFIX_EVEX_0FE3 */
555 { "vpavgw", { XM, Vex, EXx }, 0 },
557 /* PREFIX_EVEX_0FE4 */
561 { "vpmulhuw", { XM, Vex, EXx }, 0 },
563 /* PREFIX_EVEX_0FE5 */
567 { "vpmulhw", { XM, Vex, EXx }, 0 },
569 /* PREFIX_EVEX_0FE6 */
572 { VEX_W_TABLE (EVEX_W_0FE6_P_1) },
573 { VEX_W_TABLE (EVEX_W_0FE6_P_2) },
574 { VEX_W_TABLE (EVEX_W_0FE6_P_3) },
576 /* PREFIX_EVEX_0FE7 */
580 { VEX_W_TABLE (EVEX_W_0FE7_P_2) },
582 /* PREFIX_EVEX_0FE8 */
586 { "vpsubsb", { XM, Vex, EXx }, 0 },
588 /* PREFIX_EVEX_0FE9 */
592 { "vpsubsw", { XM, Vex, EXx }, 0 },
594 /* PREFIX_EVEX_0FEA */
598 { "vpminsw", { XM, Vex, EXx }, 0 },
600 /* PREFIX_EVEX_0FEB */
604 { "vpor%LW", { XM, Vex, EXx }, 0 },
606 /* PREFIX_EVEX_0FEC */
610 { "vpaddsb", { XM, Vex, EXx }, 0 },
612 /* PREFIX_EVEX_0FED */
616 { "vpaddsw", { XM, Vex, EXx }, 0 },
618 /* PREFIX_EVEX_0FEE */
622 { "vpmaxsw", { XM, Vex, EXx }, 0 },
624 /* PREFIX_EVEX_0FEF */
628 { "vpxor%LW", { XM, Vex, EXx }, 0 },
630 /* PREFIX_EVEX_0FF1 */
634 { "vpsllw", { XM, Vex, EXxmm }, 0 },
636 /* PREFIX_EVEX_0FF2 */
640 { VEX_W_TABLE (EVEX_W_0FF2_P_2) },
642 /* PREFIX_EVEX_0FF3 */
646 { VEX_W_TABLE (EVEX_W_0FF3_P_2) },
648 /* PREFIX_EVEX_0FF4 */
652 { VEX_W_TABLE (EVEX_W_0FF4_P_2) },
654 /* PREFIX_EVEX_0FF5 */
658 { "vpmaddwd", { XM, Vex, EXx }, 0 },
660 /* PREFIX_EVEX_0FF6 */
664 { "vpsadbw", { XM, Vex, EXx }, 0 },
666 /* PREFIX_EVEX_0FF8 */
670 { "vpsubb", { XM, Vex, EXx }, 0 },
672 /* PREFIX_EVEX_0FF9 */
676 { "vpsubw", { XM, Vex, EXx }, 0 },
678 /* PREFIX_EVEX_0FFA */
682 { VEX_W_TABLE (EVEX_W_0FFA_P_2) },
684 /* PREFIX_EVEX_0FFB */
688 { VEX_W_TABLE (EVEX_W_0FFB_P_2) },
690 /* PREFIX_EVEX_0FFC */
694 { "vpaddb", { XM, Vex, EXx }, 0 },
696 /* PREFIX_EVEX_0FFD */
700 { "vpaddw", { XM, Vex, EXx }, 0 },
702 /* PREFIX_EVEX_0FFE */
706 { VEX_W_TABLE (EVEX_W_0FFE_P_2) },
708 /* PREFIX_EVEX_0F3800 */
712 { "vpshufb", { XM, Vex, EXx }, 0 },
714 /* PREFIX_EVEX_0F3804 */
718 { "vpmaddubsw", { XM, Vex, EXx }, 0 },
720 /* PREFIX_EVEX_0F380B */
724 { "vpmulhrsw", { XM, Vex, EXx }, 0 },
726 /* PREFIX_EVEX_0F380C */
730 { VEX_W_TABLE (EVEX_W_0F380C_P_2) },
732 /* PREFIX_EVEX_0F380D */
736 { VEX_W_TABLE (EVEX_W_0F380D_P_2) },
738 /* PREFIX_EVEX_0F3810 */
741 { VEX_W_TABLE (EVEX_W_0F3810_P_1) },
742 { VEX_W_TABLE (EVEX_W_0F3810_P_2) },
744 /* PREFIX_EVEX_0F3811 */
747 { VEX_W_TABLE (EVEX_W_0F3811_P_1) },
748 { VEX_W_TABLE (EVEX_W_0F3811_P_2) },
750 /* PREFIX_EVEX_0F3812 */
753 { VEX_W_TABLE (EVEX_W_0F3812_P_1) },
754 { VEX_W_TABLE (EVEX_W_0F3812_P_2) },
756 /* PREFIX_EVEX_0F3813 */
759 { VEX_W_TABLE (EVEX_W_0F3813_P_1) },
760 { VEX_W_TABLE (EVEX_W_0F3813_P_2) },
762 /* PREFIX_EVEX_0F3814 */
765 { VEX_W_TABLE (EVEX_W_0F3814_P_1) },
766 { "vprorv%LW", { XM, Vex, EXx }, 0 },
768 /* PREFIX_EVEX_0F3815 */
771 { VEX_W_TABLE (EVEX_W_0F3815_P_1) },
772 { "vprolv%LW", { XM, Vex, EXx }, 0 },
774 /* PREFIX_EVEX_0F3816 */
778 { "vpermp%XW", { XM, Vex, EXx }, 0 },
780 /* PREFIX_EVEX_0F3818 */
784 { VEX_W_TABLE (EVEX_W_0F3818_P_2) },
786 /* PREFIX_EVEX_0F3819 */
790 { VEX_W_TABLE (EVEX_W_0F3819_P_2) },
792 /* PREFIX_EVEX_0F381A */
796 { VEX_W_TABLE (EVEX_W_0F381A_P_2) },
798 /* PREFIX_EVEX_0F381B */
802 { VEX_W_TABLE (EVEX_W_0F381B_P_2) },
804 /* PREFIX_EVEX_0F381C */
808 { "vpabsb", { XM, EXx }, 0 },
810 /* PREFIX_EVEX_0F381D */
814 { "vpabsw", { XM, EXx }, 0 },
816 /* PREFIX_EVEX_0F381E */
820 { VEX_W_TABLE (EVEX_W_0F381E_P_2) },
822 /* PREFIX_EVEX_0F381F */
826 { VEX_W_TABLE (EVEX_W_0F381F_P_2) },
828 /* PREFIX_EVEX_0F3820 */
831 { VEX_W_TABLE (EVEX_W_0F3820_P_1) },
832 { "vpmovsxbw", { XM, EXxmmq }, 0 },
834 /* PREFIX_EVEX_0F3821 */
837 { VEX_W_TABLE (EVEX_W_0F3821_P_1) },
838 { "vpmovsxbd", { XM, EXxmmqd }, 0 },
840 /* PREFIX_EVEX_0F3822 */
843 { VEX_W_TABLE (EVEX_W_0F3822_P_1) },
844 { "vpmovsxbq", { XM, EXxmmdw }, 0 },
846 /* PREFIX_EVEX_0F3823 */
849 { VEX_W_TABLE (EVEX_W_0F3823_P_1) },
850 { "vpmovsxwd", { XM, EXxmmq }, 0 },
852 /* PREFIX_EVEX_0F3824 */
855 { VEX_W_TABLE (EVEX_W_0F3824_P_1) },
856 { "vpmovsxwq", { XM, EXxmmqd }, 0 },
858 /* PREFIX_EVEX_0F3825 */
861 { VEX_W_TABLE (EVEX_W_0F3825_P_1) },
862 { VEX_W_TABLE (EVEX_W_0F3825_P_2) },
864 /* PREFIX_EVEX_0F3826 */
867 { VEX_W_TABLE (EVEX_W_0F3826_P_1) },
868 { VEX_W_TABLE (EVEX_W_0F3826_P_2) },
870 /* PREFIX_EVEX_0F3827 */
873 { "vptestnm%LW", { XMask, Vex, EXx }, 0 },
874 { "vptestm%LW", { XMask, Vex, EXx }, 0 },
876 /* PREFIX_EVEX_0F3828 */
879 { VEX_W_TABLE (EVEX_W_0F3828_P_1) },
880 { VEX_W_TABLE (EVEX_W_0F3828_P_2) },
882 /* PREFIX_EVEX_0F3829 */
885 { VEX_W_TABLE (EVEX_W_0F3829_P_1) },
886 { VEX_W_TABLE (EVEX_W_0F3829_P_2) },
888 /* PREFIX_EVEX_0F382A */
891 { VEX_W_TABLE (EVEX_W_0F382A_P_1) },
892 { VEX_W_TABLE (EVEX_W_0F382A_P_2) },
894 /* PREFIX_EVEX_0F382B */
898 { VEX_W_TABLE (EVEX_W_0F382B_P_2) },
900 /* PREFIX_EVEX_0F382C */
904 { "vscalefp%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
906 /* PREFIX_EVEX_0F382D */
910 { "vscalefs%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
912 /* PREFIX_EVEX_0F3830 */
915 { VEX_W_TABLE (EVEX_W_0F3830_P_1) },
916 { "vpmovzxbw", { XM, EXxmmq }, 0 },
918 /* PREFIX_EVEX_0F3831 */
921 { VEX_W_TABLE (EVEX_W_0F3831_P_1) },
922 { "vpmovzxbd", { XM, EXxmmqd }, 0 },
924 /* PREFIX_EVEX_0F3832 */
927 { VEX_W_TABLE (EVEX_W_0F3832_P_1) },
928 { "vpmovzxbq", { XM, EXxmmdw }, 0 },
930 /* PREFIX_EVEX_0F3833 */
933 { VEX_W_TABLE (EVEX_W_0F3833_P_1) },
934 { "vpmovzxwd", { XM, EXxmmq }, 0 },
936 /* PREFIX_EVEX_0F3834 */
939 { VEX_W_TABLE (EVEX_W_0F3834_P_1) },
940 { "vpmovzxwq", { XM, EXxmmqd }, 0 },
942 /* PREFIX_EVEX_0F3835 */
945 { VEX_W_TABLE (EVEX_W_0F3835_P_1) },
946 { VEX_W_TABLE (EVEX_W_0F3835_P_2) },
948 /* PREFIX_EVEX_0F3836 */
952 { "vperm%LW", { XM, Vex, EXx }, 0 },
954 /* PREFIX_EVEX_0F3837 */
958 { VEX_W_TABLE (EVEX_W_0F3837_P_2) },
960 /* PREFIX_EVEX_0F3838 */
963 { VEX_W_TABLE (EVEX_W_0F3838_P_1) },
964 { "vpminsb", { XM, Vex, EXx }, 0 },
966 /* PREFIX_EVEX_0F3839 */
969 { VEX_W_TABLE (EVEX_W_0F3839_P_1) },
970 { "vpmins%LW", { XM, Vex, EXx }, 0 },
972 /* PREFIX_EVEX_0F383A */
975 { VEX_W_TABLE (EVEX_W_0F383A_P_1) },
976 { "vpminuw", { XM, Vex, EXx }, 0 },
978 /* PREFIX_EVEX_0F383B */
982 { "vpminu%LW", { XM, Vex, EXx }, 0 },
984 /* PREFIX_EVEX_0F383C */
988 { "vpmaxsb", { XM, Vex, EXx }, 0 },
990 /* PREFIX_EVEX_0F383D */
994 { "vpmaxs%LW", { XM, Vex, EXx }, 0 },
996 /* PREFIX_EVEX_0F383E */
1000 { "vpmaxuw", { XM, Vex, EXx }, 0 },
1002 /* PREFIX_EVEX_0F383F */
1006 { "vpmaxu%LW", { XM, Vex, EXx }, 0 },
1008 /* PREFIX_EVEX_0F3840 */
1012 { VEX_W_TABLE (EVEX_W_0F3840_P_2) },
1014 /* PREFIX_EVEX_0F3842 */
1018 { "vgetexpp%XW", { XM, EXx, EXxEVexS }, 0 },
1020 /* PREFIX_EVEX_0F3843 */
1024 { "vgetexps%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 },
1026 /* PREFIX_EVEX_0F3844 */
1030 { "vplzcnt%LW", { XM, EXx }, 0 },
1032 /* PREFIX_EVEX_0F3845 */
1036 { "vpsrlv%LW", { XM, Vex, EXx }, 0 },
1038 /* PREFIX_EVEX_0F3846 */
1042 { "vpsrav%LW", { XM, Vex, EXx }, 0 },
1044 /* PREFIX_EVEX_0F3847 */
1048 { "vpsllv%LW", { XM, Vex, EXx }, 0 },
1050 /* PREFIX_EVEX_0F384C */
1054 { "vrcp14p%XW", { XM, EXx }, 0 },
1056 /* PREFIX_EVEX_0F384D */
1060 { "vrcp14s%XW", { XMScalar, VexScalar, EXxmm_mdq }, 0 },
1062 /* PREFIX_EVEX_0F384E */
1066 { "vrsqrt14p%XW", { XM, EXx }, 0 },
1068 /* PREFIX_EVEX_0F384F */
1072 { "vrsqrt14s%XW", { XMScalar, VexScalar, EXxmm_mdq }, 0 },
1074 /* PREFIX_EVEX_0F3850 */
1078 { "vpdpbusd", { XM, Vex, EXx }, 0 },
1080 /* PREFIX_EVEX_0F3851 */
1084 { "vpdpbusds", { XM, Vex, EXx }, 0 },
1086 /* PREFIX_EVEX_0F3852 */
1089 { VEX_W_TABLE (EVEX_W_0F3852_P_1) },
1090 { "vpdpwssd", { XM, Vex, EXx }, 0 },
1091 { "vp4dpwssd", { XM, Vex, EXxmm }, 0 },
1093 /* PREFIX_EVEX_0F3853 */
1097 { "vpdpwssds", { XM, Vex, EXx }, 0 },
1098 { "vp4dpwssds", { XM, Vex, EXxmm }, 0 },
1100 /* PREFIX_EVEX_0F3854 */
1104 { VEX_W_TABLE (EVEX_W_0F3854_P_2) },
1106 /* PREFIX_EVEX_0F3855 */
1110 { VEX_W_TABLE (EVEX_W_0F3855_P_2) },
1112 /* PREFIX_EVEX_0F3858 */
1116 { VEX_W_TABLE (EVEX_W_0F3858_P_2) },
1118 /* PREFIX_EVEX_0F3859 */
1122 { VEX_W_TABLE (EVEX_W_0F3859_P_2) },
1124 /* PREFIX_EVEX_0F385A */
1128 { VEX_W_TABLE (EVEX_W_0F385A_P_2) },
1130 /* PREFIX_EVEX_0F385B */
1134 { VEX_W_TABLE (EVEX_W_0F385B_P_2) },
1136 /* PREFIX_EVEX_0F3862 */
1140 { VEX_W_TABLE (EVEX_W_0F3862_P_2) },
1142 /* PREFIX_EVEX_0F3863 */
1146 { VEX_W_TABLE (EVEX_W_0F3863_P_2) },
1148 /* PREFIX_EVEX_0F3864 */
1152 { "vpblendm%LW", { XM, Vex, EXx }, 0 },
1154 /* PREFIX_EVEX_0F3865 */
1158 { "vblendmp%XW", { XM, Vex, EXx }, 0 },
1160 /* PREFIX_EVEX_0F3866 */
1164 { VEX_W_TABLE (EVEX_W_0F3866_P_2) },
1166 /* PREFIX_EVEX_0F3868 */
1171 { VEX_W_TABLE (EVEX_W_0F3868_P_3) },
1173 /* PREFIX_EVEX_0F3870 */
1177 { VEX_W_TABLE (EVEX_W_0F3870_P_2) },
1179 /* PREFIX_EVEX_0F3871 */
1183 { VEX_W_TABLE (EVEX_W_0F3871_P_2) },
1185 /* PREFIX_EVEX_0F3872 */
1188 { VEX_W_TABLE (EVEX_W_0F3872_P_1) },
1189 { VEX_W_TABLE (EVEX_W_0F3872_P_2) },
1190 { VEX_W_TABLE (EVEX_W_0F3872_P_3) },
1192 /* PREFIX_EVEX_0F3873 */
1196 { VEX_W_TABLE (EVEX_W_0F3873_P_2) },
1198 /* PREFIX_EVEX_0F3875 */
1202 { VEX_W_TABLE (EVEX_W_0F3875_P_2) },
1204 /* PREFIX_EVEX_0F3876 */
1208 { "vpermi2%LW", { XM, Vex, EXx }, 0 },
1210 /* PREFIX_EVEX_0F3877 */
1214 { "vpermi2p%XW", { XM, Vex, EXx }, 0 },
1216 /* PREFIX_EVEX_0F3878 */
1220 { VEX_W_TABLE (EVEX_W_0F3878_P_2) },
1222 /* PREFIX_EVEX_0F3879 */
1226 { VEX_W_TABLE (EVEX_W_0F3879_P_2) },
1228 /* PREFIX_EVEX_0F387A */
1232 { VEX_W_TABLE (EVEX_W_0F387A_P_2) },
1234 /* PREFIX_EVEX_0F387B */
1238 { VEX_W_TABLE (EVEX_W_0F387B_P_2) },
1240 /* PREFIX_EVEX_0F387C */
1244 { "vpbroadcastK", { XM, Rdq }, 0 },
1246 /* PREFIX_EVEX_0F387D */
1250 { VEX_W_TABLE (EVEX_W_0F387D_P_2) },
1252 /* PREFIX_EVEX_0F387E */
1256 { "vpermt2%LW", { XM, Vex, EXx }, 0 },
1258 /* PREFIX_EVEX_0F387F */
1262 { "vpermt2p%XW", { XM, Vex, EXx }, 0 },
1264 /* PREFIX_EVEX_0F3883 */
1268 { VEX_W_TABLE (EVEX_W_0F3883_P_2) },
1270 /* PREFIX_EVEX_0F3888 */
1274 { "vexpandp%XW", { XM, EXEvexXGscat }, 0 },
1276 /* PREFIX_EVEX_0F3889 */
1280 { "vpexpand%LW", { XM, EXEvexXGscat }, 0 },
1282 /* PREFIX_EVEX_0F388A */
1286 { "vcompressp%XW", { EXEvexXGscat, XM }, 0 },
1288 /* PREFIX_EVEX_0F388B */
1292 { "vpcompress%LW", { EXEvexXGscat, XM }, 0 },
1294 /* PREFIX_EVEX_0F388D */
1298 { VEX_W_TABLE (EVEX_W_0F388D_P_2) },
1300 /* PREFIX_EVEX_0F388F */
1304 { "vpshufbitqmb", { XMask, Vex, EXx }, 0 },
1306 /* PREFIX_EVEX_0F3890 */
1310 { "vpgatherd%LW", { XM, MVexVSIBDWpX }, 0 },
1312 /* PREFIX_EVEX_0F3891 */
1316 { VEX_W_TABLE (EVEX_W_0F3891_P_2) },
1318 /* PREFIX_EVEX_0F3892 */
1322 { "vgatherdp%XW", { XM, MVexVSIBDWpX}, 0 },
1324 /* PREFIX_EVEX_0F3893 */
1328 { VEX_W_TABLE (EVEX_W_0F3893_P_2) },
1330 /* PREFIX_EVEX_0F3896 */
1334 { "vfmaddsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1336 /* PREFIX_EVEX_0F3897 */
1340 { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1342 /* PREFIX_EVEX_0F3898 */
1346 { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1348 /* PREFIX_EVEX_0F3899 */
1352 { "vfmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1354 /* PREFIX_EVEX_0F389A */
1358 { "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1359 { "v4fmaddps", { XM, Vex, Mxmm }, 0 },
1361 /* PREFIX_EVEX_0F389B */
1365 { "vfmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1366 { "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
1368 /* PREFIX_EVEX_0F389C */
1372 { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1374 /* PREFIX_EVEX_0F389D */
1378 { "vfnmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1380 /* PREFIX_EVEX_0F389E */
1384 { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1386 /* PREFIX_EVEX_0F389F */
1390 { "vfnmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1392 /* PREFIX_EVEX_0F38A0 */
1396 { "vpscatterd%LW", { MVexVSIBDWpX, XM }, 0 },
1398 /* PREFIX_EVEX_0F38A1 */
1402 { VEX_W_TABLE (EVEX_W_0F38A1_P_2) },
1404 /* PREFIX_EVEX_0F38A2 */
1408 { "vscatterdp%XW", { MVexVSIBDWpX, XM }, 0 },
1410 /* PREFIX_EVEX_0F38A3 */
1414 { VEX_W_TABLE (EVEX_W_0F38A3_P_2) },
1416 /* PREFIX_EVEX_0F38A6 */
1420 { "vfmaddsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1422 /* PREFIX_EVEX_0F38A7 */
1426 { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1428 /* PREFIX_EVEX_0F38A8 */
1432 { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1434 /* PREFIX_EVEX_0F38A9 */
1438 { "vfmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1440 /* PREFIX_EVEX_0F38AA */
1444 { "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1445 { "v4fnmaddps", { XM, Vex, Mxmm }, 0 },
1447 /* PREFIX_EVEX_0F38AB */
1451 { "vfmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1452 { "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
1454 /* PREFIX_EVEX_0F38AC */
1458 { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1460 /* PREFIX_EVEX_0F38AD */
1464 { "vfnmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1466 /* PREFIX_EVEX_0F38AE */
1470 { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1472 /* PREFIX_EVEX_0F38AF */
1476 { "vfnmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1478 /* PREFIX_EVEX_0F38B4 */
1482 { "vpmadd52luq", { XM, Vex, EXx }, 0 },
1484 /* PREFIX_EVEX_0F38B5 */
1488 { "vpmadd52huq", { XM, Vex, EXx }, 0 },
1490 /* PREFIX_EVEX_0F38B6 */
1494 { "vfmaddsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1496 /* PREFIX_EVEX_0F38B7 */
1500 { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1502 /* PREFIX_EVEX_0F38B8 */
1506 { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1508 /* PREFIX_EVEX_0F38B9 */
1512 { "vfmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1514 /* PREFIX_EVEX_0F38BA */
1518 { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1520 /* PREFIX_EVEX_0F38BB */
1524 { "vfmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1526 /* PREFIX_EVEX_0F38BC */
1530 { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1532 /* PREFIX_EVEX_0F38BD */
1536 { "vfnmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1538 /* PREFIX_EVEX_0F38BE */
1542 { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
1544 /* PREFIX_EVEX_0F38BF */
1548 { "vfnmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
1550 /* PREFIX_EVEX_0F38C4 */
1554 { "vpconflict%LW", { XM, EXx }, 0 },
1556 /* PREFIX_EVEX_0F38C6_REG_1 */
1560 { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_1_PREFIX_2) },
1562 /* PREFIX_EVEX_0F38C6_REG_2 */
1566 { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_2_PREFIX_2) },
1568 /* PREFIX_EVEX_0F38C6_REG_5 */
1572 { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_5_PREFIX_2) },
1574 /* PREFIX_EVEX_0F38C6_REG_6 */
1578 { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_6_PREFIX_2) },
1580 /* PREFIX_EVEX_0F38C7_REG_1 */
1584 { VEX_W_TABLE (EVEX_W_0F38C7_R_1_P_2) },
1586 /* PREFIX_EVEX_0F38C7_REG_2 */
1590 { VEX_W_TABLE (EVEX_W_0F38C7_R_2_P_2) },
1592 /* PREFIX_EVEX_0F38C7_REG_5 */
1596 { VEX_W_TABLE (EVEX_W_0F38C7_R_5_P_2) },
1598 /* PREFIX_EVEX_0F38C7_REG_6 */
1602 { VEX_W_TABLE (EVEX_W_0F38C7_R_6_P_2) },
1604 /* PREFIX_EVEX_0F38C8 */
1608 { "vexp2p%XW", { XM, EXx, EXxEVexS }, 0 },
1610 /* PREFIX_EVEX_0F38CA */
1614 { "vrcp28p%XW", { XM, EXx, EXxEVexS }, 0 },
1616 /* PREFIX_EVEX_0F38CB */
1620 { "vrcp28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 },
1622 /* PREFIX_EVEX_0F38CC */
1626 { "vrsqrt28p%XW", { XM, EXx, EXxEVexS }, 0 },
1628 /* PREFIX_EVEX_0F38CD */
1632 { "vrsqrt28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 },
1634 /* PREFIX_EVEX_0F38CF */
1638 { "vgf2p8mulb", { XM, Vex, EXx }, 0 },
1640 /* PREFIX_EVEX_0F38DC */
1644 { "vaesenc", { XM, Vex, EXx }, 0 },
1646 /* PREFIX_EVEX_0F38DD */
1650 { "vaesenclast", { XM, Vex, EXx }, 0 },
1652 /* PREFIX_EVEX_0F38DE */
1656 { "vaesdec", { XM, Vex, EXx }, 0 },
1658 /* PREFIX_EVEX_0F38DF */
1662 { "vaesdeclast", { XM, Vex, EXx }, 0 },
1664 /* PREFIX_EVEX_0F3A00 */
1668 { VEX_W_TABLE (EVEX_W_0F3A00_P_2) },
1670 /* PREFIX_EVEX_0F3A01 */
1674 { VEX_W_TABLE (EVEX_W_0F3A01_P_2) },
1676 /* PREFIX_EVEX_0F3A03 */
1680 { "valign%LW", { XM, Vex, EXx, Ib }, 0 },
1682 /* PREFIX_EVEX_0F3A04 */
1686 { VEX_W_TABLE (EVEX_W_0F3A04_P_2) },
1688 /* PREFIX_EVEX_0F3A05 */
1692 { VEX_W_TABLE (EVEX_W_0F3A05_P_2) },
1694 /* PREFIX_EVEX_0F3A08 */
1698 { VEX_W_TABLE (EVEX_W_0F3A08_P_2) },
1700 /* PREFIX_EVEX_0F3A09 */
1704 { VEX_W_TABLE (EVEX_W_0F3A09_P_2) },
1706 /* PREFIX_EVEX_0F3A0A */
1710 { VEX_W_TABLE (EVEX_W_0F3A0A_P_2) },
1712 /* PREFIX_EVEX_0F3A0B */
1716 { VEX_W_TABLE (EVEX_W_0F3A0B_P_2) },
1718 /* PREFIX_EVEX_0F3A0F */
1722 { "vpalignr", { XM, Vex, EXx, Ib }, 0 },
1724 /* PREFIX_EVEX_0F3A14 */
1728 { "vpextrb", { Edqb, XM, Ib }, 0 },
1730 /* PREFIX_EVEX_0F3A15 */
1734 { "vpextrw", { Edqw, XM, Ib }, 0 },
1736 /* PREFIX_EVEX_0F3A16 */
1740 { "vpextrK", { Edq, XM, Ib }, 0 },
1742 /* PREFIX_EVEX_0F3A17 */
1746 { "vextractps", { Edqd, XMM, Ib }, 0 },
1748 /* PREFIX_EVEX_0F3A18 */
1752 { VEX_W_TABLE (EVEX_W_0F3A18_P_2) },
1754 /* PREFIX_EVEX_0F3A19 */
1758 { VEX_W_TABLE (EVEX_W_0F3A19_P_2) },
1760 /* PREFIX_EVEX_0F3A1A */
1764 { VEX_W_TABLE (EVEX_W_0F3A1A_P_2) },
1766 /* PREFIX_EVEX_0F3A1B */
1770 { VEX_W_TABLE (EVEX_W_0F3A1B_P_2) },
1772 /* PREFIX_EVEX_0F3A1D */
1776 { VEX_W_TABLE (EVEX_W_0F3A1D_P_2) },
1778 /* PREFIX_EVEX_0F3A1E */
1782 { "vpcmpu%LW", { XMask, Vex, EXx, VPCMP }, 0 },
1784 /* PREFIX_EVEX_0F3A1F */
1788 { "vpcmp%LW", { XMask, Vex, EXx, VPCMP }, 0 },
1790 /* PREFIX_EVEX_0F3A20 */
1794 { "vpinsrb", { XM, Vex128, Edb, Ib }, 0 },
1796 /* PREFIX_EVEX_0F3A21 */
1800 { VEX_W_TABLE (EVEX_W_0F3A21_P_2) },
1802 /* PREFIX_EVEX_0F3A22 */
1806 { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
1808 /* PREFIX_EVEX_0F3A23 */
1812 { VEX_W_TABLE (EVEX_W_0F3A23_P_2) },
1814 /* PREFIX_EVEX_0F3A25 */
1818 { "vpternlog%LW", { XM, Vex, EXx, Ib }, 0 },
1820 /* PREFIX_EVEX_0F3A26 */
1824 { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
1826 /* PREFIX_EVEX_0F3A27 */
1830 { "vgetmants%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib }, 0 },
1832 /* PREFIX_EVEX_0F3A38 */
1836 { VEX_W_TABLE (EVEX_W_0F3A38_P_2) },
1838 /* PREFIX_EVEX_0F3A39 */
1842 { VEX_W_TABLE (EVEX_W_0F3A39_P_2) },
1844 /* PREFIX_EVEX_0F3A3A */
1848 { VEX_W_TABLE (EVEX_W_0F3A3A_P_2) },
1850 /* PREFIX_EVEX_0F3A3B */
1854 { VEX_W_TABLE (EVEX_W_0F3A3B_P_2) },
1856 /* PREFIX_EVEX_0F3A3E */
1860 { VEX_W_TABLE (EVEX_W_0F3A3E_P_2) },
1862 /* PREFIX_EVEX_0F3A3F */
1866 { VEX_W_TABLE (EVEX_W_0F3A3F_P_2) },
1868 /* PREFIX_EVEX_0F3A42 */
1872 { VEX_W_TABLE (EVEX_W_0F3A42_P_2) },
1874 /* PREFIX_EVEX_0F3A43 */
1878 { VEX_W_TABLE (EVEX_W_0F3A43_P_2) },
1880 /* PREFIX_EVEX_0F3A44 */
1884 { "vpclmulqdq", { XM, Vex, EXx, Ib }, 0 },
1886 /* PREFIX_EVEX_0F3A50 */
1890 { VEX_W_TABLE (EVEX_W_0F3A50_P_2) },
1892 /* PREFIX_EVEX_0F3A51 */
1896 { VEX_W_TABLE (EVEX_W_0F3A51_P_2) },
1898 /* PREFIX_EVEX_0F3A54 */
1902 { "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 },
1904 /* PREFIX_EVEX_0F3A55 */
1908 { "vfixupimms%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib }, 0 },
1910 /* PREFIX_EVEX_0F3A56 */
1914 { VEX_W_TABLE (EVEX_W_0F3A56_P_2) },
1916 /* PREFIX_EVEX_0F3A57 */
1920 { VEX_W_TABLE (EVEX_W_0F3A57_P_2) },
1922 /* PREFIX_EVEX_0F3A66 */
1926 { VEX_W_TABLE (EVEX_W_0F3A66_P_2) },
1928 /* PREFIX_EVEX_0F3A67 */
1932 { VEX_W_TABLE (EVEX_W_0F3A67_P_2) },
1934 /* PREFIX_EVEX_0F3A70 */
1938 { VEX_W_TABLE (EVEX_W_0F3A70_P_2) },
1940 /* PREFIX_EVEX_0F3A71 */
1944 { VEX_W_TABLE (EVEX_W_0F3A71_P_2) },
1946 /* PREFIX_EVEX_0F3A72 */
1950 { VEX_W_TABLE (EVEX_W_0F3A72_P_2) },
1952 /* PREFIX_EVEX_0F3A73 */
1956 { VEX_W_TABLE (EVEX_W_0F3A73_P_2) },
1958 /* PREFIX_EVEX_0F3ACE */
1962 { VEX_W_TABLE (EVEX_W_0F3ACE_P_2) },
1964 /* PREFIX_EVEX_0F3ACF */
1968 { VEX_W_TABLE (EVEX_W_0F3ACF_P_2) },