1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/hppa.h"
27 /* Integer register names, indexed by the numbers which appear in the
29 static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
35 /* Floating point register names, indexed by the numbers which appear in the
37 static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
44 typedef unsigned int CORE_ADDR;
46 /* Get at various relevent fields of an instruction word. */
51 #define MASK_14 0x3fff
52 #define MASK_21 0x1fffff
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char *const control_reg[] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
70 static const char *const compare_cond_names[] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
74 static const char *const compare_cond_64_names[] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
78 static const char *const cmpib_cond_64_names[] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
81 static const char *const add_cond_names[] = {
82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
85 static const char *const add_cond_64_names[] = {
86 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
89 static const char *const wide_add_cond_names[] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
93 static const char *const logical_cond_names[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
96 static const char *const logical_cond_64_names[] = {
97 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
99 static const char *const unit_cond_names[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
103 static const char *const unit_cond_64_names[] = {
104 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
107 static const char *const shift_cond_names[] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
110 static const char *const shift_cond_64_names[] = {
111 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
113 static const char *const bb_cond_64_names[] = {
116 static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"};
117 static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"};
118 static const char *const short_bytes_compl_names[] = {
119 "", ",b,m", ",e", ",e,m"
121 static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
122 static const char *const float_comp_names[] =
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
129 static const char *const signed_unsigned_names[] = {",u", ",s"};
130 static const char *const mix_half_names[] = {",l", ",r"};
131 static const char *const saturation_names[] = {",us", ",ss", 0, ""};
132 static const char *const read_write_names[] = {",r", ",w"};
133 static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
135 /* For a bunch of different instructions form an index into a
136 completer name table. */
137 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
138 GET_FIELD (insn, 18, 18) << 1)
140 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
141 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
143 /* Utility function to print registers. Put these first, so gcc's function
144 inlining can do its stuff. */
146 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
151 disassemble_info *info;
153 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
157 fput_fp_reg (reg, info)
159 disassemble_info *info;
161 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
165 fput_fp_reg_r (reg, info)
167 disassemble_info *info;
169 /* Special case floating point exception registers. */
171 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
173 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
178 fput_creg (reg, info)
180 disassemble_info *info;
182 (*info->fprintf_func) (info->stream, control_reg[reg]);
185 /* print constants with sign */
188 fput_const (num, info)
190 disassemble_info *info;
193 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
195 (*info->fprintf_func) (info->stream, "%x", num);
198 /* Routines to extract various sized constants out of hppa
201 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
206 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
210 extract_5_load (word)
213 return low_sign_extend (word >> 16 & MASK_5, 5);
216 /* extract the immediate field from a st{bhw}s instruction */
218 extract_5_store (word)
221 return low_sign_extend (word & MASK_5, 5);
224 /* extract the immediate field from a break instruction */
226 extract_5r_store (word)
229 return (word & MASK_5);
232 /* extract the immediate field from a {sr}sm instruction */
234 extract_5R_store (word)
237 return (word >> 16 & MASK_5);
240 /* extract the 10 bit immediate field from a {sr}sm instruction */
242 extract_10U_store (word)
245 return (word >> 16 & MASK_10);
248 /* extract the immediate field from a bb instruction */
250 extract_5Q_store (word)
253 return (word >> 21 & MASK_5);
256 /* extract an 11 bit immediate field */
261 return low_sign_extend (word & MASK_11, 11);
264 /* extract a 14 bit immediate field */
269 return low_sign_extend (word & MASK_14, 14);
272 /* extract a 21 bit constant */
282 val = GET_FIELD (word, 20, 20);
284 val |= GET_FIELD (word, 9, 19);
286 val |= GET_FIELD (word, 5, 6);
288 val |= GET_FIELD (word, 0, 4);
290 val |= GET_FIELD (word, 7, 8);
291 return sign_extend (val, 21) << 11;
294 /* extract a 12 bit constant from branch instructions */
300 return sign_extend (GET_FIELD (word, 19, 28) |
301 GET_FIELD (word, 29, 29) << 10 |
302 (word & 0x1) << 11, 12) << 2;
305 /* extract a 17 bit constant from branch instructions, returning the
306 19 bit signed value. */
312 return sign_extend (GET_FIELD (word, 19, 28) |
313 GET_FIELD (word, 29, 29) << 10 |
314 GET_FIELD (word, 11, 15) << 11 |
315 (word & 0x1) << 16, 17) << 2;
318 /* Print one instruction. */
320 print_insn_hppa (memaddr, info)
322 disassemble_info *info;
325 unsigned int insn, i;
329 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
332 (*info->memory_error_func) (status, memaddr, info);
337 insn = bfd_getb32 (buffer);
339 for (i = 0; i < NUMOPCODES; ++i)
341 const struct pa_opcode *opcode = &pa_opcodes[i];
342 if ((insn & opcode->mask) == opcode->match)
344 register const char *s;
346 (*info->fprintf_func) (info->stream, "%s", opcode->name);
348 if (!strchr ("cfCY?-+nHNZFIuv", opcode->args[0]))
349 (*info->fprintf_func) (info->stream, " ");
350 for (s = opcode->args; *s != '\0'; ++s)
355 fput_reg (GET_FIELD (insn, 11, 15), info);
359 fput_reg (GET_FIELD (insn, 6, 10), info);
362 fput_creg (GET_FIELD (insn, 6, 10), info);
365 fput_reg (GET_FIELD (insn, 27, 31), info);
368 /* Handle floating point registers. */
373 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
376 if (GET_FIELD (insn, 25, 25))
377 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
379 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
382 if (GET_FIELD (insn, 25, 25))
383 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
385 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
388 /* 'fA' will not generate a space before the regsiter
389 name. Normally that is fine. Except that it
390 causes problems with xmpyu which has no FP format
393 fputs_filtered (" ", info);
398 if (GET_FIELD (insn, 24, 24))
399 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
401 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
405 if (GET_FIELD (insn, 25, 25))
406 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
408 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
411 if (GET_FIELD (insn, 19, 19))
412 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
414 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
418 int reg = GET_FIELD (insn, 21, 22);
419 reg |= GET_FIELD (insn, 16, 18) << 2;
420 if (GET_FIELD (insn, 23, 23) != 0)
421 fput_fp_reg_r (reg, info);
423 fput_fp_reg (reg, info);
428 int reg = GET_FIELD (insn, 6, 10);
430 reg |= (GET_FIELD (insn, 26, 26) << 4);
431 fput_fp_reg (reg, info);
436 int reg = GET_FIELD (insn, 11, 15);
438 reg |= (GET_FIELD (insn, 26, 26) << 4);
439 fput_fp_reg (reg, info);
444 int reg = GET_FIELD (insn, 27, 31);
446 reg |= (GET_FIELD (insn, 26, 26) << 4);
447 fput_fp_reg (reg, info);
452 int reg = GET_FIELD (insn, 21, 25);
454 reg |= (GET_FIELD (insn, 26, 26) << 4);
455 fput_fp_reg (reg, info);
460 int reg = GET_FIELD (insn, 16, 20);
462 reg |= (GET_FIELD (insn, 26, 26) << 4);
463 fput_fp_reg (reg, info);
470 fput_const (extract_5_load (insn), info);
473 (*info->fprintf_func) (info->stream,
474 "sr%d", GET_FIELD (insn, 16, 17));
478 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
481 /* Handle completers. */
486 (*info->fprintf_func) (info->stream, "%s ",
487 index_compl_names[GET_COMPL (insn)]);
490 (*info->fprintf_func) (info->stream, "%s ",
491 short_ldst_compl_names[GET_COMPL (insn)]);
494 (*info->fprintf_func) (info->stream, "%s ",
495 short_bytes_compl_names[GET_COMPL (insn)]);
498 (*info->fprintf_func) (info->stream, ",l");
501 (*info->fprintf_func) (info->stream, "%s ",
502 read_write_names[GET_FIELD (insn, 25, 25)]);
505 (*info->fprintf_func) (info->stream, ",w");
508 if (GET_FIELD (insn, 23, 26) == 5)
509 (*info->fprintf_func) (info->stream, ",r");
512 if (GET_FIELD (insn, 26, 26))
513 (*info->fprintf_func) (info->stream, ",m ");
515 (*info->fprintf_func) (info->stream, " ");
518 if (GET_FIELD (insn, 25, 25))
519 (*info->fprintf_func) (info->stream, ",i");
522 if (!GET_FIELD (insn, 21, 21))
523 (*info->fprintf_func) (info->stream, ",z");
526 (*info->fprintf_func)
527 (info->stream, "%s", add_compl_names[GET_FIELD
531 (*info->fprintf_func)
532 (info->stream, ",dc%s", add_compl_names[GET_FIELD
536 (*info->fprintf_func)
537 (info->stream, ",c%s", add_compl_names[GET_FIELD
541 if (GET_FIELD (insn, 20, 20))
542 (*info->fprintf_func) (info->stream, ",tsv");
545 (*info->fprintf_func) (info->stream, ",tc");
546 if (GET_FIELD (insn, 20, 20))
547 (*info->fprintf_func) (info->stream, ",tsv");
550 (*info->fprintf_func) (info->stream, ",db");
551 if (GET_FIELD (insn, 20, 20))
552 (*info->fprintf_func) (info->stream, ",tsv");
555 (*info->fprintf_func) (info->stream, ",b");
556 if (GET_FIELD (insn, 20, 20))
557 (*info->fprintf_func) (info->stream, ",tsv");
560 if (GET_FIELD (insn, 25, 25))
561 (*info->fprintf_func) (info->stream, ",tc");
564 /* EXTRD/W has a following condition. */
566 (*info->fprintf_func)
567 (info->stream, "%s", signed_unsigned_names[GET_FIELD
570 (*info->fprintf_func)
571 (info->stream, "%s ", signed_unsigned_names[GET_FIELD
575 (*info->fprintf_func)
576 (info->stream, "%s", mix_half_names[GET_FIELD
580 (*info->fprintf_func)
581 (info->stream, "%s", saturation_names[GET_FIELD
585 (*info->fprintf_func)
586 (info->stream, ",%d%d%d%d ",
587 GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
588 GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
593 /* Handle conditions. */
600 (*info->fprintf_func) (info->stream, "%s ",
601 float_comp_names[GET_FIELD
605 /* these four conditions are for the set of instructions
606 which distinguish true/false conditions by opcode
607 rather than by the 'f' bit (sigh): comb, comib,
610 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
614 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
618 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)],
622 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
626 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
630 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
631 + GET_FIELD (insn, 4, 4) * 8], info);
634 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
635 + GET_FIELD (insn, 4, 4) * 8], info);
638 (*info->fprintf_func) (info->stream, "%s ",
639 compare_cond_names[GET_COND (insn)]);
642 (*info->fprintf_func) (info->stream, "%s ",
643 compare_cond_64_names[GET_COND (insn)]);
646 (*info->fprintf_func) (info->stream, "%s ",
647 add_cond_names[GET_COND (insn)]);
650 (*info->fprintf_func) (info->stream, "%s ",
651 add_cond_64_names[GET_COND (insn)]);
654 (*info->fprintf_func) (info->stream, "%s",
655 add_cond_names[GET_FIELD (insn, 16, 18)]);
659 (*info->fprintf_func) (info->stream, "%s",
660 add_cond_names[GET_FIELD (insn, 16, 18)
664 (*info->fprintf_func)
666 wide_add_cond_names[GET_FIELD (insn, 16, 18)]);
670 (*info->fprintf_func)
672 wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]);
676 (*info->fprintf_func) (info->stream, "%s ",
677 logical_cond_names[GET_COND (insn)]);
680 (*info->fprintf_func) (info->stream, "%s ",
681 logical_cond_64_names[GET_COND (insn)]);
684 (*info->fprintf_func) (info->stream, "%s ",
685 unit_cond_names[GET_COND (insn)]);
688 (*info->fprintf_func) (info->stream, "%s ",
689 unit_cond_64_names[GET_COND (insn)]);
694 (*info->fprintf_func)
696 shift_cond_names[GET_FIELD (insn, 16, 18)]);
698 /* If the next character in args is 'n', it will handle
699 putting out the space. */
701 (*info->fprintf_func) (info->stream, " ");
704 (*info->fprintf_func) (info->stream, "%s ",
705 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
708 (*info->fprintf_func)
710 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
712 /* If the next character in args is 'n', it will handle
713 putting out the space. */
715 (*info->fprintf_func) (info->stream, " ");
722 fput_const (extract_5_store (insn), info);
725 fput_const (extract_5r_store (insn), info);
728 fput_const (extract_5R_store (insn), info);
731 fput_const (extract_10U_store (insn), info);
734 fput_const (extract_5Q_store (insn), info);
737 fput_const (extract_11 (insn), info);
740 fput_const (extract_14 (insn), info);
743 fput_const (extract_21 (insn), info);
747 (*info->fprintf_func) (info->stream, ",n ");
749 (*info->fprintf_func) (info->stream, " ");
752 if ((insn & 0x20) && s[1])
753 (*info->fprintf_func) (info->stream, ",n ");
754 else if (insn & 0x20)
755 (*info->fprintf_func) (info->stream, ",n");
757 (*info->fprintf_func) (info->stream, " ");
760 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
764 /* 17 bit PC-relative branch. */
765 (*info->print_address_func) ((memaddr + 8
766 + extract_17 (insn)),
770 /* 17 bit displacement. This is an offset from a register
771 so it gets disasssembled as just a number, not any sort
773 fput_const (extract_17 (insn), info);
777 /* addil %r1 implicit output. */
778 (*info->fprintf_func) (info->stream, "%%r1");
782 (*info->fprintf_func) (info->stream, "%d",
783 GET_FIELD (insn, 24, 25));
786 (*info->fprintf_func) (info->stream, "%d",
787 GET_FIELD (insn, 22, 25));
790 (*info->fprintf_func) (info->stream, "%%sar");
793 (*info->fprintf_func) (info->stream, "%d",
794 31 - GET_FIELD (insn, 22, 26));
799 num = GET_FIELD (insn, 20, 20) << 5;
800 num |= GET_FIELD (insn, 22, 26);
801 (*info->fprintf_func) (info->stream, "%d", 63 - num);
805 (*info->fprintf_func) (info->stream, "%d",
806 GET_FIELD (insn, 22, 26));
811 num = GET_FIELD (insn, 20, 20) << 5;
812 num |= GET_FIELD (insn, 22, 26);
813 (*info->fprintf_func) (info->stream, "%d", num);
817 (*info->fprintf_func) (info->stream, "%d",
818 32 - GET_FIELD (insn, 27, 31));
823 num = (GET_FIELD (insn, 23, 23) + 1) * 32;
824 num -= GET_FIELD (insn, 27, 31);
825 (*info->fprintf_func) (info->stream, "%d", num);
831 num = (GET_FIELD (insn, 19, 19) + 1) * 32;
832 num -= GET_FIELD (insn, 27, 31);
833 (*info->fprintf_func) (info->stream, "%d", num);
837 fput_const (GET_FIELD (insn, 20, 28), info);
840 fput_const (GET_FIELD (insn, 6, 18), info);
843 fput_const (GET_FIELD (insn, 6, 31), info);
846 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
849 fput_const ((GET_FIELD (insn, 6,20) << 5 |
850 GET_FIELD (insn, 27, 31)), info);
853 fput_const (GET_FIELD (insn, 6, 20), info);
856 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
857 GET_FIELD (insn, 27, 31)), info);
860 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
861 GET_FIELD (insn, 27, 31)), info);
864 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
865 GET_FIELD (insn, 27, 31)), info);
868 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
871 /* if no destination completer and not before a completer
872 for fcmp, need a space here */
873 if (s[1] == 'G' || s[1] == '?')
874 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
877 (*info->fprintf_func) (info->stream, "%s ",
878 float_format_names[GET_FIELD
882 (*info->fprintf_func) (info->stream, "%s ",
883 float_format_names[GET_FIELD (insn,
887 if (GET_FIELD (insn, 26, 26) == 1)
888 (*info->fprintf_func) (info->stream, "%s ",
889 float_format_names[0]);
891 (*info->fprintf_func) (info->stream, "%s ",
892 float_format_names[1]);
895 /* if no destination completer and not before a completer
896 for fcmp, need a space here */
898 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
901 (*info->fprintf_func) (info->stream, "%s ",
902 float_format_names[GET_FIELD
908 fputs_filtered ("Disassembler botch.\n", info);
913 int y = GET_FIELD (insn, 16, 18);
916 fput_const ((y ^ 1) - 1, info);
924 cbit = GET_FIELD (insn, 16, 18);
927 (*info->fprintf_func) (info->stream, ",%d", cbit - 1);
933 int cond = GET_FIELD (insn, 27, 31);
936 fputs_filtered (" ", info);
938 fputs_filtered ("acc ", info);
940 fputs_filtered ("rej ", info);
942 fputs_filtered ("acc8 ", info);
944 fputs_filtered ("rej8 ", info);
946 fputs_filtered ("acc6 ", info);
948 fputs_filtered ("acc4 ", info);
950 fputs_filtered ("acc2 ", info);
955 (*info->print_address_func) ((memaddr + 8
956 + extract_22 (insn)),
960 fputs_filtered (",pop", info);
963 fputs_filtered (",push", info);
966 fputs_filtered (",%r2", info);
969 fputs_filtered (",gate", info);
972 fputs_filtered (",l", info);
975 (*info->fprintf_func) (info->stream, "%c", *s);
982 (*info->fprintf_func) (info->stream, "#%8x", insn);