1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/hppa.h"
27 /* Integer register names, indexed by the numbers which appear in the
29 static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
35 /* Floating point register names, indexed by the numbers which appear in the
37 static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
44 typedef unsigned int CORE_ADDR;
46 /* Get at various relevent fields of an instruction word. */
51 #define MASK_14 0x3fff
52 #define MASK_21 0x1fffff
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char *const control_reg[] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
70 static const char *const compare_cond_names[] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
74 static const char *const compare_cond_64_names[] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
78 static const char *const cmpib_cond_64_names[] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
81 static const char *const add_cond_names[] = {
82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
85 static const char *const add_cond_64_names[] = {
86 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
89 static const char *const wide_add_cond_names[] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
93 static const char *const logical_cond_names[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
96 static const char *const logical_cond_64_names[] = {
97 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
99 static const char *const unit_cond_names[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
103 static const char *const unit_cond_64_names[] = {
104 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
107 static const char *const shift_cond_names[] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
110 static const char *const shift_cond_64_names[] = {
111 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
113 static const char *const bb_cond_64_names[] = {
116 static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"};
117 static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"};
118 static const char *const short_bytes_compl_names[] = {
119 "", ",b,m", ",e", ",e,m"
121 static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
122 static const char *const float_comp_names[] =
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
129 static const char *const signed_unsigned_names[] = {",u", ",s"};
130 static const char *const mix_half_names[] = {",l", ",r"};
131 static const char *const saturation_names[] = {",us", ",ss", 0, ""};
132 static const char *const read_write_names[] = {",r", ",w"};
133 static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
135 /* For a bunch of different instructions form an index into a
136 completer name table. */
137 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
138 GET_FIELD (insn, 18, 18) << 1)
140 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
141 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
143 /* Utility function to print registers. Put these first, so gcc's function
144 inlining can do its stuff. */
146 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
151 disassemble_info *info;
153 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
157 fput_fp_reg (reg, info)
159 disassemble_info *info;
161 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
165 fput_fp_reg_r (reg, info)
167 disassemble_info *info;
169 /* Special case floating point exception registers. */
171 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
173 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
178 fput_creg (reg, info)
180 disassemble_info *info;
182 (*info->fprintf_func) (info->stream, control_reg[reg]);
185 /* print constants with sign */
188 fput_const (num, info)
190 disassemble_info *info;
193 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
195 (*info->fprintf_func) (info->stream, "%x", num);
198 /* Routines to extract various sized constants out of hppa
201 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
206 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
210 extract_5_load (word)
213 return low_sign_extend (word >> 16 & MASK_5, 5);
216 /* extract the immediate field from a st{bhw}s instruction */
218 extract_5_store (word)
221 return low_sign_extend (word & MASK_5, 5);
224 /* extract the immediate field from a break instruction */
226 extract_5r_store (word)
229 return (word & MASK_5);
232 /* extract the immediate field from a {sr}sm instruction */
234 extract_5R_store (word)
237 return (word >> 16 & MASK_5);
240 /* extract the 10 bit immediate field from a {sr}sm instruction */
242 extract_10U_store (word)
245 return (word >> 16 & MASK_10);
248 /* extract the immediate field from a bb instruction */
250 extract_5Q_store (word)
253 return (word >> 21 & MASK_5);
256 /* extract an 11 bit immediate field */
261 return low_sign_extend (word & MASK_11, 11);
264 /* extract a 14 bit immediate field */
269 return low_sign_extend (word & MASK_14, 14);
272 /* extract a 21 bit constant */
282 val = GET_FIELD (word, 20, 20);
284 val |= GET_FIELD (word, 9, 19);
286 val |= GET_FIELD (word, 5, 6);
288 val |= GET_FIELD (word, 0, 4);
290 val |= GET_FIELD (word, 7, 8);
291 return sign_extend (val, 21) << 11;
294 /* extract a 12 bit constant from branch instructions */
300 return sign_extend (GET_FIELD (word, 19, 28) |
301 GET_FIELD (word, 29, 29) << 10 |
302 (word & 0x1) << 11, 12) << 2;
305 /* extract a 17 bit constant from branch instructions, returning the
306 19 bit signed value. */
312 return sign_extend (GET_FIELD (word, 19, 28) |
313 GET_FIELD (word, 29, 29) << 10 |
314 GET_FIELD (word, 11, 15) << 11 |
315 (word & 0x1) << 16, 17) << 2;
322 return sign_extend (GET_FIELD (word, 19, 28) |
323 GET_FIELD (word, 29, 29) << 10 |
324 GET_FIELD (word, 11, 15) << 11 |
325 GET_FIELD (word, 6, 10) << 16 |
326 (word & 0x1) << 21, 22) << 2;
329 /* Print one instruction. */
331 print_insn_hppa (memaddr, info)
333 disassemble_info *info;
336 unsigned int insn, i;
340 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
343 (*info->memory_error_func) (status, memaddr, info);
348 insn = bfd_getb32 (buffer);
350 for (i = 0; i < NUMOPCODES; ++i)
352 const struct pa_opcode *opcode = &pa_opcodes[i];
353 if ((insn & opcode->mask) == opcode->match)
355 register const char *s;
357 (*info->fprintf_func) (info->stream, "%s", opcode->name);
359 if (!strchr ("cfCY?-+nHNZFIuv", opcode->args[0]))
360 (*info->fprintf_func) (info->stream, " ");
361 for (s = opcode->args; *s != '\0'; ++s)
366 fput_reg (GET_FIELD (insn, 11, 15), info);
370 fput_reg (GET_FIELD (insn, 6, 10), info);
373 fput_creg (GET_FIELD (insn, 6, 10), info);
376 fput_reg (GET_FIELD (insn, 27, 31), info);
379 /* Handle floating point registers. */
384 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
387 if (GET_FIELD (insn, 25, 25))
388 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
390 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
393 if (GET_FIELD (insn, 25, 25))
394 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
396 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
399 /* 'fA' will not generate a space before the regsiter
400 name. Normally that is fine. Except that it
401 causes problems with xmpyu which has no FP format
404 fputs_filtered (" ", info);
409 if (GET_FIELD (insn, 24, 24))
410 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
412 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
416 if (GET_FIELD (insn, 25, 25))
417 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
419 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
422 if (GET_FIELD (insn, 19, 19))
423 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
425 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
429 int reg = GET_FIELD (insn, 21, 22);
430 reg |= GET_FIELD (insn, 16, 18) << 2;
431 if (GET_FIELD (insn, 23, 23) != 0)
432 fput_fp_reg_r (reg, info);
434 fput_fp_reg (reg, info);
439 int reg = GET_FIELD (insn, 6, 10);
441 reg |= (GET_FIELD (insn, 26, 26) << 4);
442 fput_fp_reg (reg, info);
447 int reg = GET_FIELD (insn, 11, 15);
449 reg |= (GET_FIELD (insn, 26, 26) << 4);
450 fput_fp_reg (reg, info);
455 int reg = GET_FIELD (insn, 27, 31);
457 reg |= (GET_FIELD (insn, 26, 26) << 4);
458 fput_fp_reg (reg, info);
463 int reg = GET_FIELD (insn, 21, 25);
465 reg |= (GET_FIELD (insn, 26, 26) << 4);
466 fput_fp_reg (reg, info);
471 int reg = GET_FIELD (insn, 16, 20);
473 reg |= (GET_FIELD (insn, 26, 26) << 4);
474 fput_fp_reg (reg, info);
478 if (GET_FIELD (insn, 25, 25))
479 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
481 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
488 fput_const (extract_5_load (insn), info);
491 (*info->fprintf_func) (info->stream,
492 "sr%d", GET_FIELD (insn, 16, 17));
496 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
499 /* Handle completers. */
504 (*info->fprintf_func) (info->stream, "%s ",
505 index_compl_names[GET_COMPL (insn)]);
508 (*info->fprintf_func) (info->stream, "%s ",
509 short_ldst_compl_names[GET_COMPL (insn)]);
512 (*info->fprintf_func) (info->stream, "%s ",
513 short_bytes_compl_names[GET_COMPL (insn)]);
517 switch (GET_FIELD (insn, 20, 21))
520 (*info->fprintf_func) (info->stream, ",bc ");
523 (*info->fprintf_func) (info->stream, ",sl ");
526 (*info->fprintf_func) (info->stream, " ");
530 switch (GET_FIELD (insn, 20, 21))
533 (*info->fprintf_func) (info->stream, ",co ");
536 (*info->fprintf_func) (info->stream, " ");
540 (*info->fprintf_func) (info->stream, ",o");
543 (*info->fprintf_func) (info->stream, ",gate");
546 (*info->fprintf_func) (info->stream, ",l,push");
549 (*info->fprintf_func) (info->stream, ",pop");
553 (*info->fprintf_func) (info->stream, ",l");
556 (*info->fprintf_func) (info->stream, "%s ",
557 read_write_names[GET_FIELD (insn, 25, 25)]);
560 (*info->fprintf_func) (info->stream, ",w");
563 if (GET_FIELD (insn, 23, 26) == 5)
564 (*info->fprintf_func) (info->stream, ",r");
567 if (GET_FIELD (insn, 26, 26))
568 (*info->fprintf_func) (info->stream, ",m ");
570 (*info->fprintf_func) (info->stream, " ");
573 if (GET_FIELD (insn, 25, 25))
574 (*info->fprintf_func) (info->stream, ",i");
577 if (!GET_FIELD (insn, 21, 21))
578 (*info->fprintf_func) (info->stream, ",z");
581 (*info->fprintf_func)
582 (info->stream, "%s", add_compl_names[GET_FIELD
586 (*info->fprintf_func)
587 (info->stream, ",dc%s", add_compl_names[GET_FIELD
591 (*info->fprintf_func)
592 (info->stream, ",c%s", add_compl_names[GET_FIELD
596 if (GET_FIELD (insn, 20, 20))
597 (*info->fprintf_func) (info->stream, ",tsv");
600 (*info->fprintf_func) (info->stream, ",tc");
601 if (GET_FIELD (insn, 20, 20))
602 (*info->fprintf_func) (info->stream, ",tsv");
605 (*info->fprintf_func) (info->stream, ",db");
606 if (GET_FIELD (insn, 20, 20))
607 (*info->fprintf_func) (info->stream, ",tsv");
610 (*info->fprintf_func) (info->stream, ",b");
611 if (GET_FIELD (insn, 20, 20))
612 (*info->fprintf_func) (info->stream, ",tsv");
615 if (GET_FIELD (insn, 25, 25))
616 (*info->fprintf_func) (info->stream, ",tc");
619 /* EXTRD/W has a following condition. */
621 (*info->fprintf_func)
622 (info->stream, "%s", signed_unsigned_names[GET_FIELD
625 (*info->fprintf_func)
626 (info->stream, "%s ", signed_unsigned_names[GET_FIELD
630 (*info->fprintf_func)
631 (info->stream, "%s", mix_half_names[GET_FIELD
635 (*info->fprintf_func)
636 (info->stream, "%s", saturation_names[GET_FIELD
640 (*info->fprintf_func)
641 (info->stream, ",%d%d%d%d ",
642 GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
643 GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
650 m = GET_FIELD (insn, 28, 28);
651 a = GET_FIELD (insn, 29, 29);
654 fputs_filtered (",ma ", info);
656 fputs_filtered (",mb ", info);
658 fputs_filtered (" ", info);
664 int opcode = GET_FIELD (insn, 0, 5);
666 if (opcode == 0x16 || opcode == 0x1e)
668 if (GET_FIELD (insn, 29, 29) == 0)
669 fputs_filtered (",ma ", info);
671 fputs_filtered (",mb ", info);
674 fputs_filtered (" ", info);
680 int opcode = GET_FIELD (insn, 0, 5);
682 if (opcode == 0x13 || opcode == 0x1b)
684 if (GET_FIELD (insn, 18, 18) == 1)
685 fputs_filtered (",mb ", info);
687 fputs_filtered (",ma ", info);
689 else if (opcode == 0x17 || opcode == 0x1f)
691 if (GET_FIELD (insn, 31, 31) == 1)
692 fputs_filtered (",ma ", info);
694 fputs_filtered (",mb ", info);
697 fputs_filtered (" ", info);
704 /* Handle conditions. */
711 (*info->fprintf_func) (info->stream, "%s ",
712 float_comp_names[GET_FIELD
716 /* these four conditions are for the set of instructions
717 which distinguish true/false conditions by opcode
718 rather than by the 'f' bit (sigh): comb, comib,
721 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
725 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
726 + GET_FIELD (insn, 4, 4) * 8], info);
729 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
730 + GET_FIELD (insn, 2, 2) * 8], info);
733 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
737 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
738 + GET_FIELD (insn, 4, 4) * 8], info);
741 (*info->fprintf_func) (info->stream, "%s ",
742 compare_cond_names[GET_COND (insn)]);
745 (*info->fprintf_func) (info->stream, "%s ",
746 compare_cond_64_names[GET_COND (insn)]);
749 (*info->fprintf_func) (info->stream, "%s ",
750 add_cond_names[GET_COND (insn)]);
753 (*info->fprintf_func) (info->stream, "%s ",
754 add_cond_64_names[GET_COND (insn)]);
757 (*info->fprintf_func) (info->stream, "%s",
758 add_cond_names[GET_FIELD (insn, 16, 18)]);
762 (*info->fprintf_func)
764 wide_add_cond_names[GET_FIELD (insn, 16, 18) +
765 GET_FIELD (insn, 4, 4) * 8]);
769 (*info->fprintf_func) (info->stream, "%s ",
770 logical_cond_names[GET_COND (insn)]);
773 (*info->fprintf_func) (info->stream, "%s ",
774 logical_cond_64_names[GET_COND (insn)]);
777 (*info->fprintf_func) (info->stream, "%s ",
778 unit_cond_names[GET_COND (insn)]);
781 (*info->fprintf_func) (info->stream, "%s ",
782 unit_cond_64_names[GET_COND (insn)]);
787 (*info->fprintf_func)
789 shift_cond_names[GET_FIELD (insn, 16, 18)]);
791 /* If the next character in args is 'n', it will handle
792 putting out the space. */
794 (*info->fprintf_func) (info->stream, " ");
797 (*info->fprintf_func) (info->stream, "%s ",
798 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
801 (*info->fprintf_func)
803 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
805 /* If the next character in args is 'n', it will handle
806 putting out the space. */
808 (*info->fprintf_func) (info->stream, " ");
815 fput_const (extract_5_store (insn), info);
818 fput_const (extract_5r_store (insn), info);
821 fput_const (extract_5R_store (insn), info);
824 fput_const (extract_10U_store (insn), info);
827 fput_const (extract_5Q_store (insn), info);
830 fput_const (extract_11 (insn), info);
833 fput_const (extract_14 (insn), info);
836 fput_const (extract_21 (insn), info);
840 (*info->fprintf_func) (info->stream, ",n ");
842 (*info->fprintf_func) (info->stream, " ");
845 if ((insn & 0x20) && s[1])
846 (*info->fprintf_func) (info->stream, ",n ");
847 else if (insn & 0x20)
848 (*info->fprintf_func) (info->stream, ",n");
850 (*info->fprintf_func) (info->stream, " ");
853 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
857 /* 17 bit PC-relative branch. */
858 (*info->print_address_func) ((memaddr + 8
859 + extract_17 (insn)),
863 /* 17 bit displacement. This is an offset from a register
864 so it gets disasssembled as just a number, not any sort
866 fput_const (extract_17 (insn), info);
870 /* addil %r1 implicit output. */
871 (*info->fprintf_func) (info->stream, "%%r1");
875 /* be,l %sr0,%r31 implicit output. */
876 (*info->fprintf_func) (info->stream, "%%sr0,%%r31");
880 (*info->fprintf_func) (info->stream, "0");
884 (*info->fprintf_func) (info->stream, "%d",
885 GET_FIELD (insn, 24, 25));
888 (*info->fprintf_func) (info->stream, "%d",
889 GET_FIELD (insn, 22, 25));
892 (*info->fprintf_func) (info->stream, "%%sar");
895 (*info->fprintf_func) (info->stream, "%d",
896 31 - GET_FIELD (insn, 22, 26));
901 num = GET_FIELD (insn, 20, 20) << 5;
902 num |= GET_FIELD (insn, 22, 26);
903 (*info->fprintf_func) (info->stream, "%d", 63 - num);
907 (*info->fprintf_func) (info->stream, "%d",
908 GET_FIELD (insn, 22, 26));
913 num = GET_FIELD (insn, 20, 20) << 5;
914 num |= GET_FIELD (insn, 22, 26);
915 (*info->fprintf_func) (info->stream, "%d", num);
919 (*info->fprintf_func) (info->stream, "%d",
920 32 - GET_FIELD (insn, 27, 31));
925 num = (GET_FIELD (insn, 23, 23) + 1) * 32;
926 num -= GET_FIELD (insn, 27, 31);
927 (*info->fprintf_func) (info->stream, "%d", num);
933 num = (GET_FIELD (insn, 19, 19) + 1) * 32;
934 num -= GET_FIELD (insn, 27, 31);
935 (*info->fprintf_func) (info->stream, "%d", num);
939 fput_const (GET_FIELD (insn, 20, 28), info);
942 fput_const (GET_FIELD (insn, 6, 18), info);
945 fput_const (GET_FIELD (insn, 6, 31), info);
948 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
951 fput_const ((GET_FIELD (insn, 6,20) << 5 |
952 GET_FIELD (insn, 27, 31)), info);
955 fput_const (GET_FIELD (insn, 6, 20), info);
958 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
959 GET_FIELD (insn, 27, 31)), info);
962 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
963 GET_FIELD (insn, 27, 31)), info);
966 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
967 GET_FIELD (insn, 27, 31)), info);
970 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
973 /* if no destination completer and not before a completer
974 for fcmp, need a space here */
975 if (s[1] == 'G' || s[1] == '?')
976 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
979 (*info->fprintf_func) (info->stream, "%s ",
980 float_format_names[GET_FIELD
984 (*info->fprintf_func) (info->stream, "%s ",
985 float_format_names[GET_FIELD (insn,
989 if (GET_FIELD (insn, 26, 26) == 1)
990 (*info->fprintf_func) (info->stream, "%s ",
991 float_format_names[0]);
993 (*info->fprintf_func) (info->stream, "%s ",
994 float_format_names[1]);
997 /* if no destination completer and not before a completer
998 for fcmp, need a space here */
1000 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
1003 (*info->fprintf_func) (info->stream, "%s ",
1004 float_format_names[GET_FIELD
1009 fput_const (extract_14 (insn), info);
1014 int sign = GET_FIELD (insn, 31, 31);
1015 int imm10 = GET_FIELD (insn, 18, 27);
1019 disp = (-1 << 10) | imm10;
1024 fput_const (disp, info);
1030 int sign = GET_FIELD (insn, 31, 31);
1031 int imm11 = GET_FIELD (insn, 18, 28);
1035 disp = (-1 << 11) | imm11;
1040 fput_const (disp, info);
1047 fputs_filtered ("Disassembler botch.\n", info);
1052 int y = GET_FIELD (insn, 16, 18);
1055 fput_const ((y ^ 1) - 1, info);
1063 cbit = GET_FIELD (insn, 16, 18);
1066 (*info->fprintf_func) (info->stream, ",%d", cbit - 1);
1072 int cond = GET_FIELD (insn, 27, 31);
1075 fputs_filtered (" ", info);
1077 fputs_filtered ("acc ", info);
1079 fputs_filtered ("rej ", info);
1081 fputs_filtered ("acc8 ", info);
1083 fputs_filtered ("rej8 ", info);
1085 fputs_filtered ("acc6 ", info);
1086 else if (cond == 13)
1087 fputs_filtered ("acc4 ", info);
1088 else if (cond == 17)
1089 fputs_filtered ("acc2 ", info);
1094 (*info->print_address_func) ((memaddr + 8
1095 + extract_22 (insn)),
1099 fputs_filtered (",%r2", info);
1102 (*info->fprintf_func) (info->stream, "%c", *s);
1106 return sizeof(insn);
1109 (*info->fprintf_func) (info->stream, "#%8x", insn);
1110 return sizeof(insn);