1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 90, 92, 93, 94, 95, 98, 99, 2000
3 Free Software Foundation, Inc.
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/hppa.h"
27 /* Integer register names, indexed by the numbers which appear in the
29 static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
35 /* Floating point register names, indexed by the numbers which appear in the
37 static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
44 typedef unsigned int CORE_ADDR;
46 /* Get at various relevent fields of an instruction word. */
51 #define MASK_14 0x3fff
52 #define MASK_16 0xffff
53 #define MASK_21 0x1fffff
55 /* These macros get bit fields using HP's numbering (MSB = 0) */
57 #define GET_FIELD(X, FROM, TO) \
58 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
60 #define GET_BIT(X, WHICH) \
61 GET_FIELD (X, WHICH, WHICH)
63 /* Some of these have been converted to 2-d arrays because they
64 consume less storage this way. If the maintenance becomes a
65 problem, convert them back to const 1-d pointer arrays. */
66 static const char *const control_reg[] = {
67 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
68 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
69 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
70 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
71 "tr4", "tr5", "tr6", "tr7"
74 static const char *const compare_cond_names[] = {
75 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
76 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
78 static const char *const compare_cond_64_names[] = {
79 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
80 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
82 static const char *const cmpib_cond_64_names[] = {
83 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
85 static const char *const add_cond_names[] = {
86 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
87 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
89 static const char *const add_cond_64_names[] = {
90 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
91 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
93 static const char *const wide_add_cond_names[] = {
94 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
95 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
97 static const char *const logical_cond_names[] = {
98 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
99 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
100 static const char *const logical_cond_64_names[] = {
101 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
102 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
103 static const char *const unit_cond_names[] = {
104 "", ",swz", ",sbz", ",shz", ",sdc", ",swc", ",sbc", ",shc",
105 ",tr", ",nwz", ",nbz", ",nhz", ",ndc", ",nwc", ",nbc", ",nhc"
107 static const char *const unit_cond_64_names[] = {
108 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
109 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
111 static const char *const shift_cond_names[] = {
112 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
114 static const char *const shift_cond_64_names[] = {
115 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
117 static const char *const bb_cond_64_names[] = {
120 static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"};
121 static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"};
122 static const char *const short_bytes_compl_names[] = {
123 "", ",b,m", ",e", ",e,m"
125 static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
126 static const char *const float_comp_names[] =
128 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
129 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
130 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
131 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
133 static const char *const signed_unsigned_names[] = {",u", ",s"};
134 static const char *const mix_half_names[] = {",l", ",r"};
135 static const char *const saturation_names[] = {",us", ",ss", 0, ""};
136 static const char *const read_write_names[] = {",r", ",w"};
137 static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
139 /* For a bunch of different instructions form an index into a
140 completer name table. */
141 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
142 GET_FIELD (insn, 18, 18) << 1)
144 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
145 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
147 static void fput_reg PARAMS ((unsigned int, disassemble_info *));
148 static void fput_fp_reg PARAMS ((unsigned int, disassemble_info *));
149 static void fput_fp_reg_r PARAMS ((unsigned int, disassemble_info *));
150 static void fput_creg PARAMS ((unsigned int, disassemble_info *));
151 static void fput_const PARAMS ((unsigned int, disassemble_info *));
152 static int extract_3 PARAMS ((unsigned int));
153 static int extract_5_load PARAMS ((unsigned int));
154 static int extract_5_store PARAMS ((unsigned int));
155 static unsigned extract_5r_store PARAMS ((unsigned int));
156 static unsigned extract_5R_store PARAMS ((unsigned int));
157 static unsigned extract_10U_store PARAMS ((unsigned int));
158 static unsigned extract_5Q_store PARAMS ((unsigned int));
159 static int extract_11 PARAMS ((unsigned int));
160 static int extract_14 PARAMS ((unsigned int));
161 static int extract_16 PARAMS ((unsigned int));
162 static int extract_21 PARAMS ((unsigned int));
163 static int extract_12 PARAMS ((unsigned int));
164 static int extract_17 PARAMS ((unsigned int));
165 static int extract_22 PARAMS ((unsigned int));
167 /* Utility function to print registers. Put these first, so gcc's function
168 inlining can do its stuff. */
170 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
175 disassemble_info *info;
177 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
181 fput_fp_reg (reg, info)
183 disassemble_info *info;
185 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
189 fput_fp_reg_r (reg, info)
191 disassemble_info *info;
193 /* Special case floating point exception registers. */
195 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
197 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
202 fput_creg (reg, info)
204 disassemble_info *info;
206 (*info->fprintf_func) (info->stream, control_reg[reg]);
209 /* Print constants with sign. */
212 fput_const (num, info)
214 disassemble_info *info;
217 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
219 (*info->fprintf_func) (info->stream, "%x", num);
222 /* Routines to extract various sized constants out of hppa
225 /* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */
230 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
234 extract_5_load (word)
237 return low_sign_extend (word >> 16 & MASK_5, 5);
240 /* Extract the immediate field from a st{bhw}s instruction. */
242 extract_5_store (word)
245 return low_sign_extend (word & MASK_5, 5);
248 /* Extract the immediate field from a break instruction. */
250 extract_5r_store (word)
253 return (word & MASK_5);
256 /* Extract the immediate field from a {sr}sm instruction. */
258 extract_5R_store (word)
261 return (word >> 16 & MASK_5);
264 /* Extract the 10 bit immediate field from a {sr}sm instruction. */
266 extract_10U_store (word)
269 return (word >> 16 & MASK_10);
272 /* Extract the immediate field from a bb instruction. */
274 extract_5Q_store (word)
277 return (word >> 21 & MASK_5);
280 /* Extract an 11 bit immediate field. */
285 return low_sign_extend (word & MASK_11, 11);
288 /* Extract a 14 bit immediate field. */
293 return low_sign_extend (word & MASK_14, 14);
296 /* Extract a 16 bit immediate field (PA2.0 wide only). */
302 m0 = GET_BIT (word, 16);
303 m1 = GET_BIT (word, 17);
304 m15 = GET_BIT (word, 31);
305 word = (word >> 1) & 0x1fff;
306 word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13);
307 return sign_extend (word, 16);
310 /* Extract a 21 bit constant. */
320 val = GET_FIELD (word, 20, 20);
322 val |= GET_FIELD (word, 9, 19);
324 val |= GET_FIELD (word, 5, 6);
326 val |= GET_FIELD (word, 0, 4);
328 val |= GET_FIELD (word, 7, 8);
329 return sign_extend (val, 21) << 11;
332 /* Extract a 12 bit constant from branch instructions. */
338 return sign_extend (GET_FIELD (word, 19, 28) |
339 GET_FIELD (word, 29, 29) << 10 |
340 (word & 0x1) << 11, 12) << 2;
343 /* Extract a 17 bit constant from branch instructions, returning the
344 19 bit signed value. */
350 return sign_extend (GET_FIELD (word, 19, 28) |
351 GET_FIELD (word, 29, 29) << 10 |
352 GET_FIELD (word, 11, 15) << 11 |
353 (word & 0x1) << 16, 17) << 2;
360 return sign_extend (GET_FIELD (word, 19, 28) |
361 GET_FIELD (word, 29, 29) << 10 |
362 GET_FIELD (word, 11, 15) << 11 |
363 GET_FIELD (word, 6, 10) << 16 |
364 (word & 0x1) << 21, 22) << 2;
367 /* Print one instruction. */
369 print_insn_hppa (memaddr, info)
371 disassemble_info *info;
374 unsigned int insn, i;
378 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
381 (*info->memory_error_func) (status, memaddr, info);
386 insn = bfd_getb32 (buffer);
388 for (i = 0; i < NUMOPCODES; ++i)
390 const struct pa_opcode *opcode = &pa_opcodes[i];
391 if ((insn & opcode->mask) == opcode->match)
393 register const char *s;
395 if (opcode->arch == pa20w)
398 (*info->fprintf_func) (info->stream, "%s", opcode->name);
400 if (!strchr ("cfCY?-+nHNZFIuv", opcode->args[0]))
401 (*info->fprintf_func) (info->stream, " ");
402 for (s = opcode->args; *s != '\0'; ++s)
407 fput_reg (GET_FIELD (insn, 11, 15), info);
411 fput_reg (GET_FIELD (insn, 6, 10), info);
414 fput_creg (GET_FIELD (insn, 6, 10), info);
417 fput_reg (GET_FIELD (insn, 27, 31), info);
420 /* Handle floating point registers. */
425 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
428 if (GET_FIELD (insn, 25, 25))
429 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
431 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
434 if (GET_FIELD (insn, 25, 25))
435 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
437 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
440 /* 'fA' will not generate a space before the regsiter
441 name. Normally that is fine. Except that it
442 causes problems with xmpyu which has no FP format
445 fputs_filtered (" ", info);
450 if (GET_FIELD (insn, 24, 24))
451 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
453 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
457 if (GET_FIELD (insn, 25, 25))
458 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
460 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
463 if (GET_FIELD (insn, 19, 19))
464 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
466 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
470 int reg = GET_FIELD (insn, 21, 22);
471 reg |= GET_FIELD (insn, 16, 18) << 2;
472 if (GET_FIELD (insn, 23, 23) != 0)
473 fput_fp_reg_r (reg, info);
475 fput_fp_reg (reg, info);
480 int reg = GET_FIELD (insn, 6, 10);
482 reg |= (GET_FIELD (insn, 26, 26) << 4);
483 fput_fp_reg (reg, info);
488 int reg = GET_FIELD (insn, 11, 15);
490 reg |= (GET_FIELD (insn, 26, 26) << 4);
491 fput_fp_reg (reg, info);
496 int reg = GET_FIELD (insn, 27, 31);
498 reg |= (GET_FIELD (insn, 26, 26) << 4);
499 fput_fp_reg (reg, info);
504 int reg = GET_FIELD (insn, 21, 25);
506 reg |= (GET_FIELD (insn, 26, 26) << 4);
507 fput_fp_reg (reg, info);
512 int reg = GET_FIELD (insn, 16, 20);
514 reg |= (GET_FIELD (insn, 26, 26) << 4);
515 fput_fp_reg (reg, info);
519 /* 'fe' will not generate a space before the register
520 name. Normally that is fine. Except that it
521 causes problems with fstw fe,y(b) which has no FP
524 fputs_filtered (" ", info);
529 if (GET_FIELD (insn, 30, 30))
530 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
532 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
535 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
541 fput_const (extract_5_load (insn), info);
544 (*info->fprintf_func) (info->stream,
545 "sr%d", GET_FIELD (insn, 16, 17));
549 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
552 /* Handle completers. */
557 (*info->fprintf_func) (info->stream, "%s ",
558 index_compl_names[GET_COMPL (insn)]);
561 (*info->fprintf_func) (info->stream, "%s ",
562 short_ldst_compl_names[GET_COMPL (insn)]);
565 (*info->fprintf_func) (info->stream, "%s ",
566 short_bytes_compl_names[GET_COMPL (insn)]);
570 switch (GET_FIELD (insn, 20, 21))
573 (*info->fprintf_func) (info->stream, ",bc ");
576 (*info->fprintf_func) (info->stream, ",sl ");
579 (*info->fprintf_func) (info->stream, " ");
583 switch (GET_FIELD (insn, 20, 21))
586 (*info->fprintf_func) (info->stream, ",co ");
589 (*info->fprintf_func) (info->stream, " ");
593 (*info->fprintf_func) (info->stream, ",o");
596 (*info->fprintf_func) (info->stream, ",gate");
599 (*info->fprintf_func) (info->stream, ",l,push");
602 (*info->fprintf_func) (info->stream, ",pop");
606 (*info->fprintf_func) (info->stream, ",l");
609 (*info->fprintf_func) (info->stream, "%s ",
610 read_write_names[GET_FIELD (insn, 25, 25)]);
613 (*info->fprintf_func) (info->stream, ",w");
616 if (GET_FIELD (insn, 23, 26) == 5)
617 (*info->fprintf_func) (info->stream, ",r");
620 if (GET_FIELD (insn, 26, 26))
621 (*info->fprintf_func) (info->stream, ",m ");
623 (*info->fprintf_func) (info->stream, " ");
626 if (GET_FIELD (insn, 25, 25))
627 (*info->fprintf_func) (info->stream, ",i");
630 if (!GET_FIELD (insn, 21, 21))
631 (*info->fprintf_func) (info->stream, ",z");
634 (*info->fprintf_func)
635 (info->stream, "%s", add_compl_names[GET_FIELD
639 (*info->fprintf_func)
640 (info->stream, ",dc%s", add_compl_names[GET_FIELD
644 (*info->fprintf_func)
645 (info->stream, ",c%s", add_compl_names[GET_FIELD
649 if (GET_FIELD (insn, 20, 20))
650 (*info->fprintf_func) (info->stream, ",tsv");
653 (*info->fprintf_func) (info->stream, ",tc");
654 if (GET_FIELD (insn, 20, 20))
655 (*info->fprintf_func) (info->stream, ",tsv");
658 (*info->fprintf_func) (info->stream, ",db");
659 if (GET_FIELD (insn, 20, 20))
660 (*info->fprintf_func) (info->stream, ",tsv");
663 (*info->fprintf_func) (info->stream, ",b");
664 if (GET_FIELD (insn, 20, 20))
665 (*info->fprintf_func) (info->stream, ",tsv");
668 if (GET_FIELD (insn, 25, 25))
669 (*info->fprintf_func) (info->stream, ",tc");
672 /* EXTRD/W has a following condition. */
674 (*info->fprintf_func)
675 (info->stream, "%s", signed_unsigned_names[GET_FIELD
678 (*info->fprintf_func)
679 (info->stream, "%s ", signed_unsigned_names[GET_FIELD
683 (*info->fprintf_func)
684 (info->stream, "%s", mix_half_names[GET_FIELD
688 (*info->fprintf_func)
689 (info->stream, "%s", saturation_names[GET_FIELD
693 (*info->fprintf_func)
694 (info->stream, ",%d%d%d%d ",
695 GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
696 GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
703 m = GET_FIELD (insn, 28, 28);
704 a = GET_FIELD (insn, 29, 29);
707 fputs_filtered (",ma ", info);
709 fputs_filtered (",mb ", info);
711 fputs_filtered (" ", info);
717 int opc = GET_FIELD (insn, 0, 5);
719 if (opc == 0x16 || opc == 0x1e)
721 if (GET_FIELD (insn, 29, 29) == 0)
722 fputs_filtered (",ma ", info);
724 fputs_filtered (",mb ", info);
727 fputs_filtered (" ", info);
733 int opc = GET_FIELD (insn, 0, 5);
735 if (opc == 0x13 || opc == 0x1b)
737 if (GET_FIELD (insn, 18, 18) == 1)
738 fputs_filtered (",mb ", info);
740 fputs_filtered (",ma ", info);
742 else if (opc == 0x17 || opc == 0x1f)
744 if (GET_FIELD (insn, 31, 31) == 1)
745 fputs_filtered (",ma ", info);
747 fputs_filtered (",mb ", info);
750 fputs_filtered (" ", info);
757 /* Handle conditions. */
764 (*info->fprintf_func) (info->stream, "%s ",
765 float_comp_names[GET_FIELD
769 /* these four conditions are for the set of instructions
770 which distinguish true/false conditions by opcode
771 rather than by the 'f' bit (sigh): comb, comib,
774 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
778 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
779 + GET_FIELD (insn, 4, 4) * 8], info);
782 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
783 + GET_FIELD (insn, 2, 2) * 8], info);
786 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
790 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
791 + GET_FIELD (insn, 4, 4) * 8], info);
794 (*info->fprintf_func) (info->stream, "%s ",
795 compare_cond_names[GET_COND (insn)]);
798 (*info->fprintf_func) (info->stream, "%s ",
799 compare_cond_64_names[GET_COND (insn)]);
802 (*info->fprintf_func) (info->stream, "%s ",
803 add_cond_names[GET_COND (insn)]);
806 (*info->fprintf_func) (info->stream, "%s ",
807 add_cond_64_names[GET_COND (insn)]);
810 (*info->fprintf_func) (info->stream, "%s",
811 add_cond_names[GET_FIELD (insn, 16, 18)]);
815 (*info->fprintf_func)
817 wide_add_cond_names[GET_FIELD (insn, 16, 18) +
818 GET_FIELD (insn, 4, 4) * 8]);
822 (*info->fprintf_func) (info->stream, "%s ",
823 logical_cond_names[GET_COND (insn)]);
826 (*info->fprintf_func) (info->stream, "%s ",
827 logical_cond_64_names[GET_COND (insn)]);
830 (*info->fprintf_func) (info->stream, "%s ",
831 unit_cond_names[GET_COND (insn)]);
834 (*info->fprintf_func) (info->stream, "%s ",
835 unit_cond_64_names[GET_COND (insn)]);
840 (*info->fprintf_func)
842 shift_cond_names[GET_FIELD (insn, 16, 18)]);
844 /* If the next character in args is 'n', it will handle
845 putting out the space. */
847 (*info->fprintf_func) (info->stream, " ");
850 (*info->fprintf_func) (info->stream, "%s ",
851 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
854 (*info->fprintf_func)
856 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
858 /* If the next character in args is 'n', it will handle
859 putting out the space. */
861 (*info->fprintf_func) (info->stream, " ");
868 fput_const (extract_5_store (insn), info);
871 fput_const (extract_5r_store (insn), info);
874 fput_const (extract_5R_store (insn), info);
877 fput_const (extract_10U_store (insn), info);
881 fput_const (extract_5Q_store (insn), info);
884 fput_const (extract_11 (insn), info);
887 fput_const (extract_14 (insn), info);
890 fput_const (extract_21 (insn), info);
893 /* 16-bit long disp., PA2.0 wide only. */
894 fput_const (extract_16 (insn), info);
898 (*info->fprintf_func) (info->stream, ",n ");
900 (*info->fprintf_func) (info->stream, " ");
903 if ((insn & 0x20) && s[1])
904 (*info->fprintf_func) (info->stream, ",n ");
905 else if (insn & 0x20)
906 (*info->fprintf_func) (info->stream, ",n");
908 (*info->fprintf_func) (info->stream, " ");
911 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
915 /* 17 bit PC-relative branch. */
916 (*info->print_address_func) ((memaddr + 8
917 + extract_17 (insn)),
921 /* 17 bit displacement. This is an offset from a register
922 so it gets disasssembled as just a number, not any sort
924 fput_const (extract_17 (insn), info);
928 /* addil %r1 implicit output. */
929 (*info->fprintf_func) (info->stream, "%%r1");
933 /* be,l %sr0,%r31 implicit output. */
934 (*info->fprintf_func) (info->stream, "%%sr0,%%r31");
938 (*info->fprintf_func) (info->stream, "0");
942 (*info->fprintf_func) (info->stream, "%d",
943 GET_FIELD (insn, 24, 25));
946 (*info->fprintf_func) (info->stream, "%d",
947 GET_FIELD (insn, 22, 25));
950 (*info->fprintf_func) (info->stream, "%%sar");
953 (*info->fprintf_func) (info->stream, "%d",
954 31 - GET_FIELD (insn, 22, 26));
959 num = GET_FIELD (insn, 20, 20) << 5;
960 num |= GET_FIELD (insn, 22, 26);
961 (*info->fprintf_func) (info->stream, "%d", 63 - num);
965 (*info->fprintf_func) (info->stream, "%d",
966 GET_FIELD (insn, 22, 26));
971 num = GET_FIELD (insn, 20, 20) << 5;
972 num |= GET_FIELD (insn, 22, 26);
973 (*info->fprintf_func) (info->stream, "%d", num);
977 (*info->fprintf_func) (info->stream, "%d",
978 32 - GET_FIELD (insn, 27, 31));
983 num = (GET_FIELD (insn, 23, 23) + 1) * 32;
984 num -= GET_FIELD (insn, 27, 31);
985 (*info->fprintf_func) (info->stream, "%d", num);
991 num = (GET_FIELD (insn, 19, 19) + 1) * 32;
992 num -= GET_FIELD (insn, 27, 31);
993 (*info->fprintf_func) (info->stream, "%d", num);
997 fput_const (GET_FIELD (insn, 20, 28), info);
1000 fput_const (GET_FIELD (insn, 6, 18), info);
1003 fput_const (GET_FIELD (insn, 6, 31), info);
1006 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
1009 fput_const ((GET_FIELD (insn, 6,20) << 5 |
1010 GET_FIELD (insn, 27, 31)), info);
1013 fput_const (GET_FIELD (insn, 6, 20), info);
1016 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
1017 GET_FIELD (insn, 27, 31)), info);
1020 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
1021 GET_FIELD (insn, 27, 31)), info);
1024 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
1025 GET_FIELD (insn, 27, 31)), info);
1028 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
1031 /* if no destination completer and not before a completer
1032 for fcmp, need a space here */
1033 if (s[1] == 'G' || s[1] == '?')
1034 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
1037 (*info->fprintf_func) (info->stream, "%s ",
1038 float_format_names[GET_FIELD
1042 (*info->fprintf_func) (info->stream, "%s ",
1043 float_format_names[GET_FIELD (insn,
1047 if (GET_FIELD (insn, 26, 26) == 1)
1048 (*info->fprintf_func) (info->stream, "%s ",
1049 float_format_names[0]);
1051 (*info->fprintf_func) (info->stream, "%s ",
1052 float_format_names[1]);
1055 /* if no destination completer and not before a completer
1056 for fcmp, need a space here */
1058 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
1061 (*info->fprintf_func) (info->stream, "%s ",
1062 float_format_names[GET_FIELD
1067 fput_const (extract_14 (insn), info);
1072 int sign = GET_FIELD (insn, 31, 31);
1073 int imm10 = GET_FIELD (insn, 18, 27);
1077 disp = (-1 << 10) | imm10;
1082 fput_const (disp, info);
1088 int sign = GET_FIELD (insn, 31, 31);
1089 int imm11 = GET_FIELD (insn, 18, 28);
1093 disp = (-1 << 11) | imm11;
1098 fput_const (disp, info);
1104 /* 16-bit long disp., PA2.0 wide only. */
1105 int disp = extract_16 (insn);
1107 fput_const (disp, info);
1113 /* 16-bit long disp., PA2.0 wide only. */
1114 int disp = extract_16 (insn);
1116 fput_const (disp, info);
1123 fputs_filtered ("Disassembler botch.\n", info);
1128 int y = GET_FIELD (insn, 16, 18);
1131 fput_const ((y ^ 1) - 1, info);
1139 cbit = GET_FIELD (insn, 16, 18);
1142 (*info->fprintf_func) (info->stream, ",%d", cbit - 1);
1148 int cond = GET_FIELD (insn, 27, 31);
1151 fputs_filtered (" ", info);
1153 fputs_filtered ("acc ", info);
1155 fputs_filtered ("rej ", info);
1157 fputs_filtered ("acc8 ", info);
1159 fputs_filtered ("rej8 ", info);
1161 fputs_filtered ("acc6 ", info);
1162 else if (cond == 13)
1163 fputs_filtered ("acc4 ", info);
1164 else if (cond == 17)
1165 fputs_filtered ("acc2 ", info);
1170 (*info->print_address_func) ((memaddr + 8
1171 + extract_22 (insn)),
1175 fputs_filtered (",%r2", info);
1178 (*info->fprintf_func) (info->stream, "%c", *s);
1182 return sizeof(insn);
1185 (*info->fprintf_func) (info->stream, "#%8x", insn);
1186 return sizeof(insn);