1 /* Disassemble h8300 instructions.
2 Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
3 2007 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
25 #define h8_opcodes h8ops
26 #include "opcode/h8300.h"
29 #include "libiberty.h"
34 const struct h8_opcode *opcode;
37 struct h8_instruction *h8_instructions;
39 /* Run through the opcodes and sort them into order to make them easy
43 bfd_h8_disassemble_init (void)
46 unsigned int nopcodes;
47 const struct h8_opcode *p;
48 struct h8_instruction *pi;
50 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
52 h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
54 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
59 if ((int) p->data.nib[0] < 16)
60 n1 = (int) p->data.nib[0];
64 if ((int) p->data.nib[1] < 16)
65 n2 = (int) p->data.nib[1];
69 /* Just make sure there are an even number of nibbles in it, and
70 that the count is the same as the length. */
71 for (i = 0; p->data.nib[i] != (op_type) E; i++)
76 fprintf (stderr, "Internal error, h8_disassemble_init.\n");
84 /* Add entry for the NULL vector terminator. */
90 extract_immediate (FILE *stream,
96 const struct h8_opcode *q)
98 switch (looking_for & SIZE)
104 /* DISP2 special treatment. */
105 if ((looking_for & MODE) == DISP)
107 if (OP_KIND (q->how) == O_MOVAB
108 || OP_KIND (q->how) == O_MOVAW
109 || OP_KIND (q->how) == O_MOVAL)
111 /* Handling for mova insn. */
112 switch (q->args.nib[0] & MODE)
127 /* Handling for non-mova insn. */
128 switch (OP_SIZE (q->how))
148 *cst = (data[0] << 8) + data [1];
150 if ((looking_for & SIZE) == L_16)
151 *cst = (short) *cst; /* Sign extend. */
156 *cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
161 fprintf (stream, "DISP bad size\n");
166 static const char *regnames[] =
168 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
169 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
171 static const char *wregnames[] =
173 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
174 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
176 static const char *lregnames[] =
178 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
179 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
181 static const char *cregnames[] =
183 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
187 print_one_arg (disassemble_info *info,
194 const char **pregnames,
197 void * stream = info->stream;
198 fprintf_ftype outfn = info->fprintf_func;
200 if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
201 outfn (stream, "#0x%x", (unsigned) cst);
202 else if ((x & MODE) == IMM)
203 outfn (stream, "#0x%x", (unsigned) cst);
204 else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
205 outfn (stream, "#%d", (unsigned) cst);
206 else if ((x & MODE) == CONST_2)
207 outfn (stream, "#2");
208 else if ((x & MODE) == CONST_4)
209 outfn (stream, "#4");
210 else if ((x & MODE) == CONST_8)
211 outfn (stream, "#8");
212 else if ((x & MODE) == CONST_16)
213 outfn (stream, "#16");
214 else if ((x & MODE) == REG)
219 outfn (stream, "%s", regnames[rn]);
223 outfn (stream, "%s", wregnames[rn]);
227 outfn (stream, "%s", lregnames[rn]);
231 else if ((x & MODE) == LOWREG)
236 /* Always take low half of reg. */
237 outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
241 /* Always take low half of reg. */
242 outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
246 outfn (stream, "%s.l", lregnames[rn]);
250 else if ((x & MODE) == POSTINC)
251 outfn (stream, "@%s+", pregnames[rn]);
253 else if ((x & MODE) == POSTDEC)
254 outfn (stream, "@%s-", pregnames[rn]);
256 else if ((x & MODE) == PREINC)
257 outfn (stream, "@+%s", pregnames[rn]);
259 else if ((x & MODE) == PREDEC)
260 outfn (stream, "@-%s", pregnames[rn]);
262 else if ((x & MODE) == IND)
263 outfn (stream, "@%s", pregnames[rn]);
265 else if ((x & MODE) == ABS || (x & ABSJMP))
266 outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
268 else if ((x & MODE) == MEMIND)
269 outfn (stream, "@@%d (0x%x)", cst, cst);
271 else if ((x & MODE) == VECIND)
273 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
274 by which is meant "normal" vs. "middle", "advanced", "maximum". */
276 int offset = (cst + 0x80) * 4;
277 outfn (stream, "@@%d (0x%x)", offset, offset);
279 else if ((x & MODE) == PCREL)
281 if ((x & SIZE) == L_16 ||
284 outfn (stream, ".%s%d (0x%lx)",
285 (short) cst > 0 ? "+" : "",
287 (long)(addr + (short) cst + len));
291 outfn (stream, ".%s%d (0x%lx)",
292 (char) cst > 0 ? "+" : "",
294 (long)(addr + (char) cst + len));
297 else if ((x & MODE) == DISP)
298 outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
300 else if ((x & MODE) == INDEXB)
301 /* Always take low half of reg. */
302 outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
303 regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
305 else if ((x & MODE) == INDEXW)
306 /* Always take low half of reg. */
307 outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
308 wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
310 else if ((x & MODE) == INDEXL)
311 outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
314 outfn (stream, cregnames[rn]);
316 else if ((x & MODE) == CCR)
317 outfn (stream, "ccr");
319 else if ((x & MODE) == EXR)
320 outfn (stream, "exr");
322 else if ((x & MODE) == MACREG)
323 outfn (stream, "mac%c", cst ? 'l' : 'h');
326 /* xgettext:c-format */
327 outfn (stream, _("Hmmmm 0x%x"), x);
331 bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
333 /* Find the first entry in the table for this opcode. */
334 int regno[3] = { 0, 0, 0 };
335 int dispregno[3] = { 0, 0, 0 };
336 int cst[3] = { 0, 0, 0 };
337 int cstlen[3] = { 0, 0, 0 };
338 static bfd_boolean init = 0;
339 const struct h8_instruction *qi;
340 char const **pregnames = mach != 0 ? lregnames : wregnames;
343 unsigned char data[MAX_CODE_NIBBLES];
344 void *stream = info->stream;
345 fprintf_ftype outfn = info->fprintf_func;
349 bfd_h8_disassemble_init ();
353 status = info->read_memory_func (addr, data, 2, info);
356 info->memory_error_func (status, addr, info);
360 for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
361 status = info->read_memory_func (addr + l, data + l, 2, info);
363 /* Find the exact opcode/arg combo. */
364 for (qi = h8_instructions; qi->opcode->name; qi++)
366 const struct h8_opcode *q = qi->opcode;
367 const op_type *nib = q->data.nib;
368 unsigned int len = 0;
372 op_type looking_for = *nib;
373 int thisnib = data[len / 2];
376 thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
377 opnr = ((looking_for & OP3) == OP3 ? 2
378 : (looking_for & DST) == DST ? 1 : 0);
380 if (looking_for < 16 && looking_for >= 0)
382 if (looking_for != thisnib)
387 if ((int) looking_for & (int) B31)
389 if (!((thisnib & 0x8) != 0))
392 looking_for = (op_type) ((int) looking_for & ~(int) B31);
395 else if ((int) looking_for & (int) B30)
397 if (!((thisnib & 0x8) == 0))
400 looking_for = (op_type) ((int) looking_for & ~(int) B30);
403 if ((int) looking_for & (int) B21)
405 if (!((thisnib & 0x4) != 0))
408 looking_for = (op_type) ((int) looking_for & ~(int) B21);
411 else if ((int) looking_for & (int) B20)
413 if (!((thisnib & 0x4) == 0))
416 looking_for = (op_type) ((int) looking_for & ~(int) B20);
418 if ((int) looking_for & (int) B11)
420 if (!((thisnib & 0x2) != 0))
423 looking_for = (op_type) ((int) looking_for & ~(int) B11);
426 else if ((int) looking_for & (int) B10)
428 if (!((thisnib & 0x2) == 0))
431 looking_for = (op_type) ((int) looking_for & ~(int) B10);
434 if ((int) looking_for & (int) B01)
436 if (!((thisnib & 0x1) != 0))
439 looking_for = (op_type) ((int) looking_for & ~(int) B01);
442 else if ((int) looking_for & (int) B00)
444 if (!((thisnib & 0x1) == 0))
447 looking_for = (op_type) ((int) looking_for & ~(int) B00);
450 if (looking_for & IGNORE)
452 /* Hitachi has declared that IGNORE must be zero. */
456 else if ((looking_for & MODE) == DATA)
458 ; /* Skip embedded data. */
460 else if ((looking_for & MODE) == DBIT)
462 /* Exclude adds/subs by looking at bit 0 and 2, and
463 make sure the operand size, either w or l,
464 matches by looking at bit 1. */
465 if ((looking_for & 7) != (thisnib & 7))
468 cst[opnr] = (thisnib & 0x8) ? 2 : 1;
470 else if ((looking_for & MODE) == DISP
471 || (looking_for & MODE) == ABS
472 || (looking_for & MODE) == PCREL
473 || (looking_for & MODE) == INDEXB
474 || (looking_for & MODE) == INDEXW
475 || (looking_for & MODE) == INDEXL)
477 extract_immediate (stream, looking_for, thisnib,
478 data + len / 2, cst + opnr,
480 /* Even address == bra, odd == bra/s. */
481 if (q->how == O (O_BRAS, SB))
484 else if ((looking_for & MODE) == REG
485 || (looking_for & MODE) == LOWREG
486 || (looking_for & MODE) == IND
487 || (looking_for & MODE) == PREINC
488 || (looking_for & MODE) == POSTINC
489 || (looking_for & MODE) == PREDEC
490 || (looking_for & MODE) == POSTDEC)
492 regno[opnr] = thisnib;
494 else if (looking_for & CTRL) /* Control Register. */
497 if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
498 || ((looking_for & MODE) == EXR && (thisnib != C_EXR))
499 || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
500 || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
501 || ((looking_for & MODE) == VBR && (thisnib != C_VBR))
502 || ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
504 if (((looking_for & MODE) == CCR_EXR
505 && (thisnib != C_CCR && thisnib != C_EXR))
506 || ((looking_for & MODE) == VBR_SBR
507 && (thisnib != C_VBR && thisnib != C_SBR))
508 || ((looking_for & MODE) == MACREG
509 && (thisnib != C_MACH && thisnib != C_MACL)))
511 if (((looking_for & MODE) == CC_EX_VB_SB
512 && (thisnib != C_CCR && thisnib != C_EXR
513 && thisnib != C_VBR && thisnib != C_SBR)))
516 regno[opnr] = thisnib;
518 else if ((looking_for & SIZE) == L_5)
520 cst[opnr] = data[len / 2] & 31;
523 else if ((looking_for & SIZE) == L_4)
528 else if ((looking_for & SIZE) == L_16
529 || (looking_for & SIZE) == L_16U)
531 cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
534 else if ((looking_for & MODE) == MEMIND)
538 else if ((looking_for & MODE) == VECIND)
540 cst[opnr] = data[1] & 0x7f;
542 else if ((looking_for & SIZE) == L_32)
546 cst[opnr] = ((data[i] << 24)
547 | (data[i + 1] << 16)
553 else if ((looking_for & SIZE) == L_24)
558 (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
561 else if (looking_for & IGNORE)
565 else if (looking_for & DISPREG)
567 dispregno[opnr] = thisnib & 7;
569 else if ((looking_for & MODE) == KBIT)
586 else if ((looking_for & SIZE) == L_8)
589 cst[opnr] = data[len / 2];
591 else if ((looking_for & SIZE) == L_3
592 || (looking_for & SIZE) == L_3NZ)
594 cst[opnr] = thisnib & 0x7;
595 if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
598 else if ((looking_for & SIZE) == L_2)
601 cst[opnr] = thisnib & 0x3;
603 else if ((looking_for & MODE) == MACREG)
605 cst[opnr] = (thisnib == 3);
607 else if (looking_for == (op_type) E)
609 outfn (stream, "%s\t", q->name);
611 /* Gross. Disgusting. */
612 if (strcmp (q->name, "ldm.l") == 0)
616 count = (data[1] / 16) & 0x3;
619 outfn (stream, "@sp+,er%d-er%d", high - count, high);
623 if (strcmp (q->name, "stm.l") == 0)
627 count = (data[1] / 16) & 0x3;
630 outfn (stream, "er%d-er%d,@-sp", low, low + count);
633 if (strcmp (q->name, "rte/l") == 0
634 || strcmp (q->name, "rts/l") == 0)
637 outfn (stream, "er%d", regno[1]);
639 outfn (stream, "er%d-er%d", regno[1] - regno[0],
643 if (CONST_STRNEQ (q->name, "mova"))
645 const op_type *args = q->args.nib;
647 if (args[1] == (op_type) E)
650 print_one_arg (info, addr, args[0], cst[0],
651 cstlen[0], dispregno[0], regno[0],
652 pregnames, qi->length);
653 outfn (stream, ",er%d", dispregno[0]);
657 outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
658 print_one_arg (info, addr, args[1], cst[1],
659 cstlen[1], dispregno[1], regno[1],
660 pregnames, qi->length);
661 outfn (stream, ".%c),",
662 (args[0] & MODE) == INDEXB ? 'b' : 'w');
663 print_one_arg (info, addr, args[2], cst[2],
664 cstlen[2], dispregno[2], regno[2],
665 pregnames, qi->length);
669 /* Fill in the args. */
671 const op_type *args = q->args.nib;
675 /* Special case handling for the adds and subs instructions
676 since in H8 mode thay can only take the r0-r7 registers
677 but in other (higher) modes they can take the er0-er7
678 registers as well. */
679 if (strcmp (qi->opcode->name, "adds") == 0
680 || strcmp (qi->opcode->name, "subs") == 0)
682 outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
687 nargs < 3 && args[nargs] != (op_type) E;
695 print_one_arg (info, addr, x,
696 cst[nargs], cstlen[nargs],
697 dispregno[nargs], regno[nargs],
698 pregnames, qi->length);
707 /* xgettext:c-format */
708 outfn (stream, _("Don't understand 0x%x \n"), looking_for);
719 /* Fell off the end. */
720 outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
725 print_insn_h8300 (bfd_vma addr, disassemble_info *info)
727 return bfd_h8_disassemble (addr, info, 0);
731 print_insn_h8300h (bfd_vma addr, disassemble_info *info)
733 return bfd_h8_disassemble (addr, info, 1);
737 print_insn_h8300s (bfd_vma addr, disassemble_info *info)
739 return bfd_h8_disassemble (addr, info, 2);