1 /* Disassemble h8300 instructions.
2 Copyright (C) 1993-2016 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #define h8_opcodes h8ops
25 #include "opcode/h8300.h"
28 #include "libiberty.h"
33 const struct h8_opcode *opcode;
36 struct h8_instruction *h8_instructions;
38 /* Run through the opcodes and sort them into order to make them easy
42 bfd_h8_disassemble_init (void)
45 unsigned int nopcodes;
46 const struct h8_opcode *p;
47 struct h8_instruction *pi;
49 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
51 h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
53 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
55 /* Just make sure there are an even number of nibbles in it, and
56 that the count is the same as the length. */
57 for (i = 0; p->data.nib[i] != (op_type) E; i++)
62 fprintf (stderr, "Internal error, h8_disassemble_init.\n");
70 /* Add entry for the NULL vector terminator. */
76 extract_immediate (FILE *stream,
82 const struct h8_opcode *q)
84 switch (looking_for & SIZE)
90 /* DISP2 special treatment. */
91 if ((looking_for & MODE) == DISP)
93 if (OP_KIND (q->how) == O_MOVAB
94 || OP_KIND (q->how) == O_MOVAW
95 || OP_KIND (q->how) == O_MOVAL)
97 /* Handling for mova insn. */
98 switch (q->args.nib[0] & MODE)
113 /* Handling for non-mova insn. */
114 switch (OP_SIZE (q->how))
134 *cst = (data[0] << 8) + data [1];
136 if ((looking_for & SIZE) == L_16)
137 *cst = (short) *cst; /* Sign extend. */
142 *cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
147 fprintf (stream, "DISP bad size\n");
152 static const char *regnames[] =
154 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
155 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
157 static const char *wregnames[] =
159 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
160 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
162 static const char *lregnames[] =
164 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
165 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
167 static const char *cregnames[] =
169 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
173 print_one_arg (disassemble_info *info,
180 const char **pregnames,
183 void * stream = info->stream;
184 fprintf_ftype outfn = info->fprintf_func;
186 if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
187 outfn (stream, "#0x%x", (unsigned) cst);
188 else if ((x & MODE) == IMM)
189 outfn (stream, "#0x%x", (unsigned) cst);
190 else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
191 outfn (stream, "#%d", (unsigned) cst);
192 else if ((x & MODE) == CONST_2)
193 outfn (stream, "#2");
194 else if ((x & MODE) == CONST_4)
195 outfn (stream, "#4");
196 else if ((x & MODE) == CONST_8)
197 outfn (stream, "#8");
198 else if ((x & MODE) == CONST_16)
199 outfn (stream, "#16");
200 else if ((x & MODE) == REG)
205 outfn (stream, "%s", regnames[rn]);
209 outfn (stream, "%s", wregnames[rn]);
213 outfn (stream, "%s", lregnames[rn]);
217 else if ((x & MODE) == LOWREG)
222 /* Always take low half of reg. */
223 outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
227 /* Always take low half of reg. */
228 outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
232 outfn (stream, "%s.l", lregnames[rn]);
236 else if ((x & MODE) == POSTINC)
237 outfn (stream, "@%s+", pregnames[rn]);
239 else if ((x & MODE) == POSTDEC)
240 outfn (stream, "@%s-", pregnames[rn]);
242 else if ((x & MODE) == PREINC)
243 outfn (stream, "@+%s", pregnames[rn]);
245 else if ((x & MODE) == PREDEC)
246 outfn (stream, "@-%s", pregnames[rn]);
248 else if ((x & MODE) == IND)
249 outfn (stream, "@%s", pregnames[rn]);
251 else if ((x & MODE) == ABS || (x & ABSJMP))
252 outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
254 else if ((x & MODE) == MEMIND)
255 outfn (stream, "@@%d (0x%x)", cst, cst);
257 else if ((x & MODE) == VECIND)
259 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
260 by which is meant "normal" vs. "middle", "advanced", "maximum". */
262 int offset = (cst + 0x80) * 4;
263 outfn (stream, "@@%d (0x%x)", offset, offset);
265 else if ((x & MODE) == PCREL)
267 if ((x & SIZE) == L_16 ||
270 outfn (stream, ".%s%d (0x%lx)",
271 (short) cst > 0 ? "+" : "",
273 (long)(addr + (short) cst + len));
277 outfn (stream, ".%s%d (0x%lx)",
278 (char) cst > 0 ? "+" : "",
280 (long)(addr + (char) cst + len));
283 else if ((x & MODE) == DISP)
284 outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
286 else if ((x & MODE) == INDEXB)
287 /* Always take low half of reg. */
288 outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
289 regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
291 else if ((x & MODE) == INDEXW)
292 /* Always take low half of reg. */
293 outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
294 wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
296 else if ((x & MODE) == INDEXL)
297 outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
300 outfn (stream, "%s", cregnames[rn]);
302 else if ((x & MODE) == CCR)
303 outfn (stream, "ccr");
305 else if ((x & MODE) == EXR)
306 outfn (stream, "exr");
308 else if ((x & MODE) == MACREG)
309 outfn (stream, "mac%c", cst ? 'l' : 'h');
312 /* xgettext:c-format */
313 outfn (stream, _("Hmmmm 0x%x"), x);
317 bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
319 /* Find the first entry in the table for this opcode. */
320 int regno[3] = { 0, 0, 0 };
321 int dispregno[3] = { 0, 0, 0 };
322 int cst[3] = { 0, 0, 0 };
323 int cstlen[3] = { 0, 0, 0 };
324 static bfd_boolean init = 0;
325 const struct h8_instruction *qi;
326 char const **pregnames = mach != 0 ? lregnames : wregnames;
329 unsigned char data[MAX_CODE_NIBBLES];
330 void *stream = info->stream;
331 fprintf_ftype outfn = info->fprintf_func;
335 bfd_h8_disassemble_init ();
339 status = info->read_memory_func (addr, data, 2, info);
342 info->memory_error_func (status, addr, info);
346 for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
347 status = info->read_memory_func (addr + l, data + l, 2, info);
349 /* Find the exact opcode/arg combo. */
350 for (qi = h8_instructions; qi->opcode->name; qi++)
352 const struct h8_opcode *q = qi->opcode;
353 const op_type *nib = q->data.nib;
354 unsigned int len = 0;
358 op_type looking_for = *nib;
359 int thisnib = data[len / 2];
362 thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
363 opnr = ((looking_for & OP3) == OP3 ? 2
364 : (looking_for & DST) == DST ? 1 : 0);
366 if (looking_for < 16 && looking_for >= 0)
368 if (looking_for != thisnib)
373 if ((int) looking_for & (int) B31)
375 if (!((thisnib & 0x8) != 0))
378 looking_for = (op_type) ((int) looking_for & ~(int) B31);
381 else if ((int) looking_for & (int) B30)
383 if (!((thisnib & 0x8) == 0))
386 looking_for = (op_type) ((int) looking_for & ~(int) B30);
389 if ((int) looking_for & (int) B21)
391 if (!((thisnib & 0x4) != 0))
394 looking_for = (op_type) ((int) looking_for & ~(int) B21);
397 else if ((int) looking_for & (int) B20)
399 if (!((thisnib & 0x4) == 0))
402 looking_for = (op_type) ((int) looking_for & ~(int) B20);
404 if ((int) looking_for & (int) B11)
406 if (!((thisnib & 0x2) != 0))
409 looking_for = (op_type) ((int) looking_for & ~(int) B11);
412 else if ((int) looking_for & (int) B10)
414 if (!((thisnib & 0x2) == 0))
417 looking_for = (op_type) ((int) looking_for & ~(int) B10);
420 if ((int) looking_for & (int) B01)
422 if (!((thisnib & 0x1) != 0))
425 looking_for = (op_type) ((int) looking_for & ~(int) B01);
428 else if ((int) looking_for & (int) B00)
430 if (!((thisnib & 0x1) == 0))
433 looking_for = (op_type) ((int) looking_for & ~(int) B00);
436 if (looking_for & IGNORE)
438 /* Hitachi has declared that IGNORE must be zero. */
442 else if ((looking_for & MODE) == DATA)
444 ; /* Skip embedded data. */
446 else if ((looking_for & MODE) == DBIT)
448 /* Exclude adds/subs by looking at bit 0 and 2, and
449 make sure the operand size, either w or l,
450 matches by looking at bit 1. */
451 if ((looking_for & 7) != (thisnib & 7))
454 cst[opnr] = (thisnib & 0x8) ? 2 : 1;
456 else if ((looking_for & MODE) == DISP
457 || (looking_for & MODE) == ABS
458 || (looking_for & MODE) == PCREL
459 || (looking_for & MODE) == INDEXB
460 || (looking_for & MODE) == INDEXW
461 || (looking_for & MODE) == INDEXL)
463 extract_immediate (stream, looking_for, thisnib,
464 data + len / 2, cst + opnr,
466 /* Even address == bra, odd == bra/s. */
467 if (q->how == O (O_BRAS, SB))
470 else if ((looking_for & MODE) == REG
471 || (looking_for & MODE) == LOWREG
472 || (looking_for & MODE) == IND
473 || (looking_for & MODE) == PREINC
474 || (looking_for & MODE) == POSTINC
475 || (looking_for & MODE) == PREDEC
476 || (looking_for & MODE) == POSTDEC)
478 regno[opnr] = thisnib;
480 else if (looking_for & CTRL) /* Control Register. */
483 if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
484 || ((looking_for & MODE) == EXR && (thisnib != C_EXR))
485 || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
486 || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
487 || ((looking_for & MODE) == VBR && (thisnib != C_VBR))
488 || ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
490 if (((looking_for & MODE) == CCR_EXR
491 && (thisnib != C_CCR && thisnib != C_EXR))
492 || ((looking_for & MODE) == VBR_SBR
493 && (thisnib != C_VBR && thisnib != C_SBR))
494 || ((looking_for & MODE) == MACREG
495 && (thisnib != C_MACH && thisnib != C_MACL)))
497 if (((looking_for & MODE) == CC_EX_VB_SB
498 && (thisnib != C_CCR && thisnib != C_EXR
499 && thisnib != C_VBR && thisnib != C_SBR)))
502 regno[opnr] = thisnib;
504 else if ((looking_for & SIZE) == L_5)
506 cst[opnr] = data[len / 2] & 31;
509 else if ((looking_for & SIZE) == L_4)
514 else if ((looking_for & SIZE) == L_16
515 || (looking_for & SIZE) == L_16U)
517 cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
520 else if ((looking_for & MODE) == MEMIND)
524 else if ((looking_for & MODE) == VECIND)
526 cst[opnr] = data[1] & 0x7f;
528 else if ((looking_for & SIZE) == L_32)
532 cst[opnr] = ((data[i] << 24)
533 | (data[i + 1] << 16)
539 else if ((looking_for & SIZE) == L_24)
544 (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
547 else if (looking_for & DISPREG)
549 dispregno[opnr] = thisnib & 7;
551 else if ((looking_for & MODE) == KBIT)
568 else if ((looking_for & SIZE) == L_8)
571 cst[opnr] = data[len / 2];
573 else if ((looking_for & SIZE) == L_3
574 || (looking_for & SIZE) == L_3NZ)
576 cst[opnr] = thisnib & 0x7;
577 if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
580 else if ((looking_for & SIZE) == L_2)
583 cst[opnr] = thisnib & 0x3;
585 else if ((looking_for & MODE) == MACREG)
587 cst[opnr] = (thisnib == 3);
589 else if (looking_for == (op_type) E)
591 outfn (stream, "%s\t", q->name);
593 /* Gross. Disgusting. */
594 if (strcmp (q->name, "ldm.l") == 0)
598 count = (data[1] / 16) & 0x3;
601 outfn (stream, "@sp+,er%d-er%d", high - count, high);
605 if (strcmp (q->name, "stm.l") == 0)
609 count = (data[1] / 16) & 0x3;
612 outfn (stream, "er%d-er%d,@-sp", low, low + count);
615 if (strcmp (q->name, "rte/l") == 0
616 || strcmp (q->name, "rts/l") == 0)
619 outfn (stream, "er%d", regno[1]);
621 outfn (stream, "er%d-er%d", regno[1] - regno[0],
625 if (CONST_STRNEQ (q->name, "mova"))
627 const op_type *args = q->args.nib;
629 if (args[1] == (op_type) E)
632 print_one_arg (info, addr, args[0], cst[0],
633 cstlen[0], dispregno[0], regno[0],
634 pregnames, qi->length);
635 outfn (stream, ",er%d", dispregno[0]);
639 outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
640 print_one_arg (info, addr, args[1], cst[1],
641 cstlen[1], dispregno[1], regno[1],
642 pregnames, qi->length);
643 outfn (stream, ".%c),",
644 (args[0] & MODE) == INDEXB ? 'b' : 'w');
645 print_one_arg (info, addr, args[2], cst[2],
646 cstlen[2], dispregno[2], regno[2],
647 pregnames, qi->length);
651 /* Fill in the args. */
653 const op_type *args = q->args.nib;
657 /* Special case handling for the adds and subs instructions
658 since in H8 mode thay can only take the r0-r7 registers
659 but in other (higher) modes they can take the er0-er7
660 registers as well. */
661 if (strcmp (qi->opcode->name, "adds") == 0
662 || strcmp (qi->opcode->name, "subs") == 0)
664 outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
669 nargs < 3 && args[nargs] != (op_type) E;
677 print_one_arg (info, addr, x,
678 cst[nargs], cstlen[nargs],
679 dispregno[nargs], regno[nargs],
680 pregnames, qi->length);
689 /* xgettext:c-format */
690 outfn (stream, _("Don't understand 0x%x \n"), looking_for);
701 /* Fell off the end. */
702 outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
707 print_insn_h8300 (bfd_vma addr, disassemble_info *info)
709 return bfd_h8_disassemble (addr, info, 0);
713 print_insn_h8300h (bfd_vma addr, disassemble_info *info)
715 return bfd_h8_disassemble (addr, info, 1);
719 print_insn_h8300s (bfd_vma addr, disassemble_info *info)
721 return bfd_h8_disassemble (addr, info, 2);