1 /* Disassemble h8300 instructions.
2 Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
3 2007, 2010 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
25 #define h8_opcodes h8ops
26 #include "opcode/h8300.h"
29 #include "libiberty.h"
34 const struct h8_opcode *opcode;
37 struct h8_instruction *h8_instructions;
39 /* Run through the opcodes and sort them into order to make them easy
43 bfd_h8_disassemble_init (void)
46 unsigned int nopcodes;
47 const struct h8_opcode *p;
48 struct h8_instruction *pi;
50 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
52 h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
54 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
56 /* Just make sure there are an even number of nibbles in it, and
57 that the count is the same as the length. */
58 for (i = 0; p->data.nib[i] != (op_type) E; i++)
63 fprintf (stderr, "Internal error, h8_disassemble_init.\n");
71 /* Add entry for the NULL vector terminator. */
77 extract_immediate (FILE *stream,
83 const struct h8_opcode *q)
85 switch (looking_for & SIZE)
91 /* DISP2 special treatment. */
92 if ((looking_for & MODE) == DISP)
94 if (OP_KIND (q->how) == O_MOVAB
95 || OP_KIND (q->how) == O_MOVAW
96 || OP_KIND (q->how) == O_MOVAL)
98 /* Handling for mova insn. */
99 switch (q->args.nib[0] & MODE)
114 /* Handling for non-mova insn. */
115 switch (OP_SIZE (q->how))
135 *cst = (data[0] << 8) + data [1];
137 if ((looking_for & SIZE) == L_16)
138 *cst = (short) *cst; /* Sign extend. */
143 *cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
148 fprintf (stream, "DISP bad size\n");
153 static const char *regnames[] =
155 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
156 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
158 static const char *wregnames[] =
160 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
161 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
163 static const char *lregnames[] =
165 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
166 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
168 static const char *cregnames[] =
170 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
174 print_one_arg (disassemble_info *info,
181 const char **pregnames,
184 void * stream = info->stream;
185 fprintf_ftype outfn = info->fprintf_func;
187 if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
188 outfn (stream, "#0x%x", (unsigned) cst);
189 else if ((x & MODE) == IMM)
190 outfn (stream, "#0x%x", (unsigned) cst);
191 else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
192 outfn (stream, "#%d", (unsigned) cst);
193 else if ((x & MODE) == CONST_2)
194 outfn (stream, "#2");
195 else if ((x & MODE) == CONST_4)
196 outfn (stream, "#4");
197 else if ((x & MODE) == CONST_8)
198 outfn (stream, "#8");
199 else if ((x & MODE) == CONST_16)
200 outfn (stream, "#16");
201 else if ((x & MODE) == REG)
206 outfn (stream, "%s", regnames[rn]);
210 outfn (stream, "%s", wregnames[rn]);
214 outfn (stream, "%s", lregnames[rn]);
218 else if ((x & MODE) == LOWREG)
223 /* Always take low half of reg. */
224 outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
228 /* Always take low half of reg. */
229 outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
233 outfn (stream, "%s.l", lregnames[rn]);
237 else if ((x & MODE) == POSTINC)
238 outfn (stream, "@%s+", pregnames[rn]);
240 else if ((x & MODE) == POSTDEC)
241 outfn (stream, "@%s-", pregnames[rn]);
243 else if ((x & MODE) == PREINC)
244 outfn (stream, "@+%s", pregnames[rn]);
246 else if ((x & MODE) == PREDEC)
247 outfn (stream, "@-%s", pregnames[rn]);
249 else if ((x & MODE) == IND)
250 outfn (stream, "@%s", pregnames[rn]);
252 else if ((x & MODE) == ABS || (x & ABSJMP))
253 outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
255 else if ((x & MODE) == MEMIND)
256 outfn (stream, "@@%d (0x%x)", cst, cst);
258 else if ((x & MODE) == VECIND)
260 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
261 by which is meant "normal" vs. "middle", "advanced", "maximum". */
263 int offset = (cst + 0x80) * 4;
264 outfn (stream, "@@%d (0x%x)", offset, offset);
266 else if ((x & MODE) == PCREL)
268 if ((x & SIZE) == L_16 ||
271 outfn (stream, ".%s%d (0x%lx)",
272 (short) cst > 0 ? "+" : "",
274 (long)(addr + (short) cst + len));
278 outfn (stream, ".%s%d (0x%lx)",
279 (char) cst > 0 ? "+" : "",
281 (long)(addr + (char) cst + len));
284 else if ((x & MODE) == DISP)
285 outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
287 else if ((x & MODE) == INDEXB)
288 /* Always take low half of reg. */
289 outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
290 regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
292 else if ((x & MODE) == INDEXW)
293 /* Always take low half of reg. */
294 outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
295 wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
297 else if ((x & MODE) == INDEXL)
298 outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
301 outfn (stream, "%s", cregnames[rn]);
303 else if ((x & MODE) == CCR)
304 outfn (stream, "ccr");
306 else if ((x & MODE) == EXR)
307 outfn (stream, "exr");
309 else if ((x & MODE) == MACREG)
310 outfn (stream, "mac%c", cst ? 'l' : 'h');
313 /* xgettext:c-format */
314 outfn (stream, _("Hmmmm 0x%x"), x);
318 bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
320 /* Find the first entry in the table for this opcode. */
321 int regno[3] = { 0, 0, 0 };
322 int dispregno[3] = { 0, 0, 0 };
323 int cst[3] = { 0, 0, 0 };
324 int cstlen[3] = { 0, 0, 0 };
325 static bfd_boolean init = 0;
326 const struct h8_instruction *qi;
327 char const **pregnames = mach != 0 ? lregnames : wregnames;
330 unsigned char data[MAX_CODE_NIBBLES];
331 void *stream = info->stream;
332 fprintf_ftype outfn = info->fprintf_func;
336 bfd_h8_disassemble_init ();
340 status = info->read_memory_func (addr, data, 2, info);
343 info->memory_error_func (status, addr, info);
347 for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
348 status = info->read_memory_func (addr + l, data + l, 2, info);
350 /* Find the exact opcode/arg combo. */
351 for (qi = h8_instructions; qi->opcode->name; qi++)
353 const struct h8_opcode *q = qi->opcode;
354 const op_type *nib = q->data.nib;
355 unsigned int len = 0;
359 op_type looking_for = *nib;
360 int thisnib = data[len / 2];
363 thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
364 opnr = ((looking_for & OP3) == OP3 ? 2
365 : (looking_for & DST) == DST ? 1 : 0);
367 if (looking_for < 16 && looking_for >= 0)
369 if (looking_for != thisnib)
374 if ((int) looking_for & (int) B31)
376 if (!((thisnib & 0x8) != 0))
379 looking_for = (op_type) ((int) looking_for & ~(int) B31);
382 else if ((int) looking_for & (int) B30)
384 if (!((thisnib & 0x8) == 0))
387 looking_for = (op_type) ((int) looking_for & ~(int) B30);
390 if ((int) looking_for & (int) B21)
392 if (!((thisnib & 0x4) != 0))
395 looking_for = (op_type) ((int) looking_for & ~(int) B21);
398 else if ((int) looking_for & (int) B20)
400 if (!((thisnib & 0x4) == 0))
403 looking_for = (op_type) ((int) looking_for & ~(int) B20);
405 if ((int) looking_for & (int) B11)
407 if (!((thisnib & 0x2) != 0))
410 looking_for = (op_type) ((int) looking_for & ~(int) B11);
413 else if ((int) looking_for & (int) B10)
415 if (!((thisnib & 0x2) == 0))
418 looking_for = (op_type) ((int) looking_for & ~(int) B10);
421 if ((int) looking_for & (int) B01)
423 if (!((thisnib & 0x1) != 0))
426 looking_for = (op_type) ((int) looking_for & ~(int) B01);
429 else if ((int) looking_for & (int) B00)
431 if (!((thisnib & 0x1) == 0))
434 looking_for = (op_type) ((int) looking_for & ~(int) B00);
437 if (looking_for & IGNORE)
439 /* Hitachi has declared that IGNORE must be zero. */
443 else if ((looking_for & MODE) == DATA)
445 ; /* Skip embedded data. */
447 else if ((looking_for & MODE) == DBIT)
449 /* Exclude adds/subs by looking at bit 0 and 2, and
450 make sure the operand size, either w or l,
451 matches by looking at bit 1. */
452 if ((looking_for & 7) != (thisnib & 7))
455 cst[opnr] = (thisnib & 0x8) ? 2 : 1;
457 else if ((looking_for & MODE) == DISP
458 || (looking_for & MODE) == ABS
459 || (looking_for & MODE) == PCREL
460 || (looking_for & MODE) == INDEXB
461 || (looking_for & MODE) == INDEXW
462 || (looking_for & MODE) == INDEXL)
464 extract_immediate (stream, looking_for, thisnib,
465 data + len / 2, cst + opnr,
467 /* Even address == bra, odd == bra/s. */
468 if (q->how == O (O_BRAS, SB))
471 else if ((looking_for & MODE) == REG
472 || (looking_for & MODE) == LOWREG
473 || (looking_for & MODE) == IND
474 || (looking_for & MODE) == PREINC
475 || (looking_for & MODE) == POSTINC
476 || (looking_for & MODE) == PREDEC
477 || (looking_for & MODE) == POSTDEC)
479 regno[opnr] = thisnib;
481 else if (looking_for & CTRL) /* Control Register. */
484 if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
485 || ((looking_for & MODE) == EXR && (thisnib != C_EXR))
486 || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
487 || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
488 || ((looking_for & MODE) == VBR && (thisnib != C_VBR))
489 || ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
491 if (((looking_for & MODE) == CCR_EXR
492 && (thisnib != C_CCR && thisnib != C_EXR))
493 || ((looking_for & MODE) == VBR_SBR
494 && (thisnib != C_VBR && thisnib != C_SBR))
495 || ((looking_for & MODE) == MACREG
496 && (thisnib != C_MACH && thisnib != C_MACL)))
498 if (((looking_for & MODE) == CC_EX_VB_SB
499 && (thisnib != C_CCR && thisnib != C_EXR
500 && thisnib != C_VBR && thisnib != C_SBR)))
503 regno[opnr] = thisnib;
505 else if ((looking_for & SIZE) == L_5)
507 cst[opnr] = data[len / 2] & 31;
510 else if ((looking_for & SIZE) == L_4)
515 else if ((looking_for & SIZE) == L_16
516 || (looking_for & SIZE) == L_16U)
518 cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
521 else if ((looking_for & MODE) == MEMIND)
525 else if ((looking_for & MODE) == VECIND)
527 cst[opnr] = data[1] & 0x7f;
529 else if ((looking_for & SIZE) == L_32)
533 cst[opnr] = ((data[i] << 24)
534 | (data[i + 1] << 16)
540 else if ((looking_for & SIZE) == L_24)
545 (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
548 else if (looking_for & IGNORE)
552 else if (looking_for & DISPREG)
554 dispregno[opnr] = thisnib & 7;
556 else if ((looking_for & MODE) == KBIT)
573 else if ((looking_for & SIZE) == L_8)
576 cst[opnr] = data[len / 2];
578 else if ((looking_for & SIZE) == L_3
579 || (looking_for & SIZE) == L_3NZ)
581 cst[opnr] = thisnib & 0x7;
582 if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
585 else if ((looking_for & SIZE) == L_2)
588 cst[opnr] = thisnib & 0x3;
590 else if ((looking_for & MODE) == MACREG)
592 cst[opnr] = (thisnib == 3);
594 else if (looking_for == (op_type) E)
596 outfn (stream, "%s\t", q->name);
598 /* Gross. Disgusting. */
599 if (strcmp (q->name, "ldm.l") == 0)
603 count = (data[1] / 16) & 0x3;
606 outfn (stream, "@sp+,er%d-er%d", high - count, high);
610 if (strcmp (q->name, "stm.l") == 0)
614 count = (data[1] / 16) & 0x3;
617 outfn (stream, "er%d-er%d,@-sp", low, low + count);
620 if (strcmp (q->name, "rte/l") == 0
621 || strcmp (q->name, "rts/l") == 0)
624 outfn (stream, "er%d", regno[1]);
626 outfn (stream, "er%d-er%d", regno[1] - regno[0],
630 if (CONST_STRNEQ (q->name, "mova"))
632 const op_type *args = q->args.nib;
634 if (args[1] == (op_type) E)
637 print_one_arg (info, addr, args[0], cst[0],
638 cstlen[0], dispregno[0], regno[0],
639 pregnames, qi->length);
640 outfn (stream, ",er%d", dispregno[0]);
644 outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
645 print_one_arg (info, addr, args[1], cst[1],
646 cstlen[1], dispregno[1], regno[1],
647 pregnames, qi->length);
648 outfn (stream, ".%c),",
649 (args[0] & MODE) == INDEXB ? 'b' : 'w');
650 print_one_arg (info, addr, args[2], cst[2],
651 cstlen[2], dispregno[2], regno[2],
652 pregnames, qi->length);
656 /* Fill in the args. */
658 const op_type *args = q->args.nib;
662 /* Special case handling for the adds and subs instructions
663 since in H8 mode thay can only take the r0-r7 registers
664 but in other (higher) modes they can take the er0-er7
665 registers as well. */
666 if (strcmp (qi->opcode->name, "adds") == 0
667 || strcmp (qi->opcode->name, "subs") == 0)
669 outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
674 nargs < 3 && args[nargs] != (op_type) E;
682 print_one_arg (info, addr, x,
683 cst[nargs], cstlen[nargs],
684 dispregno[nargs], regno[nargs],
685 pregnames, qi->length);
694 /* xgettext:c-format */
695 outfn (stream, _("Don't understand 0x%x \n"), looking_for);
706 /* Fell off the end. */
707 outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
712 print_insn_h8300 (bfd_vma addr, disassemble_info *info)
714 return bfd_h8_disassemble (addr, info, 0);
718 print_insn_h8300h (bfd_vma addr, disassemble_info *info)
720 return bfd_h8_disassemble (addr, info, 1);
724 print_insn_h8300s (bfd_vma addr, disassemble_info *info)
726 return bfd_h8_disassemble (addr, info, 2);