1 /* Disassemble D30V instructions.
2 Copyright 1997, 1998, 2000 Free Software Foundation, Inc.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20 #include "opcode/d30v.h"
24 #define PC_MASK 0xFFFFFFFF
26 static int lookup_opcode PARAMS (( struct d30v_insn *insn, long num, int is_long ));
27 static void print_insn PARAMS (( struct disassemble_info *info, bfd_vma memaddr, long long num,
28 struct d30v_insn *insn, int is_long, int show_ext ));
29 static int extract_value PARAMS (( long long num, struct d30v_operand *oper, int is_long ));
32 print_insn_d30v (memaddr, info)
34 struct disassemble_info *info;
38 unsigned long in1,in2;
39 struct d30v_insn insn;
42 insn.form = (struct d30v_format *)NULL;
44 info->bytes_per_line = 8;
45 info->bytes_per_chunk = 4;
46 info->display_endian = BFD_ENDIAN_BIG;
48 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
51 (*info->memory_error_func) (status, memaddr, info);
54 in1 = bfd_getb32 (buffer);
56 status = (*info->read_memory_func) (memaddr+4, buffer, 4, info);
59 info->bytes_per_line = 8;
60 if (!(result = lookup_opcode(&insn, in1, 0)))
61 (*info->fprintf_func) (info->stream, ".long\t0x%x",in1);
63 print_insn(info, memaddr, (long long) in1, &insn, 0, result);
66 in2 = bfd_getb32 (buffer);
70 /* LONG instruction */
71 if (!(result = lookup_opcode(&insn, in1, 1)))
73 (*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x",in1,in2);
76 num = (long long)in1 << 32 | in2;
77 print_insn(info, memaddr, num, &insn, 1, result);
82 if (!(result = lookup_opcode(&insn, in1, 0)))
83 (*info->fprintf_func) (info->stream, ".long\t0x%x",in1);
85 print_insn(info, memaddr, num, &insn, 0, result);
87 switch ( ((in1>>31)<<1) | (in2>>31) )
90 (*info->fprintf_func) (info->stream, "\t||\t");
93 (*info->fprintf_func) (info->stream, "\t->\t");
96 (*info->fprintf_func) (info->stream, "\t<-\t");
101 insn.form = (struct d30v_format *)NULL;
103 if (!(result = lookup_opcode(&insn, in2, 0)))
104 (*info->fprintf_func) (info->stream, ".long\t0x%x",in2);
106 print_insn(info, memaddr, num, &insn, 0, result);
113 /* returns 0 if lookup fails */
114 /* 1 if found and only one form */
115 /* 2 if found and there are short and long forms */
117 lookup_opcode (insn, num, is_long)
118 struct d30v_insn *insn;
123 struct d30v_format *f;
124 struct d30v_opcode *op = (struct d30v_opcode *)d30v_opcode_table;
125 int op1 = (num >> 25) & 0x7;
126 int op2 = (num >> 20) & 0x1f;
127 int mod = (num >> 18) & 0x3;
129 /* find the opcode */
131 if ((op->op1 == op1) && (op->op2 == op2))
136 if (!op || !op->name)
139 while (op->op1 == op1 && op->op2 == op2)
141 /* scan through all the formats for the opcode */
142 index = op->format[i++];
145 f = (struct d30v_format *)&d30v_format_table[index];
146 while (f->form == index)
148 if ((!is_long || f->form >= LONG) && (f->modifier == mod))
157 } while ((index = op->format[i++]) != 0);
163 if (insn->form == NULL)
167 insn->ecc = (num >> 28) & 0x7;
176 print_insn ( info, memaddr, num, insn, is_long, show_ext )
177 struct disassemble_info *info;
180 struct d30v_insn *insn;
184 int val, opnum, need_comma=0;
185 struct d30v_operand *oper;
186 int i, match, opind=0, need_paren=0, found_control=0;
188 (*info->fprintf_func) (info->stream, "%s",insn->op->name);
190 /* check for CMP or CMPU */
191 if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
194 val = extract_value(num,(struct d30v_operand *)&d30v_operand_table[insn->form->operands[0]],is_long);
195 (*info->fprintf_func) (info->stream, "%s",d30v_cc_names[val]);
198 /* add in ".s" or ".l" */
202 (*info->fprintf_func) (info->stream, ".l");
204 (*info->fprintf_func) (info->stream, ".s");
208 (*info->fprintf_func) (info->stream, "/%s",d30v_ecc_names[insn->ecc]);
210 (*info->fprintf_func) (info->stream, "\t");
212 while ((opnum = insn->form->operands[opind++]) != 0)
215 oper = (struct d30v_operand *)&d30v_operand_table[opnum];
217 if (oper->flags & OPERAND_SHIFT)
220 if (need_comma && oper->flags != OPERAND_PLUS && oper->flags != OPERAND_MINUS)
223 (*info->fprintf_func) (info->stream, ", ");
226 if (oper->flags == OPERAND_ATMINUS)
228 (*info->fprintf_func) (info->stream, "@-");
231 if (oper->flags == OPERAND_MINUS)
233 (*info->fprintf_func) (info->stream, "-");
236 if (oper->flags == OPERAND_PLUS)
238 (*info->fprintf_func) (info->stream, "+");
241 if (oper->flags == OPERAND_ATSIGN)
243 (*info->fprintf_func) (info->stream, "@");
246 if (oper->flags == OPERAND_ATPAR)
248 (*info->fprintf_func) (info->stream, "@(");
253 if (oper->flags == OPERAND_SPECIAL)
256 val = extract_value(num, oper, is_long);
258 if (oper->flags & OPERAND_REG)
261 if (oper->flags & OPERAND_CONTROL)
263 struct d30v_operand *oper3 =
264 (struct d30v_operand *)&d30v_operand_table[insn->form->operands[2]];
265 int id = extract_value (num, oper3, is_long );
270 val |= OPERAND_CONTROL;
274 val = OPERAND_CONTROL + MAX_CONTROL_REG + id;
280 fprintf(stderr,"illegal id (%d)\n",id);
283 else if (oper->flags & OPERAND_ACC)
285 else if (oper->flags & OPERAND_FLAG)
287 for (i=0;i<reg_name_cnt();i++)
289 if (val == pre_defined_registers[i].value)
291 if (pre_defined_registers[i].pname)
292 (*info->fprintf_func)
293 (info->stream, "%s",pre_defined_registers[i].pname);
295 (*info->fprintf_func)
296 (info->stream, "%s",pre_defined_registers[i].name);
303 /* this would only get executed if a register was not in the
305 (*info->fprintf_func)
306 (info->stream, _("<unknown register %d>"), val & 0x3F);
309 /* repeati has a relocation, but its first argument is a plain
310 immediate. OTOH instructions like djsri have a pc-relative
311 delay target, but a absolute jump target. Therefore, a test
312 of insn->op->reloc_flag is not specific enough; we must test
313 if the actual operand we are handling now is pc-relative. */
314 else if (oper->flags & OPERAND_PCREL)
318 /* IMM6S3 is unsigned. */
319 if (oper->flags & OPERAND_SIGNED || bits == 32)
322 max = (1 << (bits - 1));
328 val = -val & ((1 << bits)-1);
334 (*info->fprintf_func) (info->stream, "-%x\t(",val);
335 (*info->print_address_func) ((memaddr - val) & PC_MASK, info);
336 (*info->fprintf_func) (info->stream, ")");
340 (*info->fprintf_func) (info->stream, "%x\t(",val);
341 (*info->print_address_func) ((memaddr + val) & PC_MASK, info);
342 (*info->fprintf_func) (info->stream, ")");
345 else if (insn->op->reloc_flag == RELOC_ABS)
347 (*info->print_address_func) (val, info);
351 if (oper->flags & OPERAND_SIGNED)
353 int max = (1 << (bits - 1));
358 val &= ((1 << bits) - 1);
359 (*info->fprintf_func) (info->stream, "-");
362 (*info->fprintf_func) (info->stream, "0x%x",val);
364 /* if there is another operand, then write a comma and space */
365 if (insn->form->operands[opind] && !(found_control && opind == 2))
369 (*info->fprintf_func) (info->stream, ")");
375 extract_value (num, oper, is_long)
377 struct d30v_operand *oper;
381 int shift = 12 - oper->position;
382 int mask = (0xFFFFFFFF >> (32 - oper->bits));
386 if (oper->bits == 32)
388 /* piece together 32-bit constant */
389 val = ((num & 0x3FFFF)
390 | ((num & 0xFF00000) >> 2)
391 | ((num & 0x3F00000000LL) >> 6));
394 val = (num >> (32 + shift)) & mask;
397 val = (num >> shift) & mask;
399 if (oper->flags & OPERAND_SHIFT)