1 /* Disassemble D30V instructions.
2 Copyright 1997, 1998, 2000, 2001, 2005, 2007
3 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
24 #include "opcode/d30v.h"
28 #define PC_MASK 0xFFFFFFFF
30 /* Return 0 if lookup fails,
31 1 if found and only one form,
32 2 if found and there are short and long forms. */
35 lookup_opcode (struct d30v_insn *insn, long num, int is_long)
38 struct d30v_format *f;
39 struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table;
40 int op1 = (num >> 25) & 0x7;
41 int op2 = (num >> 20) & 0x1f;
42 int mod = (num >> 18) & 0x3;
44 /* Find the opcode. */
47 if ((op->op1 == op1) && (op->op2 == op2))
56 while (op->op1 == op1 && op->op2 == op2)
58 /* Scan through all the formats for the opcode. */
59 index = op->format[i++];
62 f = (struct d30v_format *) &d30v_format_table[index];
63 while (f->form == index)
65 if ((!is_long || f->form >= LONG) && (f->modifier == mod))
75 while ((index = op->format[i++]) != 0);
81 if (insn->form == NULL)
85 insn->ecc = (num >> 28) & 0x7;
93 extract_value (long long num, struct d30v_operand *oper, int is_long)
96 int shift = 12 - oper->position;
97 int mask = (0xFFFFFFFF >> (32 - oper->bits));
101 if (oper->bits == 32)
102 /* Piece together 32-bit constant. */
103 val = ((num & 0x3FFFF)
104 | ((num & 0xFF00000) >> 2)
105 | ((num & 0x3F00000000LL) >> 6));
107 val = (num >> (32 + shift)) & mask;
110 val = (num >> shift) & mask;
112 if (oper->flags & OPERAND_SHIFT)
119 print_insn (struct disassemble_info *info,
122 struct d30v_insn *insn,
126 int val, opnum, need_comma = 0;
127 struct d30v_operand *oper;
128 int i, match, opind = 0, need_paren = 0, found_control = 0;
130 (*info->fprintf_func) (info->stream, "%s", insn->op->name);
132 /* Check for CMP or CMPU. */
133 if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
138 (struct d30v_operand *) &d30v_operand_table[insn->form->operands[0]],
140 (*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]);
143 /* Add in ".s" or ".l". */
147 (*info->fprintf_func) (info->stream, ".l");
149 (*info->fprintf_func) (info->stream, ".s");
153 (*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]);
155 (*info->fprintf_func) (info->stream, "\t");
157 while ((opnum = insn->form->operands[opind++]) != 0)
161 oper = (struct d30v_operand *) &d30v_operand_table[opnum];
163 if (oper->flags & OPERAND_SHIFT)
167 && oper->flags != OPERAND_PLUS
168 && oper->flags != OPERAND_MINUS)
171 (*info->fprintf_func) (info->stream, ", ");
174 if (oper->flags == OPERAND_ATMINUS)
176 (*info->fprintf_func) (info->stream, "@-");
179 if (oper->flags == OPERAND_MINUS)
181 (*info->fprintf_func) (info->stream, "-");
184 if (oper->flags == OPERAND_PLUS)
186 (*info->fprintf_func) (info->stream, "+");
189 if (oper->flags == OPERAND_ATSIGN)
191 (*info->fprintf_func) (info->stream, "@");
194 if (oper->flags == OPERAND_ATPAR)
196 (*info->fprintf_func) (info->stream, "@(");
201 if (oper->flags == OPERAND_SPECIAL)
204 val = extract_value (num, oper, is_long);
206 if (oper->flags & OPERAND_REG)
209 if (oper->flags & OPERAND_CONTROL)
211 struct d30v_operand *oper3 =
212 (struct d30v_operand *) &d30v_operand_table[insn->form->operands[2]];
213 int id = extract_value (num, oper3, is_long);
219 val |= OPERAND_CONTROL;
223 val = OPERAND_CONTROL + MAX_CONTROL_REG + id;
229 fprintf (stderr, "illegal id (%d)\n", id);
232 else if (oper->flags & OPERAND_ACC)
234 else if (oper->flags & OPERAND_FLAG)
236 for (i = 0; i < reg_name_cnt (); i++)
238 if (val == pre_defined_registers[i].value)
240 if (pre_defined_registers[i].pname)
241 (*info->fprintf_func)
242 (info->stream, "%s", pre_defined_registers[i].pname);
244 (*info->fprintf_func)
245 (info->stream, "%s", pre_defined_registers[i].name);
252 /* This would only get executed if a register was not in
253 the register table. */
254 (*info->fprintf_func)
255 (info->stream, _("<unknown register %d>"), val & 0x3F);
258 /* repeati has a relocation, but its first argument is a plain
259 immediate. OTOH instructions like djsri have a pc-relative
260 delay target, but an absolute jump target. Therefore, a test
261 of insn->op->reloc_flag is not specific enough; we must test
262 if the actual operand we are handling now is pc-relative. */
263 else if (oper->flags & OPERAND_PCREL)
267 /* IMM6S3 is unsigned. */
268 if (oper->flags & OPERAND_SIGNED || bits == 32)
271 max = (1 << (bits - 1));
277 val = -val & ((1 << bits) - 1);
283 (*info->fprintf_func) (info->stream, "-%x\t(", val);
284 (*info->print_address_func) ((memaddr - val) & PC_MASK, info);
285 (*info->fprintf_func) (info->stream, ")");
289 (*info->fprintf_func) (info->stream, "%x\t(", val);
290 (*info->print_address_func) ((memaddr + val) & PC_MASK, info);
291 (*info->fprintf_func) (info->stream, ")");
294 else if (insn->op->reloc_flag == RELOC_ABS)
296 (*info->print_address_func) (val, info);
300 if (oper->flags & OPERAND_SIGNED)
302 int max = (1 << (bits - 1));
308 val &= ((1 << bits) - 1);
309 (*info->fprintf_func) (info->stream, "-");
312 (*info->fprintf_func) (info->stream, "0x%x", val);
314 /* If there is another operand, then write a comma and space. */
315 if (insn->form->operands[opind] && !(found_control && opind == 2))
319 (*info->fprintf_func) (info->stream, ")");
323 print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info)
327 unsigned long in1, in2;
328 struct d30v_insn insn;
333 info->bytes_per_line = 8;
334 info->bytes_per_chunk = 4;
335 info->display_endian = BFD_ENDIAN_BIG;
337 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
340 (*info->memory_error_func) (status, memaddr, info);
343 in1 = bfd_getb32 (buffer);
345 status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info);
348 info->bytes_per_line = 8;
349 if (!(result = lookup_opcode (&insn, in1, 0)))
350 (*info->fprintf_func) (info->stream, ".long\t0x%lx", in1);
352 print_insn (info, memaddr, (long long) in1, &insn, 0, result);
355 in2 = bfd_getb32 (buffer);
357 if (in1 & in2 & FM01)
359 /* LONG instruction. */
360 if (!(result = lookup_opcode (&insn, in1, 1)))
362 (*info->fprintf_func) (info->stream, ".long\t0x%lx,0x%lx", in1, in2);
365 num = (long long) in1 << 32 | in2;
366 print_insn (info, memaddr, num, &insn, 1, result);
371 if (!(result = lookup_opcode (&insn, in1, 0)))
372 (*info->fprintf_func) (info->stream, ".long\t0x%lx", in1);
374 print_insn (info, memaddr, num, &insn, 0, result);
376 switch (((in1 >> 31) << 1) | (in2 >> 31))
379 (*info->fprintf_func) (info->stream, "\t||\t");
382 (*info->fprintf_func) (info->stream, "\t->\t");
385 (*info->fprintf_func) (info->stream, "\t<-\t");
392 if (!(result = lookup_opcode (&insn, in2, 0)))
393 (*info->fprintf_func) (info->stream, ".long\t0x%lx", in2);
395 print_insn (info, memaddr, num, &insn, 0, result);