1 /* Disassembler code for CRX.
2 Copyright 2004 Free Software Foundation, Inc.
3 Contributed by Tomer Levi, NSC, Israel.
6 This file is part of the GNU binutils and GDB, the GNU debugger.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #include "opcode/crx.h"
26 /* String to print when opcode was not matched. */
27 #define ILLEGAL "illegal"
28 /* Escape to 16-bit immediate. */
29 #define ESCAPE_16_BIT 0xE
31 /* Extract 'n_bits' from 'a' starting from offset 'offs'. */
32 #define EXTRACT(a, offs, n_bits) \
33 (n_bits == 32 ? (((a) >> (offs)) & ~0L) \
34 : (((a) >> (offs)) & ((1 << (n_bits)) -1)))
36 /* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
37 #define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
39 typedef unsigned long dwordU;
40 typedef unsigned short wordU;
48 /* Structure to hold valid 'cinv' instruction options. */
52 /* Cinv printed string. */
54 /* Value corresponding to the string. */
59 /* CRX 'cinv' options. */
60 const cinv_entry crx_cinvs[] =
62 {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4},
63 {"[d,u]", 5}, {"[d,i]", 6}, {"[d,i,u]", 7}
66 /* Number of valid 'cinv' instruction options. */
67 int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
68 /* Current opcode table entry we're disassembling. */
69 const inst *instruction;
70 /* Current instruction we're disassembling. */
72 /* The current instruction is read into 3 consecutive words. */
74 /* Contains all words in appropriate order. */
76 /* Holds the current processed argument number. */
77 int processing_argument_number;
78 /* Nonzero means a CST4 instruction. */
80 /* Nonzero means the instruction's original size is
81 incremented (escape sequence is used). */
84 static int get_number_of_operands (void);
85 static argtype getargtype (operand_type);
86 static int getbits (operand_type);
87 static char *getregname (reg);
88 static char *getcopregname (copreg, reg_type);
89 static char * getprocregname (int);
90 static char *gettrapstring (unsigned);
91 static char *getcinvstring (unsigned);
92 static void getregliststring (int, char *, int);
93 static wordU get_word_at_PC (bfd_vma, struct disassemble_info *);
94 static void get_words_at_PC (bfd_vma, struct disassemble_info *);
95 static unsigned long build_mask (void);
96 static int powerof2 (int);
97 static int match_opcode (void);
98 static void make_instruction (void);
99 static void print_arguments (ins *, struct disassemble_info *);
100 static void print_arg (argument *, struct disassemble_info *);
102 /* Retrieve the number of operands for the current assembled instruction. */
105 get_number_of_operands (void)
109 for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
115 /* Return the bit size for a given operand. */
118 getbits (operand_type op)
121 return crx_optab[op].bit_size;
126 /* Return the argument type of a given operand. */
129 getargtype (operand_type op)
132 return crx_optab[op].arg_type;
137 /* Given the trap index in dispatch table, return its name.
138 This routine is used when disassembling the 'excp' instruction. */
141 gettrapstring (unsigned int index)
143 const trap_entry *trap;
145 for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++)
146 if (trap->entry == index)
152 /* Given a 'cinv' instruction constant operand, return its corresponding string.
153 This routine is used when disassembling the 'cinv' instruction. */
156 getcinvstring (unsigned int num)
158 const cinv_entry *cinv;
160 for (cinv = crx_cinvs; cinv < (crx_cinvs + NUMCINVS); cinv++)
161 if (cinv->value == num)
167 /* Given a register enum value, retrieve its name. */
172 const reg_entry *reg = &crx_regtab[r];
174 if (reg->type != CRX_R_REGTYPE)
180 /* Given a coprocessor register enum value, retrieve its name. */
183 getcopregname (copreg r, reg_type type)
185 const reg_entry *reg;
187 if (type == CRX_C_REGTYPE)
188 reg = &crx_copregtab[r];
189 else if (type == CRX_CS_REGTYPE)
190 reg = &crx_copregtab[r+(cs0-c0)];
198 /* Getting a processor register name. */
201 getprocregname (int index)
205 for (r = crx_regtab; r < crx_regtab + NUMREGS; r++)
206 if (r->image == index)
209 return "ILLEGAL REGISTER";
212 /* Get the power of two for a given integer. */
219 for (i = 0, product = 1; i < x; i++)
225 /* Transform a register bit mask to a register list. */
228 getregliststring (int trap, char *string, int core_cop)
236 for (i = 0; i < 16; i++)
241 sprintf (temp_string, "r%d", i);
243 sprintf (temp_string, "c%d", i);
244 strcat (string, temp_string);
246 strcat (string, ",");
251 strcat (string, "}");
254 /* START and END are relating 'allWords' struct, which is 48 bits size.
257 +---------+---------+---------+---------+
259 +---------+---------+---------+---------+
264 makelongparameter (ULONGLONG val, int start, int end)
268 p.val = (dwordU) EXTRACT(val, 48 - end, end - start);
269 p.nbits = end - start;
273 /* Build a mask of the instruction's 'constant' opcode,
274 based on the instruction's printing flags. */
279 unsigned int print_flags;
282 print_flags = instruction->flags & FMT_CRX;
301 mask = SBM(instruction->match_bits);
308 /* Search for a matching opcode. Return 1 for success, 0 for failure. */
315 /* The instruction 'constant' opcode doewsn't exceed 32 bits. */
316 unsigned long doubleWord = words[1] + (words[0] << 16);
318 /* Start searching from end of instruction table. */
319 instruction = &crx_instruction[NUMOPCODES - 2];
321 /* Loop over instruction table until a full match is found. */
322 while (instruction >= crx_instruction)
324 mask = build_mask ();
325 if ((doubleWord & mask) == BIN(instruction->match, instruction->match_bits))
333 /* Set the proper parameter value for different type of arguments. */
336 make_argument (argument * a, int start_bits)
338 int inst_bit_size, total_size;
341 if ((instruction->size == 3) && a->size >= 16)
350 p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
351 inst_bit_size - start_bits);
356 p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
357 inst_bit_size - start_bits);
362 p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
363 inst_bit_size - start_bits);
365 if ((p.nbits == 4) && cst4flag)
367 if (IS_INSN_TYPE (CMPBR_INS) && (p.val == ESCAPE_16_BIT))
369 /* A special case, where the value is actually stored
370 in the last 4 bits. */
371 p = makelongparameter (allWords, 44, 48);
372 /* The size of the instruction should be incremented. */
378 else if (p.val == 13)
382 else if (p.val == 10)
384 else if (p.val == 11)
395 total_size = a->size + 10; /* sizeof(rbase + ridx + scl2) = 10. */
396 p = makelongparameter (allWords, inst_bit_size - total_size,
397 inst_bit_size - (total_size - 4));
399 p = makelongparameter (allWords, inst_bit_size - (total_size - 4),
400 inst_bit_size - (total_size - 8));
402 p = makelongparameter (allWords, inst_bit_size - (total_size - 8),
403 inst_bit_size - (total_size - 10));
405 p = makelongparameter (allWords, inst_bit_size - (total_size - 10),
411 p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
412 inst_bit_size - start_bits);
419 p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
420 inst_bit_size - start_bits);
422 /* Case for opc4 r dispu rbase. */
423 p = makelongparameter (allWords, inst_bit_size - (start_bits + 8),
424 inst_bit_size - (start_bits + 4));
428 /* The 'rbase' start_bits is always relative to a 32-bit data type. */
429 p = makelongparameter (allWords, 32 - (start_bits + 4),
432 p = makelongparameter (allWords, 32 - start_bits,
435 if ((p.nbits == 4) && cst4flag)
437 if (instruction->flags & DISPUW4)
439 else if (instruction->flags & DISPUD4)
446 p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
447 inst_bit_size - start_bits);
455 /* Print a single argument. */
458 print_arg (argument *a, struct disassemble_info *info)
460 LONGLONG longdisp, mask;
464 PTR stream = info->stream;
465 fprintf_ftype func = info->fprintf_func;
470 func (stream, "%s", getcopregname (a->cr, CRX_C_REGTYPE));
474 func (stream, "%s", getcopregname (a->cr, CRX_CS_REGTYPE));
478 if (IS_INSN_MNEMONIC ("mtpr") || IS_INSN_MNEMONIC ("mfpr"))
479 func (stream, "%s", getprocregname (a->r));
481 func (stream, "%s", getregname (a->r));
485 if (IS_INSN_MNEMONIC ("excp"))
486 func (stream, "%s", gettrapstring (a->constant));
488 else if (IS_INSN_MNEMONIC ("cinv"))
489 func (stream, "%s", getcinvstring (a->constant));
491 else if (INST_HAS_REG_LIST)
493 if (!IS_INSN_TYPE (COP_REG_INS))
495 getregliststring (a->constant, string, 1);
496 func (stream, "%s", string);
500 /* Check for proper argument number. */
501 if (processing_argument_number == 2)
503 getregliststring (a->constant, string, 0);
504 func (stream, "%s", string);
507 func (stream, "$0x%x", a->constant);
511 func (stream, "$0x%x", a->constant);
515 func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r),
516 getregname (a->i_r), powerof2 (a->scale));
520 func (stream, "(%s)", getregname (a->r));
524 func (stream, "0x%x(%s)", a->constant, getregname (a->r));
526 if (IS_INSN_TYPE (LD_STOR_INS_INC))
531 /* Removed the *2 part as because implicit zeros are no more required.
532 Have to fix this as this needs a bit of extension in terms of branchins.
533 Have to add support for cmp and branch instructions. */
534 if (IS_INSN_TYPE (BRANCH_INS) || IS_INSN_MNEMONIC ("bal")
535 || IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS)
536 || IS_INSN_TYPE (COP_BRANCH_INS))
538 func (stream, "%c", '*');
539 longdisp = a->constant;
549 mask = ((LONGLONG)1 << a->size) - 1;
550 if (longdisp & ((LONGLONG)1 << a->size))
553 longdisp = ~(longdisp) + 1;
555 a->constant = (unsigned long int) (longdisp & mask);
559 "Wrong offset used in branch/bal instruction");
563 func (stream, "%c", sign_flag);
565 /* For branch Neq instruction it is 2*offset + 2. */
566 if (IS_INSN_TYPE (BRANCH_NEQ_INS))
567 a->constant = 2 * a->constant + 2;
568 if (IS_INSN_TYPE (LD_STOR_INS_INC)
569 || IS_INSN_TYPE (LD_STOR_INS)
570 || IS_INSN_TYPE (STOR_IMM_INS)
571 || IS_INSN_TYPE (CSTBIT_INS))
573 op_index = instruction->flags & REVERSE_MATCH ? 0 : 1;
574 if (instruction->operands[op_index].op_type == abs16)
575 a->constant |= 0xFFFF0000;
577 func (stream, "0x%x", a->constant);
584 /* Print all the arguments of CURRINSN instruction. */
587 print_arguments (ins *currInsn, struct disassemble_info *info)
591 for (i = 0; i < currInsn->nargs; i++)
593 processing_argument_number = i;
595 print_arg (&currInsn->arg[i], info);
597 if (i != currInsn->nargs - 1)
598 info->fprintf_func (info->stream, ", ");
602 /* Build the instruction's arguments. */
605 make_instruction (void)
608 unsigned int temp_value, shift;
611 for (i = 0; i < currInsn.nargs; i++)
613 a.type = getargtype (instruction->operands[i].op_type);
614 if (instruction->operands[i].op_type == cst4
615 || instruction->operands[i].op_type == rbase_cst4)
617 a.size = getbits (instruction->operands[i].op_type);
618 shift = instruction->operands[i].shift;
620 make_argument (&a, shift);
624 /* Calculate instruction size (in bytes). */
625 currInsn.size = instruction->size + (size_changed ? 1 : 0);
628 /* Swapping first and second arguments. */
629 if (IS_INSN_TYPE (COP_BRANCH_INS))
631 temp_value = currInsn.arg[0].constant;
632 currInsn.arg[0].constant = currInsn.arg[1].constant;
633 currInsn.arg[1].constant = temp_value;
637 /* Retrieve a single word from a given memory address. */
640 get_word_at_PC (bfd_vma memaddr, struct disassemble_info *info)
646 status = info->read_memory_func (memaddr, buffer, 2, info);
649 insn = (wordU) bfd_getl16 (buffer);
654 /* Retrieve multiple words (3) from a given memory address. */
657 get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
662 for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
663 words[i] = get_word_at_PC (mem, info);
666 ((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2];
669 /* Prints the instruction by calling print_arguments after proper matching. */
672 print_insn_crx (memaddr, info)
674 struct disassemble_info *info;
676 int is_decoded; /* Nonzero means instruction has a match. */
678 /* Initialize global variables. */
682 /* Retrieve the encoding from current memory location. */
683 get_words_at_PC (memaddr, info);
684 /* Find a matching opcode in table. */
685 is_decoded = match_opcode ();
686 /* If found, print the instruction's mnemonic and arguments. */
687 if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0)
689 info->fprintf_func (info->stream, "%s", instruction->mnemonic);
690 if ((currInsn.nargs = get_number_of_operands ()) != 0)
691 info->fprintf_func (info->stream, "\t");
693 print_arguments (&currInsn, info);
694 return currInsn.size;
697 /* No match found. */
698 info->fprintf_func (info->stream,"%s ",ILLEGAL);