1 /* Disassembler code for CRIS.
2 Copyright (C) 2000-2019 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB, Lund, Sweden.
4 Written by Hans-Peter Nilsson.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
25 #include "opcode/cris.h"
26 #include "libiberty.h"
28 /* No instruction will be disassembled longer than this. In theory, and
29 in silicon, address prefixes can be cascaded. In practice, cascading
30 is not used by GCC, and not supported by the assembler. */
31 #ifndef MAX_BYTES_PER_CRIS_INSN
32 #define MAX_BYTES_PER_CRIS_INSN 8
35 /* Whether or not to decode prefixes, folding it into the following
36 instruction. FIXME: Make this optional later. */
38 #define PARSE_PREFIX 1
41 /* Sometimes we prefix all registers with this character. */
42 #define REGISTER_PREFIX_CHAR '$'
44 /* Whether or not to trace the following sequence:
49 This is the assembly form of a switch-statement in C.
50 The "sub is optional. If there is none, then X will be zero.
51 X is the value of the first case,
52 Y is the number of cases (including default).
54 This results in case offsets printed on the form:
55 case N: -> case_address
56 where N is an estimation on the corresponding 'case' operand in C,
57 and case_address is where execution of that case continues after the
58 sequence presented above.
60 The old style of output was to print the offsets as instructions,
61 which made it hard to follow "case"-constructs in the disassembly,
62 and caused a lot of annoying warnings about undefined instructions.
64 FIXME: Make this optional later. */
66 #define TRACE_CASE (disdata->trace_case)
69 enum cris_disass_family
70 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 };
72 /* Stored in the disasm_info->private_data member. */
73 struct cris_disasm_data
75 /* Whether to print something less confusing if we find something
76 matching a switch-construct. */
77 bfd_boolean trace_case;
79 /* Whether this code is flagged as crisv32. FIXME: Should be an enum
80 that includes "compatible". */
81 enum cris_disass_family distype;
84 /* Value of first element in switch. */
85 static long case_offset = 0;
87 /* How many more case-offsets to print. */
88 static long case_offset_counter = 0;
90 /* Number of case offsets. */
91 static long no_of_case_offsets = 0;
93 /* Candidate for next case_offset. */
94 static long last_immediate = 0;
96 static int cris_constraint
97 (const char *, unsigned, unsigned, struct cris_disasm_data *);
99 /* Parse disassembler options and store state in info. FIXME: For the
100 time being, we abuse static variables. */
103 cris_parse_disassembler_options (disassemble_info *info,
104 enum cris_disass_family distype)
106 struct cris_disasm_data *disdata;
108 info->private_data = calloc (1, sizeof (struct cris_disasm_data));
109 disdata = (struct cris_disasm_data *) info->private_data;
115 = (info->disassembler_options == NULL
116 || (strcmp (info->disassembler_options, "nocase") != 0));
118 disdata->distype = distype;
122 static const struct cris_spec_reg *
123 spec_reg_info (unsigned int sreg, enum cris_disass_family distype)
127 for (i = 0; cris_spec_regs[i].name != NULL; i++)
129 if (cris_spec_regs[i].number == sreg)
131 if (distype == cris_dis_v32)
132 switch (cris_spec_regs[i].applicable_version)
134 case cris_ver_warning:
135 case cris_ver_version_all:
140 /* No ambiguous sizes or register names with CRISv32. */
141 if (cris_spec_regs[i].warning == NULL)
142 return &cris_spec_regs[i];
146 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p)
147 return &cris_spec_regs[i];
154 /* Return the number of bits in the argument. */
157 number_of_bits (unsigned int val)
161 for (bits = 0; val != 0; val &= val - 1)
167 /* Get an entry in the opcode-table. */
169 static const struct cris_opcode *
170 get_opcode_entry (unsigned int insn,
171 unsigned int prefix_insn,
172 struct cris_disasm_data *disdata)
174 /* For non-prefixed insns, we keep a table of pointers, indexed by the
175 insn code. Each entry is initialized when found to be NULL. */
176 static const struct cris_opcode **opc_table = NULL;
178 const struct cris_opcode *max_matchedp = NULL;
179 const struct cris_opcode **prefix_opc_table = NULL;
181 /* We hold a table for each prefix that need to be handled differently. */
182 static const struct cris_opcode **dip_prefixes = NULL;
183 static const struct cris_opcode **bdapq_m1_prefixes = NULL;
184 static const struct cris_opcode **bdapq_m2_prefixes = NULL;
185 static const struct cris_opcode **bdapq_m4_prefixes = NULL;
186 static const struct cris_opcode **rest_prefixes = NULL;
188 /* Allocate and clear the opcode-table. */
189 if (opc_table == NULL)
191 opc_table = malloc (65536 * sizeof (opc_table[0]));
192 if (opc_table == NULL)
195 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *));
198 = malloc (65536 * sizeof (const struct cris_opcode **));
199 if (dip_prefixes == NULL)
202 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0]));
205 = malloc (65536 * sizeof (const struct cris_opcode **));
206 if (bdapq_m1_prefixes == NULL)
209 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0]));
212 = malloc (65536 * sizeof (const struct cris_opcode **));
213 if (bdapq_m2_prefixes == NULL)
216 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0]));
219 = malloc (65536 * sizeof (const struct cris_opcode **));
220 if (bdapq_m4_prefixes == NULL)
223 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0]));
226 = malloc (65536 * sizeof (const struct cris_opcode **));
227 if (rest_prefixes == NULL)
230 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0]));
233 /* Get the right table if this is a prefix.
234 This code is connected to cris_constraints in that it knows what
235 prefixes play a role in recognition of patterns; the necessary
236 state is reflected by which table is used. If constraints
237 involving match or non-match of prefix insns are changed, then this
238 probably needs changing too. */
239 if (prefix_insn != NO_CRIS_PREFIX)
241 const struct cris_opcode *popcodep
242 = (opc_table[prefix_insn] != NULL
243 ? opc_table[prefix_insn]
244 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata));
246 if (popcodep == NULL)
249 if (popcodep->match == BDAP_QUICK_OPCODE)
251 /* Since some offsets are recognized with "push" macros, we
252 have to have different tables for them. */
253 int offset = (prefix_insn & 255);
261 prefix_opc_table = bdapq_m4_prefixes;
265 prefix_opc_table = bdapq_m2_prefixes;
269 prefix_opc_table = bdapq_m1_prefixes;
273 prefix_opc_table = rest_prefixes;
277 else if (popcodep->match == DIP_OPCODE)
278 /* We don't allow postincrement when the prefix is DIP, so use a
279 different table for DIP. */
280 prefix_opc_table = dip_prefixes;
282 prefix_opc_table = rest_prefixes;
285 if (prefix_insn != NO_CRIS_PREFIX
286 && prefix_opc_table[insn] != NULL)
287 max_matchedp = prefix_opc_table[insn];
288 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
289 max_matchedp = opc_table[insn];
292 const struct cris_opcode *opcodep;
293 int max_level_of_match = -1;
295 for (opcodep = cris_opcodes;
296 opcodep->name != NULL;
301 if (disdata->distype == cris_dis_v32)
303 switch (opcodep->applicable_version)
305 case cris_ver_version_all:
311 case cris_ver_sim_v0_10:
314 case cris_ver_warning:
331 switch (opcodep->applicable_version)
333 case cris_ver_version_all:
340 case cris_ver_sim_v0_10:
342 case cris_ver_warning:
355 /* We give a double lead for bits matching the template in
356 cris_opcodes. Not even, because then "move p8,r10" would
357 be given 2 bits lead over "clear.d r10". When there's a
358 tie, the first entry in the table wins. This is
359 deliberate, to avoid a more complicated recognition
361 if ((opcodep->match & insn) == opcodep->match
362 && (opcodep->lose & insn) == 0
364 = cris_constraint (opcodep->args,
370 += 2 * number_of_bits (opcodep->match
372 > max_level_of_match))
374 max_matchedp = opcodep;
375 max_level_of_match = level_of_match;
377 /* If there was a full match, never mind looking
379 if (level_of_match >= 2 * 16)
383 /* Fill in the new entry.
385 If there are changes to the opcode-table involving prefixes, and
386 disassembly then does not work correctly, try removing the
387 else-clause below that fills in the prefix-table. If that
388 helps, you need to change the prefix_opc_table setting above, or
389 something related. */
390 if (prefix_insn == NO_CRIS_PREFIX)
391 opc_table[insn] = max_matchedp;
393 prefix_opc_table[insn] = max_matchedp;
399 /* Return -1 if the constraints of a bitwise-matched instruction say
400 that there is no match. Otherwise return a nonnegative number
401 indicating the confidence in the match (higher is better). */
404 cris_constraint (const char *cs,
406 unsigned int prefix_insn,
407 struct cris_disasm_data *disdata)
414 for (s = cs; *s; s++)
418 /* Do not recognize "pop" if there's a prefix and then only for
420 if (prefix_insn != NO_CRIS_PREFIX
421 || disdata->distype != cris_dis_v0_v10)
426 /* Not recognized at disassembly. */
430 /* Size modifier for "clear", i.e. special register 0, 4 or 8.
431 Check that it is one of them. Only special register 12 could
432 be mismatched, but checking for matches is more logical than
433 checking for mismatches when there are only a few cases. */
434 tmp = ((insn >> 12) & 0xf);
435 if (tmp != 0 && tmp != 4 && tmp != 8)
440 if ((insn & 0x30) == 0x30)
445 /* A prefix operand without side-effect. */
446 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0)
457 /* If this is a prefixed insn with postincrement (side-effect),
458 the prefix must not be DIP. */
459 if (prefix_insn != NO_CRIS_PREFIX)
463 const struct cris_opcode *prefix_opcodep
464 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
466 if (prefix_opcodep->match == DIP_OPCODE)
475 /* If we don't fall through, then the prefix is ok. */
478 /* A "push" prefix. Check for valid "push" size.
479 In case of special register, it may be != 4. */
480 if (prefix_insn != NO_CRIS_PREFIX)
482 /* Match the prefix insn to BDAPQ. */
483 const struct cris_opcode *prefix_opcodep
484 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
486 if (prefix_opcodep->match == BDAP_QUICK_OPCODE)
488 int pushsize = (prefix_insn & 255);
495 unsigned int spec_reg = (insn >> 12) & 15;
496 const struct cris_spec_reg *sregp
497 = spec_reg_info (spec_reg, disdata->distype);
499 /* For a special-register, the "prefix size" must
500 match the size of the register. */
501 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
504 else if (s[1] == 'R')
506 if ((insn & 0x30) == 0x20 && pushsize == -4)
509 /* FIXME: Should abort here; next constraint letter
510 *must* be 'P' or 'R'. */
516 retval = (((insn >> 12) & 15) == (insn & 15));
525 const struct cris_spec_reg *sregp
526 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
528 /* Since we match four bits, we will give a value of 4-1 = 3
529 in a match. If there is a corresponding exact match of a
530 special register in another pattern, it will get a value of
531 4, which will be higher. This should be correct in that an
532 exact pattern would match better than a general pattern.
534 Note that there is a reason for not returning zero; the
535 pattern for "clear" is partly matched in the bit-pattern
536 (the two lower bits must be zero), while the bit-pattern
537 for a move from a special register is matched in the
538 register constraint. */
550 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok)
556 /* Format number as hex with a leading "0x" into outbuffer. */
559 format_hex (unsigned long number,
561 struct cris_disasm_data *disdata)
563 /* Truncate negative numbers on >32-bit hosts. */
564 number &= 0xffffffff;
566 sprintf (outbuffer, "0x%lx", number);
568 /* Save this value for the "case" support. */
570 last_immediate = number;
572 return outbuffer + strlen (outbuffer);
575 /* Format number as decimal into outbuffer. Parameter signedp says
576 whether the number should be formatted as signed (!= 0) or
580 format_dec (long number, char *outbuffer, int signedp)
582 last_immediate = number;
584 sprintf (outbuffer, "%ld", number);
586 sprintf (outbuffer, "%lu", (unsigned long) number);
588 return outbuffer + strlen (outbuffer);
591 /* Format the name of the general register regno into outbuffer. */
594 format_reg (struct cris_disasm_data *disdata,
596 char *outbuffer_start,
597 bfd_boolean with_reg_prefix)
599 char *outbuffer = outbuffer_start;
602 *outbuffer++ = REGISTER_PREFIX_CHAR;
607 /* For v32, there is no context in which we output PC. */
608 if (disdata->distype == cris_dis_v32)
609 strcpy (outbuffer, "acr");
611 strcpy (outbuffer, "pc");
615 strcpy (outbuffer, "sp");
619 sprintf (outbuffer, "r%d", regno);
623 return outbuffer_start + strlen (outbuffer_start);
626 /* Format the name of a support register into outbuffer. */
629 format_sup_reg (unsigned int regno,
630 char *outbuffer_start,
631 bfd_boolean with_reg_prefix)
633 char *outbuffer = outbuffer_start;
637 *outbuffer++ = REGISTER_PREFIX_CHAR;
639 for (i = 0; cris_support_regs[i].name != NULL; i++)
640 if (cris_support_regs[i].number == regno)
642 sprintf (outbuffer, "%s", cris_support_regs[i].name);
643 return outbuffer_start + strlen (outbuffer_start);
646 /* There's supposed to be register names covering all numbers, though
647 some may be generic names. */
648 sprintf (outbuffer, "format_sup_reg-BUG");
649 return outbuffer_start + strlen (outbuffer_start);
652 /* Return the length of an instruction. */
655 bytes_to_skip (unsigned int insn,
656 const struct cris_opcode *matchedp,
657 enum cris_disass_family distype,
658 const struct cris_opcode *prefix_matchedp)
660 /* Each insn is a word plus "immediate" operands. */
661 unsigned to_skip = 2;
662 const char *template_name = (const char *) matchedp->args;
665 for (s = template_name; *s; s++)
666 if ((*s == 's' || *s == 'N' || *s == 'Y')
667 && (insn & 0x400) && (insn & 15) == 15
668 && prefix_matchedp == NULL)
670 /* Immediate via [pc+], so we have to check the size of the
672 int mode_size = 1 << ((insn >> 4) & (*template_name == 'z' ? 1 : 3));
674 if (matchedp->imm_oprnd_size == SIZE_FIX_32)
676 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG)
678 const struct cris_spec_reg *sregp
679 = spec_reg_info ((insn >> 12) & 15, distype);
681 /* FIXME: Improve error handling; should have been caught
686 /* PC is incremented by two, not one, for a byte. Except on
687 CRISv32, where constants are always DWORD-size for
688 special registers. */
690 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1;
693 to_skip += (mode_size + 1) & ~1;
703 /* Print condition code flags. */
706 print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp)
708 /* Use the v8 (Etrax 100) flag definitions for disassembly.
709 The differences with v0 (Etrax 1..4) vs. Svinto are:
712 FIXME: Emit v0..v3 flag names somehow. */
713 static const char v8_fnames[] = "cvznxibm";
714 static const char v32_fnames[] = "cvznxiup";
716 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames;
718 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15));
721 for (i = 0; i < 8; i++)
722 if (flagbits & (1 << i))
728 /* Print out an insn with its operands, and update the info->insn_type
729 fields. The prefix_opcodep and the rest hold a prefix insn that is
730 supposed to be output as an address mode. */
733 print_with_operands (const struct cris_opcode *opcodep,
735 unsigned char *buffer,
737 disassemble_info *info,
738 /* If a prefix insn was before this insn (and is supposed
739 to be output as an address), here is a description of
741 const struct cris_opcode *prefix_opcodep,
742 unsigned int prefix_insn,
743 unsigned char *prefix_buffer,
744 bfd_boolean with_reg_prefix)
746 /* Get a buffer of somewhat reasonable size where we store
747 intermediate parts of the insn. */
748 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2];
750 static const char mode_char[] = "bwd?";
753 struct cris_disasm_data *disdata
754 = (struct cris_disasm_data *) info->private_data;
756 /* Print out the name first thing we do. */
757 (*info->fprintf_func) (info->stream, "%s", opcodep->name);
762 /* Ignore any prefix indicator. */
766 if (*s == 'm' || *s == 'M' || *s == 'z')
770 /* Get the size-letter. */
772 ? (insn & 0x8000 ? 'd'
773 : insn & 0x4000 ? 'w' : 'b')
774 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)];
776 /* Ignore the size and the space character that follows. */
780 /* Add a space if this isn't a long-branch, because for those will add
781 the condition part of the name later. */
782 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256))
785 /* Fill in the insn-type if deducible from the name (and there's no
787 if (opcodep->name[0] == 'j')
789 if (CONST_STRNEQ (opcodep->name, "jsr"))
790 /* It's "jsr" or "jsrc". */
791 info->insn_type = dis_jsr;
793 /* Any other jump-type insn is considered a branch. */
794 info->insn_type = dis_branch;
797 /* We might know some more fields right now. */
798 info->branch_delay_insns = opcodep->delayed;
800 /* Handle operands. */
806 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix);
811 *tp++ = REGISTER_PREFIX_CHAR;
824 /* Ignore at this point; used at earlier stages to avoid
825 recognition if there's a prefix at something that in other
826 ways looks like a "pop". */
830 /* Ignore. This is an optional ".d " on the large one of
835 /* This was the prefix that made this a "push". We've already
836 handled it by recognizing it, so signal that the prefix is
837 handled by setting it to NULL. */
838 prefix_opcodep = NULL;
843 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
847 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
852 /* Like N but pc-relative to the start of the insn. */
854 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536
855 + buffer[5] * 0x1000000 + addr);
857 /* Finish off and output previous formatted bytes. */
860 (*info->fprintf_func) (info->stream, "%s", temp);
863 (*info->print_address_func) ((bfd_vma) number, info);
869 /* Like n but the offset is bits <3:0> in the instruction. */
870 unsigned long number = (buffer[0] & 0xf) * 2 + addr;
872 /* Finish off and output previous formatted bytes. */
875 (*info->fprintf_func) (info->stream, "%s", temp);
878 (*info->print_address_func) ((bfd_vma) number, info);
887 /* Any "normal" memory operand. */
888 if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL)
890 /* We're looking at [pc+], i.e. we need to output an immediate
891 number, where the size can depend on different things. */
894 = ((*cs == 'z' && (insn & 0x20))
895 || opcodep->match == BDAP_QUICK_OPCODE);
898 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
900 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
902 const struct cris_spec_reg *sregp
903 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
905 /* A NULL return should have been as a non-match earlier,
906 so catch it as an internal error in the error-case
909 /* Whatever non-valid size. */
912 /* PC is always incremented by a multiple of two.
913 For CRISv32, immediates are always 4 bytes for
914 special registers. */
915 nbytes = disdata->distype == cris_dis_v32
916 ? 4 : (sregp->reg_size + 1) & ~1;
920 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3));
932 if (signedp && number > 127)
937 number = buffer[2] + buffer[3] * 256;
938 if (signedp && number > 32767)
944 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536
945 + buffer[5] * 0x1000000;
954 if ((*cs == 'z' && (insn & 0x20))
955 || (opcodep->match == BDAP_QUICK_OPCODE
956 && (nbytes <= 2 || buffer[1 + nbytes] == 0)))
957 tp = format_dec (number, tp, signedp);
960 unsigned int highbyte = (number >> 24) & 0xff;
962 /* Either output this as an address or as a number. If it's
963 a dword with the same high-byte as the address of the
964 insn, assume it's an address, and also if it's a non-zero
965 non-0xff high-byte. If this is a jsr or a jump, then
966 it's definitely an address. */
968 && (highbyte == ((addr >> 24) & 0xff)
969 || (highbyte != 0 && highbyte != 0xff)
970 || info->insn_type == dis_branch
971 || info->insn_type == dis_jsr))
973 /* Finish off and output previous formatted bytes. */
977 (*info->fprintf_func) (info->stream, "%s", temp);
979 (*info->print_address_func) ((bfd_vma) number, info);
981 info->target = number;
984 tp = format_hex (number, tp, disdata);
989 /* Not an immediate number. Then this is a (possibly
990 prefixed) memory operand. */
991 if (info->insn_type != dis_nonbranch)
995 & (opcodep->args[0] == 'z' ? 1 : 3));
997 info->insn_type = dis_dref;
998 info->flags |= CRIS_DIS_FLAG_MEMREF;
1000 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
1002 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
1004 const struct cris_spec_reg *sregp
1005 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1007 /* FIXME: Improve error handling; should have been caught
1012 size = sregp->reg_size;
1017 info->data_size = size;
1023 /* We don't match dip with a postincremented field
1024 as a side-effect address mode. */
1025 && ((insn & 0x400) == 0
1026 || prefix_opcodep->match != DIP_OPCODE))
1030 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
1035 /* We mainly ignore the prefix format string when the
1036 address-mode syntax is output. */
1037 switch (prefix_opcodep->match)
1040 /* It's [r], [r+] or [pc+]. */
1041 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
1043 /* It's [pc+]. This cannot possibly be anything
1045 unsigned long number
1046 = prefix_buffer[2] + prefix_buffer[3] * 256
1047 + prefix_buffer[4] * 65536
1048 + prefix_buffer[5] * 0x1000000;
1050 info->target = (bfd_vma) number;
1052 /* Finish off and output previous formatted
1057 (*info->fprintf_func) (info->stream, "%s", temp);
1059 (*info->print_address_func) ((bfd_vma) number, info);
1063 /* For a memref in an address, we use target2.
1064 In this case, target is zero. */
1066 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1067 | CRIS_DIS_FLAG_MEM_TARGET2_MEM);
1069 info->target2 = prefix_insn & 15;
1072 tp = format_reg (disdata, prefix_insn & 15, tp,
1074 if (prefix_insn & 0x400)
1080 case BDAP_QUICK_OPCODE:
1084 number = prefix_buffer[0];
1088 /* Output "reg+num" or, if num < 0, "reg-num". */
1089 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1093 tp = format_dec (number, tp, 1);
1095 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1096 info->target = (prefix_insn >> 12) & 15;
1097 info->target2 = (bfd_vma) number;
1102 /* Output "r+R.m". */
1103 tp = format_reg (disdata, prefix_insn & 15, tp,
1106 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1109 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1112 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1113 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1115 | ((prefix_insn & 0x8000)
1116 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4
1117 : ((prefix_insn & 0x8000)
1118 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0)));
1120 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */
1121 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f)
1122 /* Then start interpreting data as offsets. */
1123 case_offset_counter = no_of_case_offsets;
1126 case BDAP_INDIR_OPCODE:
1127 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or
1129 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1132 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
1135 unsigned int nbytes;
1137 /* It's a value. Get its size. */
1138 int mode_size = 1 << ((prefix_insn >> 4) & 3);
1148 number = prefix_buffer[2];
1154 number = prefix_buffer[2] + prefix_buffer[3] * 256;
1161 = prefix_buffer[2] + prefix_buffer[3] * 256
1162 + prefix_buffer[4] * 65536
1163 + prefix_buffer[5] * 0x1000000;
1172 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1173 info->target2 = (bfd_vma) number;
1175 /* If the size is dword, then assume it's an
1179 /* Finish off and output previous formatted
1184 (*info->fprintf_func) (info->stream, "%s", temp);
1186 (*info->print_address_func) ((bfd_vma) number, info);
1192 tp = format_dec (number, tp, 1);
1197 /* Output "r+[R].m" or "r+[R+].m". */
1200 tp = format_reg (disdata, prefix_insn & 15, tp,
1202 if (prefix_insn & 0x400)
1206 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1209 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1210 | CRIS_DIS_FLAG_MEM_TARGET2_MEM
1211 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1213 | (((prefix_insn >> 4) == 2)
1215 : (((prefix_insn >> 4) & 3) == 1
1216 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD
1217 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE)));
1222 (*info->fprintf_func) (info->stream, "?prefix-bug");
1225 /* To mark that the prefix is used, reset it. */
1226 prefix_opcodep = NULL;
1230 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
1232 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1233 info->target = insn & 15;
1243 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
1245 *tp++ = mode_char[(insn >> 4) & 3];
1249 tp = format_dec (insn & 63, tp, 0);
1254 int where = buffer[2] + buffer[3] * 256;
1259 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4);
1261 if (insn == BA_PC_INCR_OPCODE)
1262 info->insn_type = dis_branch;
1264 info->insn_type = dis_condbranch;
1266 info->target = (bfd_vma) where;
1270 (*info->fprintf_func) (info->stream, "%s%s ",
1271 temp, cris_cc_strings[insn >> 12]);
1273 (*info->print_address_func) ((bfd_vma) where, info);
1278 tp = format_dec (insn & 31, tp, 0);
1282 tp = format_dec (insn & 15, tp, 0);
1287 long offset = insn & 0xfe;
1293 if (opcodep->match == BA_QUICK_OPCODE)
1294 info->insn_type = dis_branch;
1296 info->insn_type = dis_condbranch;
1298 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset;
1299 info->target = target;
1302 (*info->fprintf_func) (info->stream, "%s", temp);
1303 (*info->print_address_func) (target, info);
1310 long number = buffer[0];
1313 number = number - 256;
1315 tp = format_dec (number, tp, 1);
1317 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
1322 tp = print_flags (disdata, insn, tp);
1326 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1);
1331 const struct cris_spec_reg *sregp
1332 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1334 if (sregp->name == NULL)
1335 /* Should have been caught as a non-match eariler. */
1339 if (with_reg_prefix)
1340 *tp++ = REGISTER_PREFIX_CHAR;
1341 strcpy (tp, sregp->name);
1356 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")",
1357 prefix_opcodep->name, prefix_opcodep->args);
1359 (*info->fprintf_func) (info->stream, "%s", temp);
1361 /* Get info for matching case-tables, if we don't have any active.
1362 We assume that the last constant seen is used; either in the insn
1363 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */
1364 if (TRACE_CASE && case_offset_counter == 0)
1366 if (CONST_STRNEQ (opcodep->name, "sub"))
1367 case_offset = last_immediate;
1369 /* It could also be an "add", if there are negative case-values. */
1370 else if (CONST_STRNEQ (opcodep->name, "add"))
1371 /* The first case is the negated operand to the add. */
1372 case_offset = -last_immediate;
1374 /* A bound insn will tell us the number of cases. */
1375 else if (CONST_STRNEQ (opcodep->name, "bound"))
1376 no_of_case_offsets = last_immediate + 1;
1378 /* A jump or jsr or branch breaks the chain of insns for a
1379 case-table, so assume default first-case again. */
1380 else if (info->insn_type == dis_jsr
1381 || info->insn_type == dis_branch
1382 || info->insn_type == dis_condbranch)
1388 /* Print the CRIS instruction at address memaddr on stream. Returns
1389 length of the instruction, in bytes. Prefix register names with `$' if
1393 print_insn_cris_generic (bfd_vma memaddr,
1394 disassemble_info *info,
1395 bfd_boolean with_reg_prefix)
1399 const struct cris_opcode *matchedp;
1401 struct cris_disasm_data *disdata
1402 = (struct cris_disasm_data *) info->private_data;
1404 /* No instruction will be disassembled as longer than this number of
1405 bytes; stacked prefixes will not be expanded. */
1406 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN];
1407 unsigned char *bufp;
1411 /* There will be an "out of range" error after the last instruction.
1412 Reading pairs of bytes in decreasing number, we hope that we will get
1413 at least the amount that we will consume.
1415 If we can't get any data, or we do not get enough data, we print
1416 the error message. */
1418 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2)
1420 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info);
1425 /* If we did not get all we asked for, then clear the rest.
1426 Hopefully this makes a reproducible result in case of errors. */
1427 if (nbytes != MAX_BYTES_PER_CRIS_INSN)
1428 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes);
1433 /* Set some defaults for the insn info. */
1434 info->insn_info_valid = 1;
1435 info->branch_delay_insns = 0;
1436 info->data_size = 0;
1437 info->insn_type = dis_nonbranch;
1442 /* If we got any data, disassemble it. */
1447 insn = bufp[0] + bufp[1] * 256;
1449 /* If we're in a case-table, don't disassemble the offsets. */
1450 if (TRACE_CASE && case_offset_counter != 0)
1452 info->insn_type = dis_noninsn;
1455 /* If to print data as offsets, then shortcut here. */
1456 (*info->fprintf_func) (info->stream, "case %ld%s: -> ",
1457 case_offset + no_of_case_offsets
1458 - case_offset_counter,
1459 case_offset_counter == 1 ? "/default" :
1462 (*info->print_address_func) ((bfd_vma)
1465 - (no_of_case_offsets
1466 - case_offset_counter)
1468 case_offset_counter--;
1470 /* The default case start (without a "sub" or "add") must be
1472 if (case_offset_counter == 0)
1477 /* We're often called to disassemble zeroes. While this is a
1478 valid "bcc .+2" insn, it is also useless enough and enough
1479 of a nuiscance that we will just output "bcc .+2" for it
1480 and signal it as a noninsn. */
1481 (*info->fprintf_func) (info->stream,
1482 disdata->distype == cris_dis_v32
1483 ? "bcc ." : "bcc .+2");
1484 info->insn_type = dis_noninsn;
1489 const struct cris_opcode *prefix_opcodep = NULL;
1490 unsigned char *prefix_buffer = bufp;
1491 unsigned int prefix_insn = insn;
1492 int prefix_size = 0;
1494 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata);
1496 /* Check if we're supposed to write out prefixes as address
1497 modes and if this was a prefix. */
1498 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p')
1500 /* If it's a prefix, put it into the prefix vars and get the
1502 prefix_size = bytes_to_skip (prefix_insn, matchedp,
1503 disdata->distype, NULL);
1504 prefix_opcodep = matchedp;
1506 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
1507 matchedp = get_opcode_entry (insn, prefix_insn, disdata);
1509 if (matchedp != NULL)
1511 addr += prefix_size;
1512 bufp += prefix_size;
1513 advance += prefix_size;
1517 /* The "main" insn wasn't valid, at least not when
1518 prefixed. Put back things enough to output the
1519 prefix insn only, as a normal insn. */
1520 matchedp = prefix_opcodep;
1522 prefix_opcodep = NULL;
1526 if (matchedp == NULL)
1528 (*info->fprintf_func) (info->stream, "??0x%x", insn);
1531 info->insn_type = dis_noninsn;
1536 += bytes_to_skip (insn, matchedp, disdata->distype,
1539 /* The info_type and assorted fields will be set according
1541 print_with_operands (matchedp, insn, bufp, addr, info,
1542 prefix_opcodep, prefix_insn,
1543 prefix_buffer, with_reg_prefix);
1548 info->insn_type = dis_noninsn;
1550 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error
1551 status when reading that much, and the insn decoding indicated a
1552 length exceeding what we read, there is an error. */
1553 if (status != 0 && (nbytes == 0 || advance > nbytes))
1555 (*info->memory_error_func) (status, memaddr, info);
1559 /* Max supported insn size with one folded prefix insn. */
1560 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN;
1562 /* I would like to set this to a fixed value larger than the actual
1563 number of bytes to print in order to avoid spaces between bytes,
1564 but objdump.c (2.9.1) does not like that, so we print 16-bit
1565 chunks, which is the next choice. */
1566 info->bytes_per_chunk = 2;
1568 /* Printing bytes in order of increasing addresses makes sense,
1569 especially on a little-endian target.
1570 This is completely the opposite of what you think; setting this to
1571 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N
1573 info->display_endian = BFD_ENDIAN_BIG;
1578 /* Disassemble, prefixing register names with `$'. CRIS v0..v10. */
1581 print_insn_cris_with_register_prefix (bfd_vma vma,
1582 disassemble_info *info)
1584 if (info->private_data == NULL
1585 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
1587 return print_insn_cris_generic (vma, info, TRUE);
1590 /* Disassemble, prefixing register names with `$'. CRIS v32. */
1593 print_insn_crisv32_with_register_prefix (bfd_vma vma,
1594 disassemble_info *info)
1596 if (info->private_data == NULL
1597 && !cris_parse_disassembler_options (info, cris_dis_v32))
1599 return print_insn_cris_generic (vma, info, TRUE);
1602 /* Disassemble, prefixing register names with `$'.
1603 Common v10 and v32 subset. */
1606 print_insn_crisv10_v32_with_register_prefix (bfd_vma vma,
1607 disassemble_info *info)
1609 if (info->private_data == NULL
1610 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
1612 return print_insn_cris_generic (vma, info, TRUE);
1615 /* Disassemble, no prefixes on register names. CRIS v0..v10. */
1618 print_insn_cris_without_register_prefix (bfd_vma vma,
1619 disassemble_info *info)
1621 if (info->private_data == NULL
1622 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
1624 return print_insn_cris_generic (vma, info, FALSE);
1627 /* Disassemble, no prefixes on register names. CRIS v32. */
1630 print_insn_crisv32_without_register_prefix (bfd_vma vma,
1631 disassemble_info *info)
1633 if (info->private_data == NULL
1634 && !cris_parse_disassembler_options (info, cris_dis_v32))
1636 return print_insn_cris_generic (vma, info, FALSE);
1639 /* Disassemble, no prefixes on register names.
1640 Common v10 and v32 subset. */
1643 print_insn_crisv10_v32_without_register_prefix (bfd_vma vma,
1644 disassemble_info *info)
1646 if (info->private_data == NULL
1647 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
1649 return print_insn_cris_generic (vma, info, FALSE);
1652 /* Return a disassembler-function that prints registers with a `$' prefix,
1653 or one that prints registers without a prefix.
1654 FIXME: We should improve the solution to avoid the multitude of
1655 functions seen above. */
1658 cris_get_disassembler (bfd *abfd)
1660 /* If there's no bfd in sight, we return what is valid as input in all
1661 contexts if fed back to the assembler: disassembly *with* register
1662 prefix. Unfortunately this will be totally wrong for v32. */
1664 return print_insn_cris_with_register_prefix;
1666 if (bfd_get_symbol_leading_char (abfd) == 0)
1668 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
1669 return print_insn_crisv32_with_register_prefix;
1670 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
1671 return print_insn_crisv10_v32_with_register_prefix;
1673 /* We default to v10. This may be specifically specified in the
1674 bfd mach, but is also the default setting. */
1675 return print_insn_cris_with_register_prefix;
1678 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
1679 return print_insn_crisv32_without_register_prefix;
1680 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
1681 return print_insn_crisv10_v32_without_register_prefix;
1682 return print_insn_cris_without_register_prefix;
1686 eval: (c-set-style "gnu")