1 /* Disassemble AVR instructions.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 int insn_size; /* in words */
33 unsigned int bin_opcode;
34 unsigned int bin_mask;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN, 0},
40 struct avr_opcodes_s avr_opcodes[] =
42 #include "opcode/avr.h"
43 {NULL, NULL, NULL, 0, 0, 0, 0}
46 static int avr_operand PARAMS ((unsigned int, unsigned int,
47 unsigned int, int, char *, char *, int));
50 avr_operand (insn, insn2, pc, constraint, buf, comment, regs)
63 /* Any register operand. */
66 insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* source register */
68 insn = (insn & 0x01f0) >> 4; /* destination register */
70 sprintf (buf, "r%d", insn);
75 sprintf (buf, "r%d", 16 + (insn & 0xf));
77 sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
81 sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
86 sprintf (buf, "r%d", 16 + (insn & 7));
88 sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
93 sprintf (buf, "r%d", (insn & 0xf) * 2);
95 sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
102 switch (insn & 0x100f)
104 case 0x0000: xyz = "Z"; break;
105 case 0x1001: xyz = "Z+"; break;
106 case 0x1002: xyz = "-Z"; break;
107 case 0x0008: xyz = "Y"; break;
108 case 0x1009: xyz = "Y+"; break;
109 case 0x100a: xyz = "-Y"; break;
110 case 0x100c: xyz = "X"; break;
111 case 0x100d: xyz = "X+"; break;
112 case 0x100e: xyz = "-X"; break;
113 default: xyz = "??"; ok = 0;
117 if (AVR_UNDEF_P (insn))
118 sprintf (comment, _("undefined"));
127 if (AVR_UNDEF_P (insn))
128 sprintf (comment, _("undefined"));
136 x |= (insn >> 7) & (3 << 3);
137 x |= (insn >> 8) & (1 << 5);
143 sprintf (buf, "+%d", x);
144 sprintf (comment, "0x%02x", x);
149 sprintf (buf, "0x%x",
150 ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2);
155 int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
156 sprintf (buf, ".%+-8d", rel_addr);
157 sprintf (comment, "0x%x", pc + 2 + rel_addr);
163 int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
164 sprintf (buf, ".%+-8d", rel_addr);
165 sprintf (comment, "0x%x", pc + 2 + rel_addr);
170 sprintf (buf, "0x%04X", insn2);
174 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
175 sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
180 fprintf (stderr, _("Internal disassembler error"));
188 x = (insn & 0xf) | ((insn >> 2) & 0x30);
189 sprintf (buf, "0x%02x", x);
190 sprintf (comment, "%d", x);
195 sprintf (buf, "%d", insn & 7);
199 sprintf (buf, "%d", (insn >> 4) & 7);
206 x |= (insn >> 5) & 0x30;
207 sprintf (buf, "0x%02x", x);
208 sprintf (comment, "%d", x);
216 x = (insn >> 3) & 0x1f;
217 sprintf (buf, "0x%02x", x);
218 sprintf (comment, "%d", x);
228 fprintf (stderr, _("unknown constraint `%c'"), constraint);
235 static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
237 static unsigned short
238 avrdis_opcode (addr, info)
240 disassemble_info *info;
244 status = info->read_memory_func(addr, buffer, 2, info);
247 info->memory_error_func(status, addr, info);
250 return bfd_getl16 (buffer);
255 print_insn_avr(addr, info)
257 disassemble_info *info;
259 unsigned int insn, insn2;
260 struct avr_opcodes_s *opcode;
261 void *stream = info->stream;
262 fprintf_ftype prin = info->fprintf_func;
263 static int initialized;
266 char op1[20], op2[20], comment1[40], comment2[40];
272 for (opcode = avr_opcodes; opcode->name; opcode++)
275 unsigned int bin = 0;
276 unsigned int mask = 0;
278 for (s = opcode->opcode; *s; ++s)
283 mask |= (*s == '1' || *s == '0');
285 assert (s - opcode->opcode == 16);
286 assert (opcode->bin_opcode == bin);
287 opcode->bin_mask = mask;
291 insn = avrdis_opcode (addr, info);
293 for (opcode = avr_opcodes; opcode->name; opcode++)
295 if ((insn & opcode->bin_mask) == opcode->bin_opcode)
299 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
300 `std b+0,r' as `st b,r' (next entry in the table). */
302 if (AVR_DISP0_P (insn))
312 char *op = opcode->constraints;
317 if (opcode->insn_size > 1)
319 insn2 = avrdis_opcode (addr + 2, info);
323 if (*op && *op != '?')
325 int regs = REGISTER_P (*op);
327 ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0);
329 if (ok && *(++op) == ',')
330 ok = avr_operand (insn, insn2, addr, *(++op), op2,
331 *comment1 ? comment2 : comment1, regs);
337 /* Unknown opcode, or invalid combination of operands. */
338 sprintf (op1, "0x%04x", insn);
340 sprintf (comment1, "????");
344 (*prin) (stream, "%s", ok ? opcode->name : ".word");
347 (*prin) (stream, "\t%s", op1);
350 (*prin) (stream, ", %s", op2);
353 (*prin) (stream, "\t; %s", comment1);
356 (*prin) (stream, " %s", comment2);