1 /* Disassemble AVR instructions.
2 Copyright 1999, 2000, 2002, 2004 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #include "libiberty.h"
31 int insn_size; /* in words */
33 unsigned int bin_opcode;
36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
37 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
39 const struct avr_opcodes_s avr_opcodes[] =
41 #include "opcode/avr.h"
42 {NULL, NULL, NULL, 0, 0, 0}
45 static int avr_operand (unsigned int, unsigned int, unsigned int, int,
46 char *, char *, int, int *, bfd_vma *);
49 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
50 char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
57 /* Any register operand. */
60 insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* source register */
62 insn = (insn & 0x01f0) >> 4; /* destination register */
64 sprintf (buf, "r%d", insn);
69 sprintf (buf, "r%d", 16 + (insn & 0xf));
71 sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
75 sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
80 sprintf (buf, "r%d", 16 + (insn & 7));
82 sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
87 sprintf (buf, "r%d", (insn & 0xf) * 2);
89 sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
96 switch (insn & 0x100f)
98 case 0x0000: xyz = "Z"; break;
99 case 0x1001: xyz = "Z+"; break;
100 case 0x1002: xyz = "-Z"; break;
101 case 0x0008: xyz = "Y"; break;
102 case 0x1009: xyz = "Y+"; break;
103 case 0x100a: xyz = "-Y"; break;
104 case 0x100c: xyz = "X"; break;
105 case 0x100d: xyz = "X+"; break;
106 case 0x100e: xyz = "-X"; break;
107 default: xyz = "??"; ok = 0;
111 if (AVR_UNDEF_P (insn))
112 sprintf (comment, _("undefined"));
121 if (AVR_UNDEF_P (insn))
122 sprintf (comment, _("undefined"));
130 x |= (insn >> 7) & (3 << 3);
131 x |= (insn >> 8) & (1 << 5);
137 sprintf (buf, "+%d", x);
138 sprintf (comment, "0x%02x", x);
144 *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
150 int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
151 sprintf (buf, ".%+-8d", rel_addr);
153 *sym_addr = pc + 2 + rel_addr;
154 sprintf (comment, "0x");
160 int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
161 sprintf (buf, ".%+-8d", rel_addr);
163 *sym_addr = pc + 2 + rel_addr;
164 sprintf (comment, "0x");
169 sprintf (buf, "0x%04X", insn2);
173 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
174 sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
179 fprintf (stderr, _("Internal disassembler error"));
187 x = (insn & 0xf) | ((insn >> 2) & 0x30);
188 sprintf (buf, "0x%02x", x);
189 sprintf (comment, "%d", x);
194 sprintf (buf, "%d", insn & 7);
198 sprintf (buf, "%d", (insn >> 4) & 7);
205 x |= (insn >> 5) & 0x30;
206 sprintf (buf, "0x%02x", x);
207 sprintf (comment, "%d", x);
215 x = (insn >> 3) & 0x1f;
216 sprintf (buf, "0x%02x", x);
217 sprintf (comment, "%d", x);
227 fprintf (stderr, _("unknown constraint `%c'"), constraint);
234 static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
236 static unsigned short
237 avrdis_opcode (addr, info)
239 disassemble_info *info;
243 status = info->read_memory_func(addr, buffer, 2, info);
246 info->memory_error_func(status, addr, info);
249 return bfd_getl16 (buffer);
254 print_insn_avr(addr, info)
256 disassemble_info *info;
258 unsigned int insn, insn2;
259 const struct avr_opcodes_s *opcode;
260 static unsigned int *maskptr;
261 void *stream = info->stream;
262 fprintf_ftype prin = info->fprintf_func;
263 static unsigned int *avr_bin_masks;
264 static int initialized;
267 char op1[20], op2[20], comment1[40], comment2[40];
268 int sym_op1 = 0, sym_op2 = 0;
269 bfd_vma sym_addr1, sym_addr2;
273 unsigned int nopcodes;
275 nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
277 avr_bin_masks = (unsigned int *)
278 xmalloc (nopcodes * sizeof (unsigned int));
280 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
285 unsigned int bin = 0;
286 unsigned int mask = 0;
288 for (s = opcode->opcode; *s; ++s)
293 mask |= (*s == '1' || *s == '0');
295 assert (s - opcode->opcode == 16);
296 assert (opcode->bin_opcode == bin);
303 insn = avrdis_opcode (addr, info);
305 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
309 if ((insn & *maskptr) == opcode->bin_opcode)
313 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
314 `std b+0,r' as `st b,r' (next entry in the table). */
316 if (AVR_DISP0_P (insn))
326 char *op = opcode->constraints;
331 if (opcode->insn_size > 1)
333 insn2 = avrdis_opcode (addr + 2, info);
337 if (*op && *op != '?')
339 int regs = REGISTER_P (*op);
341 ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
343 if (ok && *(++op) == ',')
344 ok = avr_operand (insn, insn2, addr, *(++op), op2,
345 *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
351 /* Unknown opcode, or invalid combination of operands. */
352 sprintf (op1, "0x%04x", insn);
354 sprintf (comment1, "????");
358 (*prin) (stream, "%s", ok ? opcode->name : ".word");
361 (*prin) (stream, "\t%s", op1);
364 (*prin) (stream, ", %s", op2);
367 (*prin) (stream, "\t; %s", comment1);
370 info->print_address_func (sym_addr1, info);
373 (*prin) (stream, " %s", comment2);
376 info->print_address_func (sym_addr2, info);