1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
26 #include "coff/internal.h"
30 /* FIXME: This shouldn't be done here */
32 #include "elf/internal.h"
36 #define streq(a,b) (strcmp ((a), (b)) == 0)
39 #define strneq(a,b,n) (strncmp ((a), (b), (n)) == 0)
42 static char * arm_conditional[] =
43 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
44 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
46 static char * arm_regnames_raw[] =
47 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
48 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"};
50 static char * arm_regnames_standard[] =
51 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
52 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"};
54 static char * arm_regnames_apcs[] =
55 {"a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4",
56 "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc"};
58 /* Choose which register name set to use. */
59 static char ** arm_regnames = arm_regnames_standard;
61 static boolean force_thumb = false;
63 static char * arm_fp_const[] =
64 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
66 static char * arm_shift[] =
67 {"lsl", "lsr", "asr", "ror"};
69 /* Forward declarations. */
70 static void arm_decode_shift PARAMS ((long, fprintf_ftype, void *));
71 static int print_insn_arm PARAMS ((bfd_vma, struct disassemble_info *, long));
72 static int print_insn_thumb PARAMS ((bfd_vma, struct disassemble_info *, long));
73 static void parse_disassembler_option PARAMS ((char *));
74 static void parse_disassembler_options PARAMS ((char *));
78 arm_decode_shift (given, func, stream)
83 func (stream, "%s", arm_regnames[given & 0xf]);
85 if ((given & 0xff0) != 0)
87 if ((given & 0x10) == 0)
89 int amount = (given & 0xf80) >> 7;
90 int shift = (given & 0x60) >> 5;
96 func (stream, ", rrx");
103 func (stream, ", %s #%d", arm_shift[shift], amount);
106 func (stream, ", %s %s", arm_shift[(given & 0x60) >> 5],
107 arm_regnames[(given & 0xf00) >> 8]);
111 /* Print one instruction from PC on INFO->STREAM.
112 Return the size of the instruction (always 4 on ARM). */
115 print_insn_arm (pc, info, given)
117 struct disassemble_info * info;
120 struct arm_opcode * insn;
121 void * stream = info->stream;
122 fprintf_ftype func = info->fprintf_func;
124 for (insn = arm_opcodes; insn->assembler; insn++)
126 if ((given & insn->mask) == insn->value)
130 for (c = insn->assembler; *c; c++)
141 if (((given & 0x000f0000) == 0x000f0000)
142 && ((given & 0x02000000) == 0))
144 int offset = given & 0xfff;
146 func (stream, "[pc");
148 if (given & 0x01000000)
150 if ((given & 0x00800000) == 0)
154 func (stream, ", #%x]", offset);
158 /* Cope with the possibility of write-back being used.
159 Probably a very dangerous thing for the programmer
160 to do, but who are we to argue ? */
161 if (given & 0x00200000)
167 func (stream, "], #%x", offset);
169 offset = pc + 8; /* ie ignore the offset */
172 func (stream, "\t; ");
173 info->print_address_func (offset, info);
178 arm_regnames[(given >> 16) & 0xf]);
179 if ((given & 0x01000000) != 0)
181 if ((given & 0x02000000) == 0)
183 int offset = given & 0xfff;
185 func (stream, ", %s#%d",
186 (((given & 0x00800000) == 0)
187 ? "-" : ""), offset);
191 func (stream, ", %s",
192 (((given & 0x00800000) == 0)
194 arm_decode_shift (given, func, stream);
198 ((given & 0x00200000) != 0) ? "!" : "");
202 if ((given & 0x02000000) == 0)
204 int offset = given & 0xfff;
206 func (stream, "], %s#%d",
207 (((given & 0x00800000) == 0)
208 ? "-" : ""), offset);
214 func (stream, "], %s",
215 (((given & 0x00800000) == 0)
217 arm_decode_shift (given, func, stream);
224 if ((given & 0x004f0000) == 0x004f0000)
226 /* PC relative with immediate offset */
227 int offset = ((given & 0xf00) >> 4) | (given & 0xf);
229 if ((given & 0x00800000) == 0)
232 func (stream, "[pc, #%x]\t; ", offset);
234 (*info->print_address_func)
235 (offset + pc + 8, info);
240 arm_regnames[(given >> 16) & 0xf]);
241 if ((given & 0x01000000) != 0)
244 if ((given & 0x00400000) == 0x00400000)
247 int offset = ((given & 0xf00) >> 4) | (given & 0xf);
249 func (stream, ", %s#%d",
250 (((given & 0x00800000) == 0)
251 ? "-" : ""), offset);
256 func (stream, ", %s%s",
257 (((given & 0x00800000) == 0)
259 arm_regnames[given & 0xf]);
263 ((given & 0x00200000) != 0) ? "!" : "");
268 if ((given & 0x00400000) == 0x00400000)
271 int offset = ((given & 0xf00) >> 4) | (given & 0xf);
273 func (stream, "], %s#%d",
274 (((given & 0x00800000) == 0)
275 ? "-" : ""), offset);
282 func (stream, "], %s%s",
283 (((given & 0x00800000) == 0)
285 arm_regnames[given & 0xf]);
292 (*info->print_address_func)
293 (BDISP (given) * 4 + pc + 8, info);
298 arm_conditional [(given >> 28) & 0xf]);
307 for (reg = 0; reg < 16; reg++)
308 if ((given & (1 << reg)) != 0)
313 func (stream, "%s", arm_regnames[reg]);
320 if ((given & 0x02000000) != 0)
322 int rotate = (given & 0xf00) >> 7;
323 int immed = (given & 0xff);
324 immed = (((immed << (32 - rotate))
325 | (immed >> rotate)) & 0xffffffff);
326 func (stream, "#%d\t; 0x%x", immed, immed);
329 arm_decode_shift (given, func, stream);
333 if ((given & 0x0000f000) == 0x0000f000)
338 if ((given & 0x01200000) == 0x00200000)
343 if ((given & 0x00000020) == 0x00000020)
350 func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
351 if ((given & 0x01000000) != 0)
353 int offset = given & 0xff;
355 func (stream, ", %s#%d]%s",
356 ((given & 0x00800000) == 0 ? "-" : ""),
358 ((given & 0x00200000) != 0 ? "!" : ""));
364 int offset = given & 0xff;
366 func (stream, "], %s#%d",
367 ((given & 0x00800000) == 0 ? "-" : ""),
375 switch (given & 0x00090000)
378 func (stream, "_???");
381 func (stream, "_all");
384 func (stream, "_ctl");
387 func (stream, "_flg");
393 switch (given & 0x00408000)
410 switch (given & 0x00080080)
422 func (stream, _("<illegal precision>"));
427 switch (given & 0x00408000)
444 switch (given & 0x60)
460 case '0': case '1': case '2': case '3': case '4':
461 case '5': case '6': case '7': case '8': case '9':
463 int bitstart = *c++ - '0';
465 while (*c >= '0' && *c <= '9')
466 bitstart = (bitstart * 10) + *c++ - '0';
472 while (*c >= '0' && *c <= '9')
473 bitend = (bitend * 10) + *c++ - '0';
481 reg = given >> bitstart;
482 reg &= (2 << (bitend - bitstart)) - 1;
483 func (stream, "%s", arm_regnames[reg]);
489 reg = given >> bitstart;
490 reg &= (2 << (bitend - bitstart)) - 1;
491 func (stream, "%d", reg);
497 reg = given >> bitstart;
498 reg &= (2 << (bitend - bitstart)) - 1;
499 func (stream, "0x%08x", reg);
501 /* Some SWI instructions have special meanings. */
502 if ((given & 0x0fffffff) == 0x0FF00000)
503 func (stream, "\t; IMB");
504 else if ((given & 0x0fffffff) == 0x0FF00001)
505 func (stream, "\t; IMBRange");
511 reg = given >> bitstart;
512 reg &= (2 << (bitend - bitstart)) - 1;
513 func (stream, "%01x", reg & 0xf);
519 reg = given >> bitstart;
520 reg &= (2 << (bitend - bitstart)) - 1;
523 arm_fp_const[reg & 7]);
525 func (stream, "f%d", reg);
534 if ((given & (1 << bitstart)) == 0)
535 func (stream, "%c", *c);
539 if ((given & (1 << bitstart)) != 0)
540 func (stream, "%c", *c);
544 if ((given & (1 << bitstart)) != 0)
545 func (stream, "%c", *c++);
547 func (stream, "%c", *++c);
560 func (stream, "%c", *c);
568 /* Print one instruction from PC on INFO->STREAM.
569 Return the size of the instruction. */
572 print_insn_thumb (pc, info, given)
574 struct disassemble_info * info;
577 struct thumb_opcode * insn;
578 void * stream = info->stream;
579 fprintf_ftype func = info->fprintf_func;
581 for (insn = thumb_opcodes; insn->assembler; insn++)
583 if ((given & insn->mask) == insn->value)
585 char * c = insn->assembler;
587 /* Special processing for Thumb 2 instruction BL sequence: */
588 if (!*c) /* check for empty (not NULL) assembler string */
590 info->bytes_per_chunk = 4;
591 info->bytes_per_line = 4;
593 func (stream, "bl\t");
594 (*info->print_address_func)
595 (BDISP23 (given) * 2 + pc + 4, info);
600 info->bytes_per_chunk = 2;
601 info->bytes_per_line = 4;
621 reg = (given >> 3) & 0x7;
622 if (given & (1 << 6))
624 func (stream, "%s", arm_regnames[reg]);
633 if (given & (1 << 7))
635 func (stream, "%s", arm_regnames[reg]);
641 arm_conditional [(given >> 8) & 0xf]);
645 if (given & (1 << 8))
649 if (*c == 'O' && (given & (1 << 8)))
658 /* It would be nice if we could spot
659 ranges, and generate the rS-rE format: */
660 for (reg = 0; (reg < 8); reg++)
661 if ((given & (1 << reg)) != 0)
666 func (stream, "%s", arm_regnames[reg]);
689 case '0': case '1': case '2': case '3': case '4':
690 case '5': case '6': case '7': case '8': case '9':
692 int bitstart = *c++ - '0';
695 while (*c >= '0' && *c <= '9')
696 bitstart = (bitstart * 10) + *c++ - '0';
705 while (*c >= '0' && *c <= '9')
706 bitend = (bitend * 10) + *c++ - '0';
709 reg = given >> bitstart;
710 reg &= (2 << (bitend - bitstart)) - 1;
714 func (stream, "%s", arm_regnames[reg]);
718 func (stream, "%d", reg);
722 func (stream, "%d", reg << 1);
726 func (stream, "%d", reg << 2);
730 /* PC-relative address -- the bottom two
731 bits of the address are dropped before
733 info->print_address_func
734 (((pc + 4) & ~3) + (reg << 2), info);
738 func (stream, "0x%04x", reg);
742 reg = ((reg ^ (1 << bitend)) - (1 << bitend));
743 func (stream, "%d", reg);
747 reg = ((reg ^ (1 << bitend)) - (1 << bitend));
748 (*info->print_address_func)
749 (reg * 2 + pc + 4, info);
760 if ((given & (1 << bitstart)) != 0)
761 func (stream, "%c", *c);
766 if ((given & (1 << bitstart)) != 0)
767 func (stream, "%c", *c++);
769 func (stream, "%c", *++c);
783 func (stream, "%c", *c);
794 /* Select a different register name set.
795 Returns true if the name set selected is the APCS name set. */
797 arm_toggle_regnames ()
799 if (arm_regnames == arm_regnames_standard)
800 arm_regnames = arm_regnames_apcs;
802 arm_regnames = arm_regnames_standard;
804 return arm_regnames == arm_regnames_apcs;
808 parse_disassembler_option (option)
814 if (strneq (option, "reg-names-", 10))
818 if (streq (option, "std"))
819 arm_regnames = arm_regnames_standard;
820 else if (streq (option, "apcs"))
821 arm_regnames = arm_regnames_apcs;
822 else if (streq (option, "raw"))
823 arm_regnames = arm_regnames_raw;
825 fprintf (stderr, "Unrecognised register name set: %s\n", option);
827 else if (streq (option, "force-thumb"))
829 else if (streq (option, "no-force-thumb"))
832 fprintf (stderr, "Unrecognised disassembler option: %s\n", option);
838 parse_disassembler_options (options)
848 space = strchr (options, ' ');
853 parse_disassembler_option (options);
858 parse_disassembler_option (options);
863 /* NOTE: There are no checks in these routines that the relevant number of
867 print_insn_big_arm (pc, info)
869 struct disassemble_info * info;
876 if (info->disassembler_options)
878 parse_disassembler_options (info->disassembler_options);
880 /* To avoid repeated parsing of the options, we remove it here. */
881 info->disassembler_options = NULL;
884 is_thumb = force_thumb;
886 if (!is_thumb && info->symbols != NULL)
888 if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
890 coff_symbol_type * cs;
892 cs = coffsymbol (*info->symbols);
893 is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
894 || cs->native->u.syment.n_sclass == C_THUMBSTAT
895 || cs->native->u.syment.n_sclass == C_THUMBLABEL
896 || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
897 || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
899 else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour)
901 elf_symbol_type * es;
903 es = *(elf_symbol_type **)(info->symbols);
904 is_thumb = (ELF_ST_TYPE (es->internal_elf_sym.st_info) == STT_ARM_TFUNC)
905 || (ELF_ST_TYPE (es->internal_elf_sym.st_info) == STT_ARM_16BIT);
909 info->bytes_per_chunk = 4;
910 info->display_endian = BFD_ENDIAN_BIG;
912 /* Always fetch word aligned values. */
914 status = (*info->read_memory_func) (pc & ~ 0x3, (bfd_byte *) &b[0], 4, info);
917 (*info->memory_error_func) (status, pc, info);
925 given = (b[2] << 8) | b[3];
927 status = info->read_memory_func ((pc + 4) & ~ 0x3, (bfd_byte *) b, 4, info);
930 info->memory_error_func (status, pc + 4, info);
934 given |= (b[0] << 24) | (b[1] << 16);
937 given = (b[0] << 8) | b[1] | (b[2] << 24) | (b[3] << 16);
940 given = (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | (b[3]);
943 status = print_insn_thumb (pc, info, given);
945 status = print_insn_arm (pc, info, given);
951 print_insn_little_arm (pc, info)
953 struct disassemble_info * info;
960 if (info->disassembler_options)
962 parse_disassembler_options (info->disassembler_options);
964 /* To avoid repeated parsing of the options, we remove it here. */
965 info->disassembler_options = NULL;
968 is_thumb = force_thumb;
970 if (!is_thumb && info->symbols != NULL)
972 if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
974 coff_symbol_type * cs;
976 cs = coffsymbol (*info->symbols);
977 is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
978 || cs->native->u.syment.n_sclass == C_THUMBSTAT
979 || cs->native->u.syment.n_sclass == C_THUMBLABEL
980 || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
981 || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
983 else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour)
985 elf_symbol_type * es;
987 es = *(elf_symbol_type **)(info->symbols);
988 is_thumb = (ELF_ST_TYPE (es->internal_elf_sym.st_info) == STT_ARM_TFUNC)
989 || (ELF_ST_TYPE (es->internal_elf_sym.st_info) == STT_ARM_16BIT);
993 info->bytes_per_chunk = 4;
994 info->display_endian = BFD_ENDIAN_LITTLE;
996 status = (*info->read_memory_func) (pc, (bfd_byte *) &b[0], 4, info);
997 if (status != 0 && is_thumb)
999 info->bytes_per_chunk = 2;
1001 status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
1007 info->memory_error_func (status, pc, info);
1011 given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
1014 status = print_insn_thumb (pc, info, given);
1016 status = print_insn_arm (pc, info, given);