1 2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
3 * aarch64-tbl.h (aarch64_feature_simd_v8_3): Replace with...
4 (aarch64_feature_compnum): ...this.
5 (SIMD_V8_3): Replace with...
7 (CNUM_INSN): New macro.
8 (aarch64_opcode_table): Use it for the complex number instructions.
10 2017-02-24 Jan Beulich <jbeulich@suse.com>
12 * i386-dis.c (reg_table): REG_F6/1 and REG_F7/1 decode as TEST.
14 2017-02-23 Sheldon Lobo <sheldon.lobo@oracle.com>
16 Add support for associating SPARC ASIs with an architecture level.
17 * include/opcode/sparc.h (sparc_asi): New sparc_asi struct.
18 * opcodes/sparc-opc.c (asi_table): Updated asi_table and encoding/
19 decoding of SPARC ASIs.
21 2017-02-23 Jan Beulich <jbeulich@suse.com>
23 * i386-dis.c (get_valid_dis386): Don't special case VEX opcode
24 82. For 3-byte VEX only special case opcode 77 in VEX_0F space.
26 2017-02-21 Jan Beulich <jbeulich@suse.com>
28 * aarch64-asm.c (convert_bfc_to_bfm): Copy operand 0 to operand
29 1 (instead of to itself). Correct typo.
31 2017-02-14 Andrew Waterman <andrew@sifive.com>
33 * riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and
36 2017-02-15 Richard Sandiford <richard.sandiford@arm.com>
38 * aarch64-opc.c (aarch64_sys_regs): Add SVE registers.
39 (aarch64_sys_reg_supported_p): Handle them.
41 2017-02-15 Claudiu Zissulescu <claziss@synopsys.com>
43 * arc-opc.c (UIMM6_20R): Define.
44 (SIMM12_20): Use above.
46 (SIMM3_5_S): Use above.
47 (UIMM7_A32_11R_S): Define.
48 (UIMM7_9_S): Use above.
49 (UIMM3_13R_S): Define.
50 (SIMM11_A32_7_S): Use above.
52 (UIMM10_A32_8_S): Use above.
55 (arc_relax_opcodes): Use all above defines.
57 2017-02-15 Vineet Gupta <vgupta@synopsys.com>
59 * arc-regs.h: Distinguish some of the registers different on
62 2017-02-14 Alan Modra <amodra@gmail.com>
65 * ppc-opc.c (powerpc_operands): Flag SPR, SPRG and TBR entries
66 with PPC_OPERAND_SPR. Flag PSQ and PSQM with PPC_OPERAND_GQR.
68 2017-02-11 Stafford Horne <shorne@gmail.com>
69 Alan Modra <amodra@gmail.com>
71 * cgen-opc.c (cgen_lookup_insn): Delete buf and base_insn temps.
72 Use insn_bytes_value and insn_int_value directly instead. Don't
73 free allocated memory until function exit.
75 2017-02-10 Nicholas Piggin <npiggin@gmail.com>
77 * ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics.
79 2017-02-03 Nick Clifton <nickc@redhat.com>
82 * aarch64-opc.c (print_register_list): Ensure that the register
83 list index will fir into the tb buffer.
84 (print_register_offset_address): Likewise.
85 * tic6x-dis.c (print_insn_tic6x): Increase size of func_unit_buf.
87 2017-01-27 Alexis Deruell <alexis.deruelle@gmail.com>
90 * tic6x-dis.c (print_insn_tic6x): Correct displaying of parallel
91 instructions when the previous fetch packet ends with a 32-bit
94 2017-01-24 Dimitar Dimitrov <dimitar@dinux.eu>
96 * pru-opc.c: Remove vague reference to a future GDB port.
98 2017-01-20 Nick Clifton <nickc@redhat.com>
100 * po/ga.po: Updated Irish translation.
102 2017-01-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
104 * arm-dis.c (coprocessor_opcodes): Fix vcmla mask and disassembly.
106 2017-01-13 Yao Qi <yao.qi@linaro.org>
108 * m68k-dis.c (match_insn_m68k): Extend comments. Return -1
109 if FETCH_DATA returns 0.
110 (m68k_scan_mask): Likewise.
111 (print_insn_m68k): Update code to handle -1 return value.
113 2017-01-13 Yao Qi <yao.qi@linaro.org>
115 * m68k-dis.c (enum print_insn_arg_error): New.
116 (NEXTBYTE): Replace -3 with
117 PRINT_INSN_ARG_MEMORY_ERROR.
118 (NEXTULONG): Likewise.
119 (NEXTSINGLE): Likewise.
120 (NEXTDOUBLE): Likewise.
121 (NEXTDOUBLE): Likewise.
122 (NEXTPACKED): Likewise.
123 (FETCH_ARG): Likewise.
124 (FETCH_DATA): Update comments.
125 (print_insn_arg): Update comments. Replace magic numbers with
127 (match_insn_m68k): Likewise.
129 2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
131 * i386-dis.c (enum): Add PREFIX_EVEX_0F3855, EVEX_W_0F3855_P_2.
132 * i386-dis-evex.h (evex_table): Updated.
133 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VPOPCNTDQ_FLAGS,
134 CPU_ANY_AVX512_VPOPCNTDQ_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
135 (cpu_flags): Add CpuAVX512_VPOPCNTDQ.
136 * i386-opc.h (enum): (AVX512_VPOPCNTDQ): New.
137 (i386_cpu_flags): Add cpuavx512_vpopcntdq.
138 * i386-opc.tbl: Add Intel AVX512_VPOPCNTDQ instructions.
139 * i386-init.h: Regenerate.
142 2017-01-12 Yao Qi <yao.qi@linaro.org>
144 * msp430-dis.c (msp430_singleoperand): Return -1 if
145 msp430dis_opcode_signed returns false.
146 (msp430_doubleoperand): Likewise.
147 (msp430_branchinstr): Return -1 if
148 msp430dis_opcode_unsigned returns false.
149 (msp430x_calla_instr): Likewise.
150 (print_insn_msp430): Likewise.
152 2017-01-05 Nick Clifton <nickc@redhat.com>
155 * frv-desc.c (lookup_mach_via_bfd_name): Return NULL if the name
156 could not be matched.
157 (frv_cgen_cpu_open): Allow for lookup_mach_via_bfd_name returning
160 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
162 * aarch64-tbl.h (RCPC, RCPC_INSN): Define.
163 (aarch64_opcode_table): Use RCPC_INSN.
165 2017-01-03 Kito Cheng <kito.cheng@gmail.com>
167 * riscv-opc.c (riscv-opcodes): Add support for the "q" ISA
169 * riscv-opcodes/all-opcodes: Likewise.
171 2017-01-03 Dilyan Palauzov <dilyan.palauzov@aegee.org>
173 * riscv-dis.c (print_insn_args): Add fall through comment.
175 2017-01-03 Nick Clifton <nickc@redhat.com>
177 * po/sr.po: New Serbian translation.
178 * configure.ac (ALL_LINGUAS): Add sr.
179 * configure: Regenerate.
181 2017-01-02 Alan Modra <amodra@gmail.com>
183 * epiphany-desc.h: Regenerate.
184 * epiphany-opc.h: Regenerate.
185 * fr30-desc.h: Regenerate.
186 * fr30-opc.h: Regenerate.
187 * frv-desc.h: Regenerate.
188 * frv-opc.h: Regenerate.
189 * ip2k-desc.h: Regenerate.
190 * ip2k-opc.h: Regenerate.
191 * iq2000-desc.h: Regenerate.
192 * iq2000-opc.h: Regenerate.
193 * lm32-desc.h: Regenerate.
194 * lm32-opc.h: Regenerate.
195 * m32c-desc.h: Regenerate.
196 * m32c-opc.h: Regenerate.
197 * m32r-desc.h: Regenerate.
198 * m32r-opc.h: Regenerate.
199 * mep-desc.h: Regenerate.
200 * mep-opc.h: Regenerate.
201 * mt-desc.h: Regenerate.
202 * mt-opc.h: Regenerate.
203 * or1k-desc.h: Regenerate.
204 * or1k-opc.h: Regenerate.
205 * xc16x-desc.h: Regenerate.
206 * xc16x-opc.h: Regenerate.
207 * xstormy16-desc.h: Regenerate.
208 * xstormy16-opc.h: Regenerate.
210 2017-01-02 Alan Modra <amodra@gmail.com>
212 Update year range in copyright notice of all files.
214 For older changes see ChangeLog-2016
216 Copyright (C) 2017 Free Software Foundation, Inc.
218 Copying and distribution of this file, with or without modification,
219 are permitted in any medium without royalty provided the copyright
220 notice and this notice are preserved.
226 version-control: never