1 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
4 * i386-tbl.h: Regenerated.
6 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
8 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
10 2008-05-14 Alan Modra <amodra@bigpond.net.au>
12 * Makefile.am: Run "make dep-am".
13 * Makefile.in: Regenerate.
15 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
17 * i386-dis.c (MOVBE_Fixup): New.
19 (PREFIX_0F3880): Likewise.
20 (PREFIX_0F3881): Likewise.
21 (PREFIX_0F38F0): Updated.
22 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
23 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
24 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
26 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
28 (cpu_flags): Add CpuMovbe and CpuEPT.
30 * i386-opc.h (CpuMovbe): New.
33 (i386_cpu_flags): Add cpumovbe and cpuept.
35 * i386-opc.tbl: Add entries for movbe and EPT instructions.
36 * i386-init.h: Regenerated.
37 * i386-tbl.h: Likewise.
39 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
41 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
42 the two drem and the two dremu macros.
44 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
46 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
47 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
48 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
49 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
51 2008-04-25 David S. Miller <davem@davemloft.net>
53 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
54 instead of %sys_tick_cmpr, as suggested in architecture manuals.
56 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
58 * aclocal.m4: Regenerate.
59 * configure: Regenerate.
61 2008-04-23 David S. Miller <davem@davemloft.net>
63 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
65 (prefetch_table): Add missing values.
67 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
69 * i386-gen.c (opcode_modifiers): Add NoAVX.
71 * i386-opc.h (NoAVX): New.
73 (i386_opcode_modifier): Add noavx.
75 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
76 instructions which don't have AVX equivalent.
77 * i386-tbl.h: Regenerated.
79 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
81 * i386-dis.c (OP_VEX_FMA): New.
82 (OP_EX_VexImmW): Likewise.
84 (Vex128FMA): Likewise.
85 (EXVexImmW): Likewise.
86 (get_vex_imm8): Likewise.
87 (OP_EX_VexReg): Likewise.
88 (vex_i4_done): Renamed to ...
90 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
91 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
93 (print_insn): Updated.
94 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
95 (OP_REG_VexI4): Check invalid high registers.
97 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
98 Michael Meissner <michael.meissner@amd.com>
100 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
101 * i386-tbl.h: Regenerate from i386-opc.tbl.
103 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
105 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
106 accept Power E500MC instructions.
107 (print_ppc_disassembler_options): Document -Me500mc.
108 * ppc-opc.c (DUIS, DUI, T): New.
109 (XRT, XRTRA): Likewise.
111 (powerpc_opcodes): Add new Power E500MC instructions.
113 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
115 * s390-dis.c (init_disasm): Evaluate disassembler_options.
116 (print_s390_disassembler_options): New function.
117 * disassemble.c (disassembler_usage): Invoke
118 print_s390_disassembler_options.
120 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
122 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
123 of local variables used for mnemonic parsing: prefix, suffix and
126 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
128 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
129 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
130 (s390_crb_extensions): New extensions table.
131 (insertExpandedMnemonic): Handle '$' tag.
132 * s390-opc.txt: Remove conditional jump variants which can now
133 be expanded automatically.
134 Replace '*' tag with '$' in the compare and branch instructions.
136 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
138 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
139 (PREFIX_VEX_3AXX): Likewis.
141 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
143 * i386-opc.tbl: Remove 4 extra blank lines.
145 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
147 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
148 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
149 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
150 * i386-opc.tbl: Likewise.
152 * i386-opc.h (CpuCLMUL): Renamed to ...
155 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
157 * i386-init.h: Regenerated.
159 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
161 * i386-dis.c (OP_E_register): New.
162 (OP_E_memory): Likewise.
164 (OP_EX_Vex): Likewise.
165 (OP_EX_VexW): Likewise.
166 (OP_XMM_Vex): Likewise.
167 (OP_XMM_VexW): Likewise.
168 (OP_REG_VexI4): Likewise.
169 (PCLMUL_Fixup): Likewise.
170 (VEXI4_Fixup): Likewise.
171 (VZERO_Fixup): Likewise.
172 (VCMP_Fixup): Likewise.
173 (VPERMIL2_Fixup): Likewise.
174 (rex_original): Likewise.
175 (rex_ignored): Likewise.
196 (VPERMIL2): Likewise.
197 (xmm_mode): Likewise.
198 (xmmq_mode): Likewise.
199 (ymmq_mode): Likewise.
200 (vex_mode): Likewise.
201 (vex128_mode): Likewise.
202 (vex256_mode): Likewise.
203 (USE_VEX_C4_TABLE): Likewise.
204 (USE_VEX_C5_TABLE): Likewise.
205 (USE_VEX_LEN_TABLE): Likewise.
206 (VEX_C4_TABLE): Likewise.
207 (VEX_C5_TABLE): Likewise.
208 (VEX_LEN_TABLE): Likewise.
209 (REG_VEX_XX): Likewise.
210 (MOD_VEX_XXX): Likewise.
211 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
212 (PREFIX_0F3A44): Likewise.
213 (PREFIX_0F3ADF): Likewise.
214 (PREFIX_VEX_XXX): Likewise.
216 (VEX_OF38): Likewise.
217 (VEX_OF3A): Likewise.
218 (VEX_LEN_XXX): Likewise.
220 (need_vex): Likewise.
221 (need_vex_reg): Likewise.
222 (vex_i4_done): Likewise.
223 (vex_table): Likewise.
224 (vex_len_table): Likewise.
225 (OP_REG_VexI4): Likewise.
226 (vex_cmp_op): Likewise.
227 (pclmul_op): Likewise.
228 (vpermil2_op): Likewise.
231 (PREFIX_0F38F0): Likewise.
232 (PREFIX_0F3A60): Likewise.
233 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
234 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
235 and PREFIX_VEX_XXX entries.
236 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
237 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
239 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
240 Add MOD_VEX_XXX entries.
241 (ckprefix): Initialize rex_original and rex_ignored. Store the
242 REX byte in rex_original.
243 (get_valid_dis386): Handle the implicit prefix in VEX prefix
244 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
245 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
246 calling get_valid_dis386. Use rex_original and rex_ignored when
248 (putop): Handle "XY".
249 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
251 (OP_E_extended): Updated to use OP_E_register and
253 (OP_XMM): Handle VEX.
255 (XMM_Fixup): Likewise.
256 (CMP_Fixup): Use ARRAY_SIZE.
258 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
259 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
260 (operand_type_init): Add OPERAND_TYPE_REGYMM and
261 OPERAND_TYPE_VEX_IMM4.
262 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
263 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
264 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
265 VexImmExt and SSE2AVX.
266 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
268 * i386-opc.h (CpuAVX): New.
270 (CpuCLMUL): Likewise.
281 (Vex3Sources): Likewise.
282 (VexImmExt): Likewise.
286 (Vex_Imm4): Likewise.
287 (Implicit1stXmm0): Likewise.
290 (ByteOkIntel): Likewise.
293 (Unspecified): Likewise.
295 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
296 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
297 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
298 vex3sources, veximmext and sse2avx.
299 (i386_operand_type): Add regymm, ymmword and vex_imm4.
301 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
303 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
305 * i386-init.h: Regenerated.
306 * i386-tbl.h: Likewise.
308 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
310 From Robin Getz <robin.getz@analog.com>
311 * bfin-dis.c (bu32): Typedef.
312 (enum const_forms_t): Add c_uimm32 and c_huimm32.
313 (constant_formats[]): Add uimm32 and huimm16.
318 (luimm16_val): Define.
319 (struct saved_state): Define.
320 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
321 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
322 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
324 (decode_LDIMMhalf_0): Print out the whole register value.
326 From Jie Zhang <jie.zhang@analog.com>
327 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
328 multiply and multiply-accumulate to data register instruction.
330 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
331 c_imm32, c_huimm32e): Define.
332 (constant_formats): Add flags for printing decimal, leading spaces, and
334 (comment, parallel): Add global flags in all disassembly.
335 (fmtconst): Take advantage of new flags, and print default in hex.
336 (fmtconst_val): Likewise.
337 (decode_macfunc): Be consistant with spaces, tabs, comments,
338 capitalization in disassembly, fix minor coding style issues.
339 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
340 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
341 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
342 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
343 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
344 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
345 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
346 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
347 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
348 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
349 _print_insn_bfin, print_insn_bfin): Likewise.
351 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
353 * aclocal.m4: Regenerate.
354 * configure: Likewise.
355 * Makefile.in: Likewise.
357 2008-03-13 Alan Modra <amodra@bigpond.net.au>
359 * Makefile.am: Run "make dep-am".
360 * Makefile.in: Regenerate.
361 * configure: Regenerate.
363 2008-03-07 Alan Modra <amodra@bigpond.net.au>
365 * ppc-opc.c (powerpc_opcodes): Order and format.
367 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
369 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
370 * i386-tbl.h: Regenerated.
372 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
374 * i386-opc.tbl: Disallow 16-bit near indirect branches for
376 * i386-tbl.h: Regenerated.
378 2008-02-21 Jan Beulich <jbeulich@novell.com>
380 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
381 and Fword for far indirect jmp. Allow Reg16 and Word for near
382 indirect jmp on x86-64. Disallow Fword for lcall.
383 * i386-tbl.h: Re-generate.
385 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
387 * cr16-opc.c (cr16_num_optab): Defined
389 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
391 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
392 * i386-init.h: Regenerated.
394 2008-02-14 Nick Clifton <nickc@redhat.com>
397 * configure.in (SHARED_LIBADD): Select the correct host specific
398 file extension for shared libraries.
399 * configure: Regenerate.
401 2008-02-13 Jan Beulich <jbeulich@novell.com>
403 * i386-opc.h (RegFlat): New.
404 * i386-reg.tbl (flat): Add.
405 * i386-tbl.h: Re-generate.
407 2008-02-13 Jan Beulich <jbeulich@novell.com>
409 * i386-dis.c (a_mode): New.
410 (cond_jump_mode): Adjust.
411 (Ma): Change to a_mode.
412 (intel_operand_size): Handle a_mode.
413 * i386-opc.tbl: Allow Dword and Qword for bound.
414 * i386-tbl.h: Re-generate.
416 2008-02-13 Jan Beulich <jbeulich@novell.com>
418 * i386-gen.c (process_i386_registers): Process new fields.
419 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
420 unsigned char. Add dw2_regnum and Dw2Inval.
421 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
423 * i386-tbl.h: Re-generate.
425 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
427 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
428 * i386-init.h: Updated.
430 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
432 * i386-gen.c (cpu_flags): Add CpuXsave.
434 * i386-opc.h (CpuXsave): New.
436 (i386_cpu_flags): Add cpuxsave.
438 * i386-dis.c (MOD_0FAE_REG_4): New.
439 (RM_0F01_REG_2): Likewise.
440 (MOD_0FAE_REG_5): Updated.
441 (RM_0F01_REG_3): Likewise.
442 (reg_table): Use MOD_0FAE_REG_4.
443 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
445 (rm_table): Add RM_0F01_REG_2.
447 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
448 * i386-init.h: Regenerated.
449 * i386-tbl.h: Likewise.
451 2008-02-11 Jan Beulich <jbeulich@novell.com>
453 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
454 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
455 * i386-tbl.h: Re-generate.
457 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
460 * configure: Regenerated.
462 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
464 * mips-dis.c: Update copyright.
465 (mips_arch_choices): Add Octeon.
466 * mips-opc.c: Update copyright.
468 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
470 2008-01-29 Alan Modra <amodra@bigpond.net.au>
472 * ppc-opc.c: Support optional L form mtmsr.
474 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
476 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
478 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
480 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
481 * i386-init.h: Regenerated.
483 2008-01-23 Tristan Gingold <gingold@adacore.com>
485 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
486 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
488 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
490 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
491 (cpu_flags): Likewise.
493 * i386-opc.h (CpuMMX2): Removed.
496 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
497 * i386-init.h: Regenerated.
498 * i386-tbl.h: Likewise.
500 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
502 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
504 * i386-init.h: Regenerated.
506 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
508 * i386-opc.tbl: Use Qword on movddup.
509 * i386-tbl.h: Regenerated.
511 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
513 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
514 * i386-tbl.h: Regenerated.
516 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
518 * i386-dis.c (Mx): New.
519 (PREFIX_0FC3): Likewise.
520 (PREFIX_0FC7_REG_6): Updated.
521 (dis386_twobyte): Use PREFIX_0FC3.
522 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
523 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
526 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
528 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
529 (operand_types): Add Mem.
531 * i386-opc.h (IntelSyntax): New.
532 * i386-opc.h (Mem): New.
534 (Opcode_Modifier_Max): Updated.
535 (i386_opcode_modifier): Add intelsyntax.
536 (i386_operand_type): Add mem.
538 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
541 * i386-reg.tbl: Add size for accumulator.
543 * i386-init.h: Regenerated.
544 * i386-tbl.h: Likewise.
546 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
548 * i386-opc.h (Byte): Fix a typo.
550 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
553 * i386-gen.c (operand_type_init): Add Dword to
554 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
555 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
557 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
558 Xmmword, Unspecified and Anysize.
559 (set_bitfield): Make Mmword an alias of Qword. Make Oword
562 * i386-opc.h (CheckSize): Removed.
570 (i386_opcode_modifier): Remove checksize, byte, word, dword,
574 (Unspecified): Likewise.
576 (i386_operand_type): Add byte, word, dword, fword, qword,
577 tbyte xmmword, unspecified and anysize.
579 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
580 Tbyte, Xmmword, Unspecified and Anysize.
582 * i386-reg.tbl: Add size for accumulator.
584 * i386-init.h: Regenerated.
585 * i386-tbl.h: Likewise.
587 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
589 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
591 (reg_table): Updated.
592 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
593 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
595 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
597 * i386-gen.c (set_bitfield): Use fail () on error.
599 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
601 * i386-gen.c (lineno): New.
602 (filename): Likewise.
603 (set_bitfield): Report filename and line numer on error.
604 (process_i386_opcodes): Set filename and update lineno.
605 (process_i386_registers): Likewise.
607 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
609 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
612 * i386-opc.h (IntelMnemonic): Renamed to ..
614 (Opcode_Modifier_Max): Updated.
615 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
618 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
619 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
620 * i386-tbl.h: Regenerated.
622 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
624 * i386-gen.c: Update copyright to 2008.
625 * i386-opc.h: Likewise.
626 * i386-opc.tbl: Likewise.
628 * i386-init.h: Regenerated.
629 * i386-tbl.h: Likewise.
631 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
633 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
634 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
635 * i386-tbl.h: Regenerated.
637 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
639 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
641 (cpu_flags): Likewise.
643 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
644 (CpuSSE4_2_Or_ABM): Likewise.
646 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
648 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
649 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
650 and CpuPadLock, respectively.
651 * i386-init.h: Regenerated.
652 * i386-tbl.h: Likewise.
654 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
656 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
658 * i386-opc.h (No_xSuf): Removed.
659 (CheckSize): Updated.
661 * i386-tbl.h: Regenerated.
663 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
665 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
666 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
668 (cpu_flags): Add CpuSSE4_2_Or_ABM.
670 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
672 (i386_cpu_flags): Add cpusse4_2_or_abm.
674 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
675 CpuABM|CpuSSE4_2 on popcnt.
676 * i386-init.h: Regenerated.
677 * i386-tbl.h: Likewise.
679 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
681 * i386-opc.h: Update comments.
683 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
685 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
686 * i386-opc.h: Likewise.
687 * i386-opc.tbl: Likewise.
689 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
692 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
693 Byte, Word, Dword, QWord and Xmmword.
695 * i386-opc.h (No_xSuf): New.
696 (CheckSize): Likewise.
703 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
704 Dword, QWord and Xmmword.
706 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
708 * i386-tbl.h: Regenerated.
710 2008-01-02 Mark Kettenis <kettenis@gnu.org>
712 * m88k-dis.c (instructions): Fix fcvt.* instructions.
715 For older changes see ChangeLog-2007
721 version-control: never