1 2012-03-16 Alan Modra <amodra@gmail.com>
3 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
4 (powerpc_opcd_indices): Bump array size.
5 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
6 corresponding to unused opcodes to following entry.
7 (lookup_powerpc): New function, extracted and optimised from..
8 (print_insn_powerpc): ..here.
10 2012-03-15 Alan Modra <amodra@gmail.com>
11 James Lemke <jwlemke@codesourcery.com>
13 * disassemble.c (disassemble_init_for_target): Handle ppc init.
14 * ppc-dis.c (private): New var.
15 (powerpc_init_dialect): Don't return calloc failure, instead use
17 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
18 (powerpc_opcd_indices): New array.
19 (disassemble_init_powerpc): New function.
20 (print_insn_big_powerpc): Don't init dialect here.
21 (print_insn_little_powerpc): Likewise.
22 (print_insn_powerpc): Start search using powerpc_opcd_indices.
24 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
26 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
27 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
28 (PPCVEC2, PPCTMR, E6500): New short names.
29 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
30 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
31 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
32 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
33 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
34 optional operands on sync instruction for E6500 target.
36 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
38 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
40 2012-02-27 Alan Modra <amodra@gmail.com>
42 * mt-dis.c: Regenerate.
44 2012-02-27 Alan Modra <amodra@gmail.com>
46 * v850-opc.c (extract_v8): Rearrange to make it obvious this
47 is the inverse of corresponding insert function.
48 (extract_d22, extract_u9, extract_r4): Likewise.
49 (extract_d9): Correct sign extension.
50 (extract_d16_15): Don't assume "long" is 32 bits, and don't
51 rely on implementation defined behaviour for shift right of
53 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
54 (extract_d23): Likewise, and correct mask.
56 2012-02-27 Alan Modra <amodra@gmail.com>
58 * crx-dis.c (print_arg): Mask constant to 32 bits.
59 * crx-opc.c (cst4_map): Use int array.
61 2012-02-27 Alan Modra <amodra@gmail.com>
63 * arc-dis.c (BITS): Don't use shifts to mask off bits.
64 (FIELDD): Sign extend with xor,sub.
66 2012-02-25 Walter Lee <walt@tilera.com>
68 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
69 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
70 TILEPRO_OPC_LW_TLS_SN.
72 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
74 * i386-opc.h (HLEPrefixNone): New.
75 (HLEPrefixLock): Likewise.
76 (HLEPrefixAny): Likewise.
77 (HLEPrefixRelease): Likewise.
79 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
81 * i386-dis.c (HLE_Fixup1): New.
82 (HLE_Fixup2): Likewise.
83 (HLE_Fixup3): Likewise.
90 (MOD_C6_REG_7): Likewise.
91 (MOD_C7_REG_7): Likewise.
92 (RM_C6_REG_7): Likewise.
93 (RM_C7_REG_7): Likewise.
94 (XACQUIRE_PREFIX): Likewise.
95 (XRELEASE_PREFIX): Likewise.
96 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
97 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
98 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
99 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
100 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
101 MOD_C6_REG_7 and MOD_C7_REG_7.
102 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
103 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
105 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
106 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
108 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
110 (cpu_flags): Add CpuHLE and CpuRTM.
111 (opcode_modifiers): Add HLEPrefixOk.
113 * i386-opc.h (CpuHLE): New.
115 (HLEPrefixOk): Likewise.
116 (i386_cpu_flags): Add cpuhle and cpurtm.
117 (i386_opcode_modifier): Add hleprefixok.
119 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
120 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
121 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
122 operand. Add xacquire, xrelease, xabort, xbegin, xend and
124 * i386-init.h: Regenerated.
125 * i386-tbl.h: Likewise.
127 2012-01-24 DJ Delorie <dj@redhat.com>
129 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
130 * rl78-decode.c: Regenerate.
132 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
135 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
137 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
139 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
140 register and move them after pmove with PSR/PCSR register.
142 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
144 * i386-dis.c (mod_table): Add vmfunc.
146 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
147 (cpu_flags): CpuVMFUNC.
149 * i386-opc.h (CpuVMFUNC): New.
150 (i386_cpu_flags): Add cpuvmfunc.
152 * i386-opc.tbl: Add vmfunc.
153 * i386-init.h: Regenerated.
154 * i386-tbl.h: Likewise.
156 For older changes see ChangeLog-2011
162 version-control: never