1 2012-11-29 Roland McGrath <mcgrathr@google.com>
3 * s390-mkopc.c (file_header): Add const.
5 2012-11-29 David Holsgrove <david.holsgrove@xilinx.com>
7 * microblaze-opc.h: Rename INST_TYPE_RD_R1_SPECIAL to
8 INST_TYPE_R1_R2_SPECIAL
9 * microblaze-dis.c (print_insn_microblaze): Same.
11 2012-11-23 Alan Modra <amodra@gmail.com>
13 * ppc-dis.c (ppc_parse_cpu): Add "sticky" param. Track bits
14 set from ppc_opts.sticky in it. Delete "retain_mask".
15 (powerpc_init_dialect): Choose default dialect from info->mach
16 before parsing -M options. Handle more bfd_mach_ppc variants.
17 Update common default to power7.
19 2012-11-21 David Holsgrove <david.holsgrove@xilinx.com>
21 * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
22 * microblaze-opcm.h (microblaze_instr): Likewise
24 2012-11-21 Edgar E. Iglesias <edgar.iglesias@gmail.com>
26 * microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
27 * microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
29 2012-11-20 Kirill Yukhin <kirill.yukhin@intel.com>
30 H.J. Lu <hongjiu.lu@intel.com>
33 * i386-opc.tbl: Fix opcode for 64-bit jecxz.
34 * i386-tbl.h: Regenerated.
36 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
38 * s390-opc.txt: Fix srstu and strag opcodes.
40 2012-11-14 David Holsgrove <david.holsgrove@xilinx.com>
42 * microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
43 update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
44 and increase MAX_OPCODES.
45 (op_code_struct): add mbar and sleep
46 * microblaze-opcm.h (microblaze_instr): add mbar
47 Define IMM_MBAR and IMM5_MBAR_MASK
48 * microblaze-dis.c: Add get_field_imm5_mbar
49 (print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
51 2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
53 * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn
54 * microblaze-opcm.h (microblaze_instr): add clz
56 2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
58 * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur,
59 lhur, lwr, sbr, shr, swr
60 * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
63 2012-11-09 Nick Clifton <nickc@redhat.com>
65 * configure.in: Add bfd_v850_rh850_arch.
66 * configure: Regenerate.
67 * disassemble.c (disassembler): Likewise.
69 2012-11-09 H.J. Lu <hongjiu.lu@intel.com>
71 * aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
72 * ia64-gen.c (fetch_insn_class): Likewise.
74 2012-11-08 Alan Modra <amodra@gmail.com>
76 * po/POTFILES.in: Regenerate.
78 2012-11-05 Alan Modra <amodra@gmail.com>
80 * configure.in: Apply 2012-09-10 change to config.in here.
82 2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
84 * s390-mkopc.c: Accept empty lines in s390-opc.txt.
85 * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
87 * s390-opc.txt: Add new instructions. New instruction type for lptea.
89 2012-10-26 Christian Groessler <chris@groessler.org>
91 * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
92 trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
93 non-existing opcode trtrb.
94 * z8k-opc.h: Regenerate.
96 2012-10-26 Alan Modra <amodra@gmail.com>
98 * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
100 2012-10-24 Roland McGrath <mcgrathr@google.com>
102 * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
105 2012-10-22 Peter Bergner <bergner@vnet.ibm.com>
107 * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
109 2012-10-18 Tom Tromey <tromey@redhat.com>
111 * tic54x-dis.c (print_instruction): Don't use K&R style.
112 (print_parallel_instruction, sprint_dual_address)
113 (sprint_indirect_address, sprint_direct_address, sprint_mmr)
114 (sprint_cc2, sprint_condition): Likewise.
116 2012-10-18 Kai Tietz <ktietz@redhat.com>
118 * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
119 value with a default.
120 (do_special_encoding): Likewise.
121 (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
122 variables with default.
123 * arc-dis.c (write_comments_): Don't use strncat due
124 size of state->commentBuffer pointer isn't predictable.
126 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
128 * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
129 rmr_el3; remove daifset and daifclr.
131 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
133 * aarch64-opc.c (operand_general_constraint_met_p): Change to check
134 the alignment of addr.offset.imm instead of that of shifter.amount for
135 operand type AARCH64_OPND_ADDR_UIMM12.
137 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
139 * arm-dis.c: Use preferred form of vrint instruction variants
142 2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
144 * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
145 * i386-init.h: Regenerated.
147 2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
149 * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
150 * ppc-opc.c (VBA): New define.
151 (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
152 mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
154 2012-10-04 Nick Clifton <nickc@redhat.com>
156 * v850-dis.c (disassemble): Place square parentheses around second
157 register operand of clr1, not1, set1 and tst1 instructions.
159 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
161 * s390-mkopc.c: Support new option zEC12.
162 * s390-opc.c: Add new instruction formats.
163 * s390-opc.txt: Add new instructions for zEC12.
165 2012-09-27 Anthony Green <green@moxielogic.com>
167 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
168 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
170 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
172 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
173 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
174 and CPU_BTVER2_FLAGS.
175 * i386-init.h: Regenerated.
177 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
179 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
180 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
181 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
182 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
183 (cpu_flags): Add CpuCX16.
184 * i386-opc.h (CpuCX16): New.
185 (i386_cpu_flags): Add cpucx16.
186 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
187 * i386-tbl.h: Regenerate.
188 * i386-init.h: Likewise.
190 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
192 * arm-dis.c: Changed ldra and strl-form mnemonics
195 2012-09-18 Chao-ying Fu <fu@mips.com>
197 * micromips-opc.c (micromips_opcodes): Correct the encoding of
198 the "swxc1" instruction.
200 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
202 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
203 the parameter 'inst'.
204 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
205 (convert_mov_to_movewide): Change to assert (0) when
206 aarch64_wide_constant_p returns FALSE.
208 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
210 * configure: Regenerate.
212 2012-09-14 Anthony Green <green@moxielogic.com>
214 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
215 the address after the branch instruction.
217 2012-09-13 Anthony Green <green@moxielogic.com>
219 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
221 2012-09-10 Matthias Klose <doko@ubuntu.com>
223 * config.in: Disable sanity check for kfreebsd.
225 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
227 * configure: Regenerated.
229 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
231 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
232 * ia64-gen.c: Promote completer index type to longlong.
233 (irf_operand): Add new register recognition.
234 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
235 (lookup_specifier): Add new resource recognition.
236 (insert_bit_table_ent): Relax abort condition according to the
237 changed completer index type.
238 (print_dis_table): Fix printf format for completer index.
239 * ia64-ic.tbl: Add a new instruction class.
240 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
241 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
242 * ia64-opc.h: Define short names for new operand types.
243 * ia64-raw.tbl: Add new RAW resource for DAHR register.
244 * ia64-waw.tbl: Add new WAW resource for DAHR register.
245 * ia64-asmtab.c: Regenerate.
247 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
249 * ppc-opc.c (VXASHB_MASK): New define.
250 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
252 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
254 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
255 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
256 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
257 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
258 vupklsh>: Use VXVA_MASK.
259 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
260 <mfvscr>: Use VXVAVB_MASK.
261 <mtvscr>: Use VXVDVA_MASK.
262 <vspltb>: Use VXUIMM4_MASK.
263 <vsplth>: Use VXUIMM3_MASK.
264 <vspltw>: Use VXUIMM2_MASK.
266 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
268 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
270 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
272 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
274 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
276 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
278 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
280 * arm-dis.c (neon_opcodes): Add support for AES instructions.
282 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
284 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
287 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
289 * arm-dis.c (coprocessor_opcodes): Add VRINT.
290 (neon_opcodes): Likewise.
292 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
294 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
296 (neon_opcodes): Likewise.
298 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
300 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
301 (neon_opcodes): Likewise.
303 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
305 * arm-dis.c (coprocessor_opcodes): Add VSEL.
306 (print_insn_coprocessor): Add new %<>c bitfield format
309 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
311 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
312 (thumb32_opcodes): Likewise.
313 (print_arm_insn): Add support for %<>T formatter.
315 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
317 * arm-dis.c (arm_opcodes): Add HLT.
318 (thumb_opcodes): Likewise.
320 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
322 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
324 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
326 * arm-dis.c (arm_opcodes): Add SEVL.
327 (thumb_opcodes): Likewise.
328 (thumb32_opcodes): Likewise.
330 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
332 * arm-dis.c (data_barrier_option): New function.
333 (print_insn_arm): Use data_barrier_option.
334 (print_insn_thumb32): Use data_barrier_option.
336 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
338 * arm-dis.c (COND_UNCOND): New constant.
339 (print_insn_coprocessor): Add support for %u format specifier.
340 (print_insn_neon): Likewise.
342 2012-08-21 David S. Miller <davem@davemloft.net>
344 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
347 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
349 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
350 vabsduh, vabsduw, mviwsplt.
352 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
354 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
357 * i386-opc.h: Update CpuPRFCHW comment.
359 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
360 * i386-init.h: Regenerated.
361 * i386-tbl.h: Likewise.
363 2012-08-17 Nick Clifton <nickc@redhat.com>
365 * po/uk.po: New Ukranian translation.
366 * configure.in (ALL_LINGUAS): Add uk.
367 * configure: Regenerate.
369 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
371 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
372 RBX for the third operand.
373 <"lswi">: Use RAX for second and NBI for the third operand.
375 2012-08-15 DJ Delorie <dj@redhat.com>
377 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
378 operands, so that data addresses can be corrected when not
380 * rl78-decode.c: Regenerate.
381 * rl78-dis.c (print_insn_rl78): Make order of modifiers
382 irrelevent. When the 'e' specifier is used on an operand and no
383 ES prefix is provided, adjust address to make it absolute.
385 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
387 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
389 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
391 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
393 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
395 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
396 macros, use local variables for info struct member accesses,
397 update the type of the variable used to hold the instruction
399 (print_insn_mips, print_mips16_insn_arg): Likewise.
400 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
401 local variables for info struct member accesses.
402 (print_insn_micromips): Add GET_OP_S local macro.
403 (_print_insn_mips): Update the type of the variable used to hold
404 the instruction word.
406 2012-08-13 Ian Bolton <ian.bolton@arm.com>
407 Laurent Desnogues <laurent.desnogues@arm.com>
408 Jim MacArthur <jim.macarthur@arm.com>
409 Marcus Shawcroft <marcus.shawcroft@arm.com>
410 Nigel Stephens <nigel.stephens@arm.com>
411 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
412 Richard Earnshaw <rearnsha@arm.com>
413 Sofiane Naci <sofiane.naci@arm.com>
414 Tejas Belagod <tejas.belagod@arm.com>
415 Yufeng Zhang <yufeng.zhang@arm.com>
417 * Makefile.am: Add AArch64.
418 * Makefile.in: Regenerate.
419 * aarch64-asm.c: New file.
420 * aarch64-asm.h: New file.
421 * aarch64-dis.c: New file.
422 * aarch64-dis.h: New file.
423 * aarch64-gen.c: New file.
424 * aarch64-opc.c: New file.
425 * aarch64-opc.h: New file.
426 * aarch64-tbl.h: New file.
427 * configure.in: Add AArch64.
428 * configure: Regenerate.
429 * disassemble.c: Add AArch64.
430 * aarch64-asm-2.c: New file (automatically generated).
431 * aarch64-dis-2.c: New file (automatically generated).
432 * aarch64-opc-2.c: New file (automatically generated).
433 * po/POTFILES.in: Regenerate.
435 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
437 * micromips-opc.c (micromips_opcodes): Update comment.
438 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
439 instructions for IOCT as appropriate.
440 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
442 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
443 the result of a check for the -Wno-missing-field-initializers
445 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
446 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
448 (mips16-opc.lo): Likewise.
449 (micromips-opc.lo): Likewise.
450 * aclocal.m4: Regenerate.
451 * configure: Regenerate.
452 * Makefile.in: Regenerate.
454 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
457 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
458 * i386-init.h: Regenerated.
460 2012-08-09 Nick Clifton <nickc@redhat.com>
462 * po/vi.po: Updated Vietnamese translation.
464 2012-08-07 Roland McGrath <mcgrathr@google.com>
466 * i386-dis.c (reg_table): Fill out REG_0F0D table with
467 AMD-reserved cases as "prefetch".
468 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
469 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
470 (reg_table): Use those under REG_0F18.
471 (mod_table): Add those cases as "nop/reserved".
473 2012-08-07 Jan Beulich <jbeulich@suse.com>
475 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
477 2012-08-06 Roland McGrath <mcgrathr@google.com>
479 * i386-dis.c (print_insn): Print spaces between multiple excess
480 prefixes. Return actual number of excess prefixes consumed,
483 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
485 2012-08-06 Roland McGrath <mcgrathr@google.com>
486 Victor Khimenko <khim@google.com>
487 H.J. Lu <hongjiu.lu@intel.com>
489 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
490 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
491 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
492 (OP_E_register): Likewise.
493 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
495 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
497 * configure.in: Formatting.
498 * configure: Regenerate.
500 2012-08-01 Alan Modra <amodra@gmail.com>
502 * h8300-dis.c: Fix printf arg warnings.
503 * i960-dis.c: Likewise.
504 * mips-dis.c: Likewise.
505 * pdp11-dis.c: Likewise.
506 * sh-dis.c: Likewise.
507 * v850-dis.c: Likewise.
508 * configure.in: Formatting.
509 * configure: Regenerate.
510 * rl78-decode.c: Regenerate.
511 * po/POTFILES.in: Regenerate.
513 2012-07-31 Chao-Ying Fu <fu@mips.com>
514 Catherine Moore <clm@codesourcery.com>
515 Maciej W. Rozycki <macro@codesourcery.com>
517 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
518 (DSP_VOLA): Likewise.
519 (D32, D33): Likewise.
520 (micromips_opcodes): Add DSP ASE instructions.
521 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
522 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
524 2012-07-31 Jan Beulich <jbeulich@suse.com>
526 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
527 instruction group. Mark as requiring AVX2.
528 * i386-tbl.h: Re-generate.
530 2012-07-30 Nick Clifton <nickc@redhat.com>
532 * po/opcodes.pot: Updated template.
533 * po/es.po: Updated Spanish translation.
534 * po/fi.po: Updated Finnish translation.
536 2012-07-27 Mike Frysinger <vapier@gentoo.org>
538 * configure.in (BFD_VERSION): Run bfd/configure --version and
539 parse the output of that.
540 * configure: Regenerate.
542 2012-07-25 James Lemke <jwlemke@codesourcery.com>
544 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
546 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
547 Dr David Alan Gilbert <dave@treblig.org>
550 * arm-dis.c: Add necessary casts for printing integer values.
551 Use %s when printing string values.
552 * hppa-dis.c: Likewise.
553 * m68k-dis.c: Likewise.
554 * microblaze-dis.c: Likewise.
555 * mips-dis.c: Likewise.
556 * sparc-dis.c: Likewise.
558 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
561 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
562 (VEX_LEN_0FXOP_08_CD): Likewise.
563 (VEX_LEN_0FXOP_08_CE): Likewise.
564 (VEX_LEN_0FXOP_08_CF): Likewise.
565 (VEX_LEN_0FXOP_08_EC): Likewise.
566 (VEX_LEN_0FXOP_08_ED): Likewise.
567 (VEX_LEN_0FXOP_08_EE): Likewise.
568 (VEX_LEN_0FXOP_08_EF): Likewise.
569 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
570 vpcomub, vpcomuw, vpcomud, vpcomuq.
571 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
572 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
573 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
576 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
578 * i386-dis.c (PREFIX_0F38F6): New.
579 (prefix_table): Add adcx, adox instructions.
580 (three_byte_table): Use PREFIX_0F38F6.
581 (mod_table): Add rdseed instruction.
582 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
583 (cpu_flags): Likewise.
584 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
585 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
586 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
588 * i386-tbl.h: Regenerate.
589 * i386-init.h: Likewise.
591 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
593 * mips-dis.c: Remove gratuitous newline.
595 2012-07-05 Sean Keys <skeys@ipdatasys.com>
597 * xgate-dis.c: Removed an IF statement that will
598 always be false due to overlapping operand masks.
599 * xgate-opc.c: Corrected 'com' opcode entry and
602 2012-07-02 Roland McGrath <mcgrathr@google.com>
604 * i386-opc.tbl: Add RepPrefixOk to nop.
605 * i386-tbl.h: Regenerate.
607 2012-06-28 Nick Clifton <nickc@redhat.com>
609 * po/vi.po: Updated Vietnamese translation.
611 2012-06-22 Roland McGrath <mcgrathr@google.com>
613 * i386-opc.tbl: Add RepPrefixOk to ret.
614 * i386-tbl.h: Regenerate.
616 * i386-opc.h (RepPrefixOk): New enum constant.
617 (i386_opcode_modifier): New bitfield 'repprefixok'.
618 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
619 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
620 instructions that have IsString.
621 * i386-tbl.h: Regenerate.
623 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
625 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
626 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
627 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
628 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
629 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
630 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
631 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
632 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
633 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
635 2012-05-19 Alan Modra <amodra@gmail.com>
637 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
638 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
640 2012-05-18 Alan Modra <amodra@gmail.com>
642 * ia64-opc.c: Remove #include "ansidecl.h".
643 * z8kgen.c: Include sysdep.h first.
645 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
646 * bfin-dis.c: Likewise.
647 * i860-dis.c: Likewise.
648 * ia64-dis.c: Likewise.
649 * ia64-gen.c: Likewise.
650 * m68hc11-dis.c: Likewise.
651 * mmix-dis.c: Likewise.
652 * msp430-dis.c: Likewise.
653 * or32-dis.c: Likewise.
654 * rl78-dis.c: Likewise.
655 * rx-dis.c: Likewise.
656 * tic4x-dis.c: Likewise.
657 * tilegx-opc.c: Likewise.
658 * tilepro-opc.c: Likewise.
659 * rx-decode.c: Regenerate.
661 2012-05-17 James Lemke <jwlemke@codesourcery.com>
663 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
665 2012-05-17 James Lemke <jwlemke@codesourcery.com>
667 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
669 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
670 Nick Clifton <nickc@redhat.com>
673 * configure.in: Add check that sysdep.h has been included before
674 any system header files.
675 * configure: Regenerate.
676 * config.in: Regenerate.
677 * sysdep.h: Generate an error if included before config.h.
678 * alpha-opc.c: Include sysdep.h before any other header file.
679 * alpha-dis.c: Likewise.
680 * avr-dis.c: Likewise.
681 * cgen-opc.c: Likewise.
682 * cr16-dis.c: Likewise.
683 * cris-dis.c: Likewise.
684 * crx-dis.c: Likewise.
685 * d10v-dis.c: Likewise.
686 * d10v-opc.c: Likewise.
687 * d30v-dis.c: Likewise.
688 * d30v-opc.c: Likewise.
689 * h8500-dis.c: Likewise.
690 * i370-dis.c: Likewise.
691 * i370-opc.c: Likewise.
692 * m10200-dis.c: Likewise.
693 * m10300-dis.c: Likewise.
694 * micromips-opc.c: Likewise.
695 * mips-opc.c: Likewise.
696 * mips61-opc.c: Likewise.
697 * moxie-dis.c: Likewise.
698 * or32-opc.c: Likewise.
699 * pj-dis.c: Likewise.
700 * ppc-dis.c: Likewise.
701 * ppc-opc.c: Likewise.
702 * s390-dis.c: Likewise.
703 * sh-dis.c: Likewise.
704 * sh64-dis.c: Likewise.
705 * sparc-dis.c: Likewise.
706 * sparc-opc.c: Likewise.
707 * spu-dis.c: Likewise.
708 * tic30-dis.c: Likewise.
709 * tic54x-dis.c: Likewise.
710 * tic80-dis.c: Likewise.
711 * tic80-opc.c: Likewise.
712 * tilegx-dis.c: Likewise.
713 * tilepro-dis.c: Likewise.
714 * v850-dis.c: Likewise.
715 * v850-opc.c: Likewise.
716 * vax-dis.c: Likewise.
717 * w65-dis.c: Likewise.
718 * xgate-dis.c: Likewise.
719 * xtensa-dis.c: Likewise.
720 * rl78-decode.opc: Likewise.
721 * rl78-decode.c: Regenerate.
722 * rx-decode.opc: Likewise.
723 * rx-decode.c: Regenerate.
725 2012-05-17 Alan Modra <amodra@gmail.com>
727 * ppc_dis.c: Don't include elf/ppc.h.
729 2012-05-16 Meador Inge <meadori@codesourcery.com>
731 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
734 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
735 Stephane Carrez <stcarrez@nerim.fr>
737 * configure.in: Add S12X and XGATE co-processor support to m68hc11
739 * disassemble.c: Likewise.
740 * configure: Regenerate.
741 * m68hc11-dis.c: Make objdump output more consistent, use hex
742 instead of decimal and use 0x prefix for hex.
743 * m68hc11-opc.c: Add S12X and XGATE opcodes.
745 2012-05-14 James Lemke <jwlemke@codesourcery.com>
747 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
748 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
749 (vle_opcd_indices): New array.
750 (lookup_vle): New function.
751 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
752 (print_insn_powerpc): Likewise.
753 * ppc-opc.c: Likewise.
755 2012-05-14 Catherine Moore <clm@codesourcery.com>
756 Maciej W. Rozycki <macro@codesourcery.com>
757 Rhonda Wittels <rhonda@codesourcery.com>
758 Nathan Froyd <froydnj@codesourcery.com>
760 * ppc-opc.c (insert_arx, extract_arx): New functions.
761 (insert_ary, extract_ary): New functions.
762 (insert_li20, extract_li20): New functions.
763 (insert_rx, extract_rx): New functions.
764 (insert_ry, extract_ry): New functions.
765 (insert_sci8, extract_sci8): New functions.
766 (insert_sci8n, extract_sci8n): New functions.
767 (insert_sd4h, extract_sd4h): New functions.
768 (insert_sd4w, extract_sd4w): New functions.
769 (insert_vlesi, extract_vlesi): New functions.
770 (insert_vlensi, extract_vlensi): New functions.
771 (insert_vleui, extract_vleui): New functions.
772 (insert_vleil, extract_vleil): New functions.
773 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
774 (BI16, BI32, BO32, B8): New.
775 (B15, B24, CRD32, CRS): New.
776 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
777 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
778 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
779 (SH6_MASK): Use PPC_OPSHIFT_INV.
780 (SI8, UI5, OIMM5, UI7, BO16): New.
781 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
782 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
784 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
785 (OPVUP, OPVUP_MASK OPVUP): New
786 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
787 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
788 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
789 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
790 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
791 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
792 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
793 (SE_IM5, SE_IM5_MASK): New.
794 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
795 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
796 (BO32DNZ, BO32DZ): New.
797 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
799 (powerpc_opcodes): Add new VLE instructions. Update existing
800 instruction to include PPCVLE if supported.
801 * ppc-dis.c (ppc_opts): Add vle entry.
802 (get_powerpc_dialect): New function.
803 (powerpc_init_dialect): VLE support.
804 (print_insn_big_powerpc): Call get_powerpc_dialect.
805 (print_insn_little_powerpc): Likewise.
806 (operand_value_powerpc): Handle negative shift counts.
807 (print_insn_powerpc): Handle 2-byte instruction lengths.
809 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
812 * configure.in: Invoke ACX_HEADER_STRING.
813 * configure: Regenerate.
814 * config.in: Regenerate.
815 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
816 string.h and strings.h.
818 2012-05-11 Nick Clifton <nickc@redhat.com>
821 * arm-dis.c (print_insn): Fix detection of instruction mode in
822 files containing multiple executable sections.
824 2012-05-03 Sean Keys <skeys@ipdatasys.com>
826 * Makefile.in, configure: regenerate
827 * disassemble.c (disassembler): Recognize ARCH_XGATE.
828 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
830 * configure.in: Recognize xgate.
831 * xgate-dis.c, xgate-opc.c: New files for support of xgate
832 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
833 and opcode generation for xgate.
835 2012-04-30 DJ Delorie <dj@redhat.com>
837 * rx-decode.opc (MOV): Do not sign-extend immediates which are
838 already the maximum bit size.
839 * rx-decode.c: Regenerate.
841 2012-04-27 David S. Miller <davem@davemloft.net>
843 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
844 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
846 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
847 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
849 * sparc-opc.c (CBCOND): New define.
850 (CBCOND_XCC): Likewise.
851 (cbcond): New helper macro.
852 (sparc_opcodes): Add compare-and-branch instructions.
854 * sparc-dis.c (print_insn_sparc): Handle ')'.
855 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
857 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
858 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
860 2012-04-12 David S. Miller <davem@davemloft.net>
862 * sparc-dis.c (X_DISP10): Define.
863 (print_insn_sparc): Handle '='.
865 2012-04-01 Mike Frysinger <vapier@gentoo.org>
867 * bfin-dis.c (fmtconst): Replace decimal handling with a single
868 sprintf call and the '*' field width.
870 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
872 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
874 2012-03-16 Alan Modra <amodra@gmail.com>
876 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
877 (powerpc_opcd_indices): Bump array size.
878 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
879 corresponding to unused opcodes to following entry.
880 (lookup_powerpc): New function, extracted and optimised from..
881 (print_insn_powerpc): ..here.
883 2012-03-15 Alan Modra <amodra@gmail.com>
884 James Lemke <jwlemke@codesourcery.com>
886 * disassemble.c (disassemble_init_for_target): Handle ppc init.
887 * ppc-dis.c (private): New var.
888 (powerpc_init_dialect): Don't return calloc failure, instead use
890 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
891 (powerpc_opcd_indices): New array.
892 (disassemble_init_powerpc): New function.
893 (print_insn_big_powerpc): Don't init dialect here.
894 (print_insn_little_powerpc): Likewise.
895 (print_insn_powerpc): Start search using powerpc_opcd_indices.
897 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
899 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
900 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
901 (PPCVEC2, PPCTMR, E6500): New short names.
902 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
903 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
904 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
905 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
906 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
907 optional operands on sync instruction for E6500 target.
909 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
911 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
913 2012-02-27 Alan Modra <amodra@gmail.com>
915 * mt-dis.c: Regenerate.
917 2012-02-27 Alan Modra <amodra@gmail.com>
919 * v850-opc.c (extract_v8): Rearrange to make it obvious this
920 is the inverse of corresponding insert function.
921 (extract_d22, extract_u9, extract_r4): Likewise.
922 (extract_d9): Correct sign extension.
923 (extract_d16_15): Don't assume "long" is 32 bits, and don't
924 rely on implementation defined behaviour for shift right of
926 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
927 (extract_d23): Likewise, and correct mask.
929 2012-02-27 Alan Modra <amodra@gmail.com>
931 * crx-dis.c (print_arg): Mask constant to 32 bits.
932 * crx-opc.c (cst4_map): Use int array.
934 2012-02-27 Alan Modra <amodra@gmail.com>
936 * arc-dis.c (BITS): Don't use shifts to mask off bits.
937 (FIELDD): Sign extend with xor,sub.
939 2012-02-25 Walter Lee <walt@tilera.com>
941 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
942 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
943 TILEPRO_OPC_LW_TLS_SN.
945 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
947 * i386-opc.h (HLEPrefixNone): New.
948 (HLEPrefixLock): Likewise.
949 (HLEPrefixAny): Likewise.
950 (HLEPrefixRelease): Likewise.
952 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
954 * i386-dis.c (HLE_Fixup1): New.
955 (HLE_Fixup2): Likewise.
956 (HLE_Fixup3): Likewise.
963 (MOD_C6_REG_7): Likewise.
964 (MOD_C7_REG_7): Likewise.
965 (RM_C6_REG_7): Likewise.
966 (RM_C7_REG_7): Likewise.
967 (XACQUIRE_PREFIX): Likewise.
968 (XRELEASE_PREFIX): Likewise.
969 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
970 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
971 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
972 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
973 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
974 MOD_C6_REG_7 and MOD_C7_REG_7.
975 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
976 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
978 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
979 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
981 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
983 (cpu_flags): Add CpuHLE and CpuRTM.
984 (opcode_modifiers): Add HLEPrefixOk.
986 * i386-opc.h (CpuHLE): New.
988 (HLEPrefixOk): Likewise.
989 (i386_cpu_flags): Add cpuhle and cpurtm.
990 (i386_opcode_modifier): Add hleprefixok.
992 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
993 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
994 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
995 operand. Add xacquire, xrelease, xabort, xbegin, xend and
997 * i386-init.h: Regenerated.
998 * i386-tbl.h: Likewise.
1000 2012-01-24 DJ Delorie <dj@redhat.com>
1002 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
1003 * rl78-decode.c: Regenerate.
1005 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
1008 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
1010 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
1012 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
1013 register and move them after pmove with PSR/PCSR register.
1015 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
1017 * i386-dis.c (mod_table): Add vmfunc.
1019 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
1020 (cpu_flags): CpuVMFUNC.
1022 * i386-opc.h (CpuVMFUNC): New.
1023 (i386_cpu_flags): Add cpuvmfunc.
1025 * i386-opc.tbl: Add vmfunc.
1026 * i386-init.h: Regenerated.
1027 * i386-tbl.h: Likewise.
1029 For older changes see ChangeLog-2011
1035 version-control: never