1 2018-04-16 Alan Modra <amodra@gmail.com>
3 * Makefile.am: Remove m88k support.
4 * configure.ac: Likewise.
5 * disassemble.c: Likewise.
6 * disassemble.h: Likewise.
8 * Makefile.in: Regenerate.
9 * configure: Regenerate.
10 * po/POTFILES.in: Regenerate.
12 2018-04-16 Alan Modra <amodra@gmail.com>
14 * Makefile.am: Remove i370 support.
15 * configure.ac: Likewise.
16 * disassemble.c: Likewise.
17 * disassemble.h: Likewise.
20 * Makefile.in: Regenerate.
21 * configure: Regenerate.
22 * po/POTFILES.in: Regenerate.
24 2018-04-16 Alan Modra <amodra@gmail.com>
26 * Makefile.am: Remove h8500 support.
27 * configure.ac: Likewise.
28 * disassemble.c: Likewise.
29 * disassemble.h: Likewise.
30 * h8500-dis.c: Delete.
31 * h8500-opc.h: Delete.
32 * Makefile.in: Regenerate.
33 * configure: Regenerate.
34 * po/POTFILES.in: Regenerate.
36 2018-04-16 Alan Modra <amodra@gmail.com>
38 * configure.ac: Remove tahoe support.
39 * configure: Regenerate.
41 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
43 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
45 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
47 * i386-tbl.h: Regenerated.
49 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
51 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
52 PREFIX_MOD_1_0FAE_REG_6.
54 (OP_E_register): Use va_mode.
55 * i386-dis-evex.h (prefix_table):
56 New instructions (see prefixes above).
57 * i386-gen.c (cpu_flag_init): Add WAITPKG.
58 (cpu_flags): Likewise.
59 * i386-opc.h (enum): Likewise.
60 (i386_cpu_flags): Likewise.
61 * i386-opc.tbl: Add umonitor, umwait, tpause.
62 * i386-init.h: Regenerate.
63 * i386-tbl.h: Likewise.
65 2018-04-11 Alan Modra <amodra@gmail.com>
67 * opcodes/i860-dis.c: Delete.
68 * opcodes/i960-dis.c: Delete.
69 * Makefile.am: Remove i860 and i960 support.
70 * configure.ac: Likewise.
71 * disassemble.c: Likewise.
72 * disassemble.h: Likewise.
73 * Makefile.in: Regenerate.
74 * configure: Regenerate.
75 * po/POTFILES.in: Regenerate.
77 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
80 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
82 (print_insn): Clear vex instead of vex.evex.
84 2018-04-04 Nick Clifton <nickc@redhat.com>
86 * po/es.po: Updated Spanish translation.
88 2018-03-28 Jan Beulich <jbeulich@suse.com>
90 * i386-gen.c (opcode_modifiers): Delete VecESize.
91 * i386-opc.h (VecESize): Delete.
92 (struct i386_opcode_modifier): Delete vecesize.
93 * i386-opc.tbl: Drop VecESize.
94 * i386-tlb.h: Re-generate.
96 2018-03-28 Jan Beulich <jbeulich@suse.com>
98 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
99 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
100 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
101 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
102 * i386-tlb.h: Re-generate.
104 2018-03-28 Jan Beulich <jbeulich@suse.com>
106 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
108 * i386-tlb.h: Re-generate.
110 2018-03-28 Jan Beulich <jbeulich@suse.com>
112 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
113 (vex_len_table): Drop Y for vcvt*2si.
114 (putop): Replace plain 'Y' handling by abort().
116 2018-03-28 Nick Clifton <nickc@redhat.com>
119 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
120 instructions with only a base address register.
121 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
122 handle AARHC64_OPND_SVE_ADDR_R.
123 (aarch64_print_operand): Likewise.
124 * aarch64-asm-2.c: Regenerate.
125 * aarch64_dis-2.c: Regenerate.
126 * aarch64-opc-2.c: Regenerate.
128 2018-03-22 Jan Beulich <jbeulich@suse.com>
130 * i386-opc.tbl: Drop VecESize from register only insn forms and
131 memory forms not allowing broadcast.
132 * i386-tlb.h: Re-generate.
134 2018-03-22 Jan Beulich <jbeulich@suse.com>
136 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
137 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
138 sha256*): Drop Disp<N>.
140 2018-03-22 Jan Beulich <jbeulich@suse.com>
142 * i386-dis.c (EbndS, bnd_swap_mode): New.
143 (prefix_table): Use EbndS.
144 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
145 * i386-opc.tbl (bndmov): Move misplaced Load.
146 * i386-tlb.h: Re-generate.
148 2018-03-22 Jan Beulich <jbeulich@suse.com>
150 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
151 templates allowing memory operands and folded ones for register
153 * i386-tlb.h: Re-generate.
155 2018-03-22 Jan Beulich <jbeulich@suse.com>
157 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
158 256-bit templates. Drop redundant leftover Disp<N>.
159 * i386-tlb.h: Re-generate.
161 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
163 * riscv-opc.c (riscv_insn_types): New.
165 2018-03-13 Nick Clifton <nickc@redhat.com>
167 * po/pt_BR.po: Updated Brazilian Portuguese translation.
169 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
171 * i386-opc.tbl: Add Optimize to clr.
172 * i386-tbl.h: Regenerated.
174 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
176 * i386-gen.c (opcode_modifiers): Remove OldGcc.
177 * i386-opc.h (OldGcc): Removed.
178 (i386_opcode_modifier): Remove oldgcc.
179 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
180 instructions for old (<= 2.8.1) versions of gcc.
181 * i386-tbl.h: Regenerated.
183 2018-03-08 Jan Beulich <jbeulich@suse.com>
185 * i386-opc.h (EVEXDYN): New.
186 * i386-opc.tbl: Fold various AVX512VL templates.
187 * i386-tlb.h: Re-generate.
189 2018-03-08 Jan Beulich <jbeulich@suse.com>
191 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
192 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
193 vpexpandd, vpexpandq): Fold AFX512VF templates.
194 * i386-tlb.h: Re-generate.
196 2018-03-08 Jan Beulich <jbeulich@suse.com>
198 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
199 Fold 128- and 256-bit VEX-encoded templates.
200 * i386-tlb.h: Re-generate.
202 2018-03-08 Jan Beulich <jbeulich@suse.com>
204 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
205 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
206 vpexpandd, vpexpandq): Fold AVX512F templates.
207 * i386-tlb.h: Re-generate.
209 2018-03-08 Jan Beulich <jbeulich@suse.com>
211 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
212 64-bit templates. Drop Disp<N>.
213 * i386-tlb.h: Re-generate.
215 2018-03-08 Jan Beulich <jbeulich@suse.com>
217 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
218 and 256-bit templates.
219 * i386-tlb.h: Re-generate.
221 2018-03-08 Jan Beulich <jbeulich@suse.com>
223 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
224 * i386-tlb.h: Re-generate.
226 2018-03-08 Jan Beulich <jbeulich@suse.com>
228 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
230 * i386-tlb.h: Re-generate.
232 2018-03-08 Jan Beulich <jbeulich@suse.com>
234 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
235 * i386-tlb.h: Re-generate.
237 2018-03-08 Jan Beulich <jbeulich@suse.com>
239 * i386-gen.c (opcode_modifiers): Delete FloatD.
240 * i386-opc.h (FloatD): Delete.
241 (struct i386_opcode_modifier): Delete floatd.
242 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
244 * i386-tlb.h: Re-generate.
246 2018-03-08 Jan Beulich <jbeulich@suse.com>
248 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
250 2018-03-08 Jan Beulich <jbeulich@suse.com>
252 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
253 * i386-tlb.h: Re-generate.
255 2018-03-08 Jan Beulich <jbeulich@suse.com>
257 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
259 * i386-tlb.h: Re-generate.
261 2018-03-07 Alan Modra <amodra@gmail.com>
263 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
265 * disassemble.h (print_insn_rs6000): Delete.
266 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
267 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
268 (print_insn_rs6000): Delete.
270 2018-03-03 Alan Modra <amodra@gmail.com>
272 * sysdep.h (opcodes_error_handler): Define.
273 (_bfd_error_handler): Declare.
274 * Makefile.am: Remove stray #.
275 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
277 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
278 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
279 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
280 opcodes_error_handler to print errors. Standardize error messages.
281 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
282 and include opintl.h.
283 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
284 * i386-gen.c: Standardize error messages.
285 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
286 * Makefile.in: Regenerate.
287 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
288 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
289 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
290 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
291 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
292 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
293 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
294 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
295 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
296 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
297 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
298 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
299 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
301 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
303 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
304 vpsub[bwdq] instructions.
305 * i386-tbl.h: Regenerated.
307 2018-03-01 Alan Modra <amodra@gmail.com>
309 * configure.ac (ALL_LINGUAS): Sort.
310 * configure: Regenerate.
312 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
314 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
315 macro by assignements.
317 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
320 * i386-gen.c (opcode_modifiers): Add Optimize.
321 * i386-opc.h (Optimize): New enum.
322 (i386_opcode_modifier): Add optimize.
323 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
324 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
325 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
326 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
327 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
329 * i386-tbl.h: Regenerated.
331 2018-02-26 Alan Modra <amodra@gmail.com>
333 * crx-dis.c (getregliststring): Allocate a large enough buffer
334 to silence false positive gcc8 warning.
336 2018-02-22 Shea Levy <shea@shealevy.com>
338 * disassemble.c (ARCH_riscv): Define if ARCH_all.
340 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
342 * i386-opc.tbl: Add {rex},
343 * i386-tbl.h: Regenerated.
345 2018-02-20 Maciej W. Rozycki <macro@mips.com>
347 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
348 (mips16_opcodes): Replace `M' with `m' for "restore".
350 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
352 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
354 2018-02-13 Maciej W. Rozycki <macro@mips.com>
356 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
357 variable to `function_index'.
359 2018-02-13 Nick Clifton <nickc@redhat.com>
362 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
363 about truncation of printing.
365 2018-02-12 Henry Wong <henry@stuffedcow.net>
367 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
369 2018-02-05 Nick Clifton <nickc@redhat.com>
371 * po/pt_BR.po: Updated Brazilian Portuguese translation.
373 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
375 * i386-dis.c (enum): Add pconfig.
376 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
377 (cpu_flags): Add CpuPCONFIG.
378 * i386-opc.h (enum): Add CpuPCONFIG.
379 (i386_cpu_flags): Add cpupconfig.
380 * i386-opc.tbl: Add PCONFIG instruction.
381 * i386-init.h: Regenerate.
382 * i386-tbl.h: Likewise.
384 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
386 * i386-dis.c (enum): Add PREFIX_0F09.
387 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
388 (cpu_flags): Add CpuWBNOINVD.
389 * i386-opc.h (enum): Add CpuWBNOINVD.
390 (i386_cpu_flags): Add cpuwbnoinvd.
391 * i386-opc.tbl: Add WBNOINVD instruction.
392 * i386-init.h: Regenerate.
393 * i386-tbl.h: Likewise.
395 2018-01-17 Jim Wilson <jimw@sifive.com>
397 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
399 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
401 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
402 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
403 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
404 (cpu_flags): Add CpuIBT, CpuSHSTK.
405 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
406 (i386_cpu_flags): Add cpuibt, cpushstk.
407 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
408 * i386-init.h: Regenerate.
409 * i386-tbl.h: Likewise.
411 2018-01-16 Nick Clifton <nickc@redhat.com>
413 * po/pt_BR.po: Updated Brazilian Portugese translation.
414 * po/de.po: Updated German translation.
416 2018-01-15 Jim Wilson <jimw@sifive.com>
418 * riscv-opc.c (match_c_nop): New.
419 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
421 2018-01-15 Nick Clifton <nickc@redhat.com>
423 * po/uk.po: Updated Ukranian translation.
425 2018-01-13 Nick Clifton <nickc@redhat.com>
427 * po/opcodes.pot: Regenerated.
429 2018-01-13 Nick Clifton <nickc@redhat.com>
431 * configure: Regenerate.
433 2018-01-13 Nick Clifton <nickc@redhat.com>
437 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
439 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
440 * i386-tbl.h: Regenerate.
442 2018-01-10 Jan Beulich <jbeulich@suse.com>
444 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
445 * i386-tbl.h: Re-generate.
447 2018-01-10 Jan Beulich <jbeulich@suse.com>
449 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
450 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
451 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
452 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
453 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
454 Disp8MemShift of AVX512VL forms.
455 * i386-tbl.h: Re-generate.
457 2018-01-09 Jim Wilson <jimw@sifive.com>
459 * riscv-dis.c (maybe_print_address): If base_reg is zero,
460 then the hi_addr value is zero.
462 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
464 * arm-dis.c (arm_opcodes): Add csdb.
465 (thumb32_opcodes): Add csdb.
467 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
469 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
470 * aarch64-asm-2.c: Regenerate.
471 * aarch64-dis-2.c: Regenerate.
472 * aarch64-opc-2.c: Regenerate.
474 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
477 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
478 Remove AVX512 vmovd with 64-bit operands.
479 * i386-tbl.h: Regenerated.
481 2018-01-05 Jim Wilson <jimw@sifive.com>
483 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
486 2018-01-03 Alan Modra <amodra@gmail.com>
488 Update year range in copyright notice of all files.
490 2018-01-02 Jan Beulich <jbeulich@suse.com>
492 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
493 and OPERAND_TYPE_REGZMM entries.
495 For older changes see ChangeLog-2017
497 Copyright (C) 2018 Free Software Foundation, Inc.
499 Copying and distribution of this file, with or without modification,
500 are permitted in any medium without royalty provided the copyright
501 notice and this notice are preserved.
507 version-control: never