1 2008-09-29 Nick Clifton <nickc@redhat.com>
3 * po/vi.po: Updated Vietnamese translation.
4 * po/fr.po: Updated French translation.
6 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
8 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
9 (cfxr, cfdr, cfer, clclu): Add esa flag.
10 (sqd): Instruction added.
11 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
12 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
14 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
16 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
17 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
19 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
21 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
22 * i386-tbl.h: Regenerated.
24 2008-08-28 Jan Beulich <jbeulich@novell.com>
26 * i386-dis.c (dis386): Adjust far return mnemonics.
27 * i386-opc.tbl: Add retf.
28 * i386-tbl.h: Re-generate.
30 2008-08-28 Jan Beulich <jbeulich@novell.com>
32 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
34 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
36 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
37 * ia64-gen.c (lookup_specifier): Likewise.
39 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
40 * ia64-raw.tbl: Likewise.
41 * ia64-waw.tbl: Likewise.
42 * ia64-asmtab.c: Regenerated.
44 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
46 * i386-opc.tbl: Correct fidivr operand size.
48 * i386-tbl.h: Regenerated.
50 2008-08-24 Alan Modra <amodra@bigpond.net.au>
52 * configure.in: Update a number of obsolete autoconf macros.
53 * aclocal.m4: Regenerate.
55 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
57 AVX Programming Reference (August, 2008)
58 * i386-dis.c (PREFIX_VEX_38DB): New.
59 (PREFIX_VEX_38DC): Likewise.
60 (PREFIX_VEX_38DD): Likewise.
61 (PREFIX_VEX_38DE): Likewise.
62 (PREFIX_VEX_38DF): Likewise.
63 (PREFIX_VEX_3ADF): Likewise.
64 (VEX_LEN_38DB_P_2): Likewise.
65 (VEX_LEN_38DC_P_2): Likewise.
66 (VEX_LEN_38DD_P_2): Likewise.
67 (VEX_LEN_38DE_P_2): Likewise.
68 (VEX_LEN_38DF_P_2): Likewise.
69 (VEX_LEN_3ADF_P_2): Likewise.
70 (PREFIX_VEX_3A04): Updated.
71 (VEX_LEN_3A06_P_2): Likewise.
72 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
73 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
74 (x86_64_table): Likewise.
75 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
76 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
79 * i386-opc.tbl: Add AES + AVX instructions.
80 * i386-init.h: Regenerated.
81 * i386-tbl.h: Likewise.
83 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
85 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
86 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
88 2008-08-15 Alan Modra <amodra@bigpond.net.au>
91 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
92 * Makefile.in: Regenerate.
93 * aclocal.m4: Regenerate.
94 * config.in: Regenerate.
95 * configure: Regenerate.
97 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
100 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
102 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
104 * i386-opc.tbl: Add syscall and sysret for Cpu64.
106 * i386-tbl.h: Regenerated.
108 2008-08-04 Alan Modra <amodra@bigpond.net.au>
110 * Makefile.am (POTFILES.in): Set LC_ALL=C.
111 * Makefile.in: Regenerate.
112 * po/POTFILES.in: Regenerate.
114 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
116 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
117 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
118 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
119 * ppc-opc.c (insert_xt6): New static function.
120 (extract_xt6): Likewise.
121 (insert_xa6): Likewise.
122 (extract_xa6: Likewise.
123 (insert_xb6): Likewise.
124 (extract_xb6): Likewise.
125 (insert_xb6s): Likewise.
126 (extract_xb6s): Likewise.
127 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
128 XX3DM_MASK, PPCVSX): New.
129 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
130 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
132 2008-08-01 Pedro Alves <pedro@codesourcery.com>
134 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
135 * Makefile.in: Regenerate.
137 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
139 * i386-reg.tbl: Use Dw2Inval on AVX registers.
140 * i386-tbl.h: Regenerated.
142 2008-07-30 Michael J. Eager <eager@eagercon.com>
144 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
145 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
146 (insert_sprg, PPC405): Use PPC_OPCODE_405.
147 (powerpc_opcodes): Add Xilinx APU related opcodes.
149 2008-07-30 Alan Modra <amodra@bigpond.net.au>
151 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
153 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
155 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
157 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
159 * mips-opc.c (CP): New macro.
160 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
161 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
162 dmtc2 Octeon instructions.
164 2008-07-07 Stan Shebs <stan@codesourcery.com>
166 * dis-init.c (init_disassemble_info): Init endian_code field.
167 * arm-dis.c (print_insn): Disassemble code according to
168 setting of endian_code.
169 (print_insn_big_arm): Detect when BE8 extension flag has been set.
171 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
173 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
176 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
178 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
179 (print_ppc_disassembler_options): Likewise.
180 * ppc-opc.c (PPC464): Define.
181 (powerpc_opcodes): Add mfdcrux and mtdcrux.
183 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
185 * configure: Regenerate.
187 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
189 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
191 (struct dis_private): New.
192 (POWERPC_DIALECT): New define.
193 (powerpc_dialect): Renamed to...
194 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
196 (print_insn_big_powerpc): Update for using structure in
198 (print_insn_little_powerpc): Likewise.
199 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
200 (skip_optional_operands): Likewise.
201 (print_insn_powerpc): Likewise. Remove initialization of dialect.
202 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
203 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
204 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
205 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
206 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
207 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
208 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
209 param to be of type ppc_cpu_t. Update prototype.
211 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
213 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
215 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
216 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
217 syncw, syncws, vm3mulu, vm0 and vmulu.
219 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
220 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
223 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
225 * i386-opc.tbl: Add vmovd with 64bit operand.
226 * i386-tbl.h: Regenerated.
228 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
230 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
232 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
234 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
235 * i386-tbl.h: Regenerated.
237 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
240 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
241 into 32bit and 64bit. Remove Reg64|Qword and add
242 IgnoreSize|No_qSuf on 32bit version.
243 * i386-tbl.h: Regenerated.
245 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
247 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
248 * i386-tbl.h: Regenerated.
250 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
252 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
254 2008-05-14 Alan Modra <amodra@bigpond.net.au>
256 * Makefile.am: Run "make dep-am".
257 * Makefile.in: Regenerate.
259 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
261 * i386-dis.c (MOVBE_Fixup): New.
263 (PREFIX_0F3880): Likewise.
264 (PREFIX_0F3881): Likewise.
265 (PREFIX_0F38F0): Updated.
266 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
267 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
268 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
270 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
272 (cpu_flags): Add CpuMovbe and CpuEPT.
274 * i386-opc.h (CpuMovbe): New.
277 (i386_cpu_flags): Add cpumovbe and cpuept.
279 * i386-opc.tbl: Add entries for movbe and EPT instructions.
280 * i386-init.h: Regenerated.
281 * i386-tbl.h: Likewise.
283 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
285 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
286 the two drem and the two dremu macros.
288 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
290 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
291 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
292 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
293 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
295 2008-04-25 David S. Miller <davem@davemloft.net>
297 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
298 instead of %sys_tick_cmpr, as suggested in architecture manuals.
300 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
302 * aclocal.m4: Regenerate.
303 * configure: Regenerate.
305 2008-04-23 David S. Miller <davem@davemloft.net>
307 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
309 (prefetch_table): Add missing values.
311 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
313 * i386-gen.c (opcode_modifiers): Add NoAVX.
315 * i386-opc.h (NoAVX): New.
317 (i386_opcode_modifier): Add noavx.
319 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
320 instructions which don't have AVX equivalent.
321 * i386-tbl.h: Regenerated.
323 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
325 * i386-dis.c (OP_VEX_FMA): New.
326 (OP_EX_VexImmW): Likewise.
328 (Vex128FMA): Likewise.
329 (EXVexImmW): Likewise.
330 (get_vex_imm8): Likewise.
331 (OP_EX_VexReg): Likewise.
332 (vex_i4_done): Renamed to ...
334 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
335 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
337 (print_insn): Updated.
338 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
339 (OP_REG_VexI4): Check invalid high registers.
341 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
342 Michael Meissner <michael.meissner@amd.com>
344 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
345 * i386-tbl.h: Regenerate from i386-opc.tbl.
347 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
349 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
350 accept Power E500MC instructions.
351 (print_ppc_disassembler_options): Document -Me500mc.
352 * ppc-opc.c (DUIS, DUI, T): New.
353 (XRT, XRTRA): Likewise.
355 (powerpc_opcodes): Add new Power E500MC instructions.
357 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
359 * s390-dis.c (init_disasm): Evaluate disassembler_options.
360 (print_s390_disassembler_options): New function.
361 * disassemble.c (disassembler_usage): Invoke
362 print_s390_disassembler_options.
364 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
366 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
367 of local variables used for mnemonic parsing: prefix, suffix and
370 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
372 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
373 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
374 (s390_crb_extensions): New extensions table.
375 (insertExpandedMnemonic): Handle '$' tag.
376 * s390-opc.txt: Remove conditional jump variants which can now
377 be expanded automatically.
378 Replace '*' tag with '$' in the compare and branch instructions.
380 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
382 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
383 (PREFIX_VEX_3AXX): Likewis.
385 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
387 * i386-opc.tbl: Remove 4 extra blank lines.
389 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
391 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
392 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
393 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
394 * i386-opc.tbl: Likewise.
396 * i386-opc.h (CpuCLMUL): Renamed to ...
399 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
401 * i386-init.h: Regenerated.
403 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
405 * i386-dis.c (OP_E_register): New.
406 (OP_E_memory): Likewise.
408 (OP_EX_Vex): Likewise.
409 (OP_EX_VexW): Likewise.
410 (OP_XMM_Vex): Likewise.
411 (OP_XMM_VexW): Likewise.
412 (OP_REG_VexI4): Likewise.
413 (PCLMUL_Fixup): Likewise.
414 (VEXI4_Fixup): Likewise.
415 (VZERO_Fixup): Likewise.
416 (VCMP_Fixup): Likewise.
417 (VPERMIL2_Fixup): Likewise.
418 (rex_original): Likewise.
419 (rex_ignored): Likewise.
440 (VPERMIL2): Likewise.
441 (xmm_mode): Likewise.
442 (xmmq_mode): Likewise.
443 (ymmq_mode): Likewise.
444 (vex_mode): Likewise.
445 (vex128_mode): Likewise.
446 (vex256_mode): Likewise.
447 (USE_VEX_C4_TABLE): Likewise.
448 (USE_VEX_C5_TABLE): Likewise.
449 (USE_VEX_LEN_TABLE): Likewise.
450 (VEX_C4_TABLE): Likewise.
451 (VEX_C5_TABLE): Likewise.
452 (VEX_LEN_TABLE): Likewise.
453 (REG_VEX_XX): Likewise.
454 (MOD_VEX_XXX): Likewise.
455 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
456 (PREFIX_0F3A44): Likewise.
457 (PREFIX_0F3ADF): Likewise.
458 (PREFIX_VEX_XXX): Likewise.
460 (VEX_OF38): Likewise.
461 (VEX_OF3A): Likewise.
462 (VEX_LEN_XXX): Likewise.
464 (need_vex): Likewise.
465 (need_vex_reg): Likewise.
466 (vex_i4_done): Likewise.
467 (vex_table): Likewise.
468 (vex_len_table): Likewise.
469 (OP_REG_VexI4): Likewise.
470 (vex_cmp_op): Likewise.
471 (pclmul_op): Likewise.
472 (vpermil2_op): Likewise.
475 (PREFIX_0F38F0): Likewise.
476 (PREFIX_0F3A60): Likewise.
477 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
478 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
479 and PREFIX_VEX_XXX entries.
480 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
481 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
483 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
484 Add MOD_VEX_XXX entries.
485 (ckprefix): Initialize rex_original and rex_ignored. Store the
486 REX byte in rex_original.
487 (get_valid_dis386): Handle the implicit prefix in VEX prefix
488 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
489 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
490 calling get_valid_dis386. Use rex_original and rex_ignored when
492 (putop): Handle "XY".
493 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
495 (OP_E_extended): Updated to use OP_E_register and
497 (OP_XMM): Handle VEX.
499 (XMM_Fixup): Likewise.
500 (CMP_Fixup): Use ARRAY_SIZE.
502 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
503 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
504 (operand_type_init): Add OPERAND_TYPE_REGYMM and
505 OPERAND_TYPE_VEX_IMM4.
506 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
507 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
508 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
509 VexImmExt and SSE2AVX.
510 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
512 * i386-opc.h (CpuAVX): New.
514 (CpuCLMUL): Likewise.
525 (Vex3Sources): Likewise.
526 (VexImmExt): Likewise.
530 (Vex_Imm4): Likewise.
531 (Implicit1stXmm0): Likewise.
534 (ByteOkIntel): Likewise.
537 (Unspecified): Likewise.
539 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
540 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
541 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
542 vex3sources, veximmext and sse2avx.
543 (i386_operand_type): Add regymm, ymmword and vex_imm4.
545 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
547 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
549 * i386-init.h: Regenerated.
550 * i386-tbl.h: Likewise.
552 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
554 From Robin Getz <robin.getz@analog.com>
555 * bfin-dis.c (bu32): Typedef.
556 (enum const_forms_t): Add c_uimm32 and c_huimm32.
557 (constant_formats[]): Add uimm32 and huimm16.
562 (luimm16_val): Define.
563 (struct saved_state): Define.
564 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
565 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
566 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
568 (decode_LDIMMhalf_0): Print out the whole register value.
570 From Jie Zhang <jie.zhang@analog.com>
571 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
572 multiply and multiply-accumulate to data register instruction.
574 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
575 c_imm32, c_huimm32e): Define.
576 (constant_formats): Add flags for printing decimal, leading spaces, and
578 (comment, parallel): Add global flags in all disassembly.
579 (fmtconst): Take advantage of new flags, and print default in hex.
580 (fmtconst_val): Likewise.
581 (decode_macfunc): Be consistant with spaces, tabs, comments,
582 capitalization in disassembly, fix minor coding style issues.
583 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
584 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
585 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
586 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
587 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
588 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
589 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
590 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
591 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
592 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
593 _print_insn_bfin, print_insn_bfin): Likewise.
595 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
597 * aclocal.m4: Regenerate.
598 * configure: Likewise.
599 * Makefile.in: Likewise.
601 2008-03-13 Alan Modra <amodra@bigpond.net.au>
603 * Makefile.am: Run "make dep-am".
604 * Makefile.in: Regenerate.
605 * configure: Regenerate.
607 2008-03-07 Alan Modra <amodra@bigpond.net.au>
609 * ppc-opc.c (powerpc_opcodes): Order and format.
611 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
613 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
614 * i386-tbl.h: Regenerated.
616 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
618 * i386-opc.tbl: Disallow 16-bit near indirect branches for
620 * i386-tbl.h: Regenerated.
622 2008-02-21 Jan Beulich <jbeulich@novell.com>
624 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
625 and Fword for far indirect jmp. Allow Reg16 and Word for near
626 indirect jmp on x86-64. Disallow Fword for lcall.
627 * i386-tbl.h: Re-generate.
629 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
631 * cr16-opc.c (cr16_num_optab): Defined
633 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
635 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
636 * i386-init.h: Regenerated.
638 2008-02-14 Nick Clifton <nickc@redhat.com>
641 * configure.in (SHARED_LIBADD): Select the correct host specific
642 file extension for shared libraries.
643 * configure: Regenerate.
645 2008-02-13 Jan Beulich <jbeulich@novell.com>
647 * i386-opc.h (RegFlat): New.
648 * i386-reg.tbl (flat): Add.
649 * i386-tbl.h: Re-generate.
651 2008-02-13 Jan Beulich <jbeulich@novell.com>
653 * i386-dis.c (a_mode): New.
654 (cond_jump_mode): Adjust.
655 (Ma): Change to a_mode.
656 (intel_operand_size): Handle a_mode.
657 * i386-opc.tbl: Allow Dword and Qword for bound.
658 * i386-tbl.h: Re-generate.
660 2008-02-13 Jan Beulich <jbeulich@novell.com>
662 * i386-gen.c (process_i386_registers): Process new fields.
663 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
664 unsigned char. Add dw2_regnum and Dw2Inval.
665 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
667 * i386-tbl.h: Re-generate.
669 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
671 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
672 * i386-init.h: Updated.
674 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
676 * i386-gen.c (cpu_flags): Add CpuXsave.
678 * i386-opc.h (CpuXsave): New.
680 (i386_cpu_flags): Add cpuxsave.
682 * i386-dis.c (MOD_0FAE_REG_4): New.
683 (RM_0F01_REG_2): Likewise.
684 (MOD_0FAE_REG_5): Updated.
685 (RM_0F01_REG_3): Likewise.
686 (reg_table): Use MOD_0FAE_REG_4.
687 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
689 (rm_table): Add RM_0F01_REG_2.
691 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
692 * i386-init.h: Regenerated.
693 * i386-tbl.h: Likewise.
695 2008-02-11 Jan Beulich <jbeulich@novell.com>
697 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
698 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
699 * i386-tbl.h: Re-generate.
701 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
704 * configure: Regenerated.
706 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
708 * mips-dis.c: Update copyright.
709 (mips_arch_choices): Add Octeon.
710 * mips-opc.c: Update copyright.
712 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
714 2008-01-29 Alan Modra <amodra@bigpond.net.au>
716 * ppc-opc.c: Support optional L form mtmsr.
718 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
720 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
722 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
724 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
725 * i386-init.h: Regenerated.
727 2008-01-23 Tristan Gingold <gingold@adacore.com>
729 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
730 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
732 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
734 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
735 (cpu_flags): Likewise.
737 * i386-opc.h (CpuMMX2): Removed.
740 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
741 * i386-init.h: Regenerated.
742 * i386-tbl.h: Likewise.
744 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
746 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
748 * i386-init.h: Regenerated.
750 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
752 * i386-opc.tbl: Use Qword on movddup.
753 * i386-tbl.h: Regenerated.
755 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
757 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
758 * i386-tbl.h: Regenerated.
760 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
762 * i386-dis.c (Mx): New.
763 (PREFIX_0FC3): Likewise.
764 (PREFIX_0FC7_REG_6): Updated.
765 (dis386_twobyte): Use PREFIX_0FC3.
766 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
767 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
770 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
772 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
773 (operand_types): Add Mem.
775 * i386-opc.h (IntelSyntax): New.
776 * i386-opc.h (Mem): New.
778 (Opcode_Modifier_Max): Updated.
779 (i386_opcode_modifier): Add intelsyntax.
780 (i386_operand_type): Add mem.
782 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
785 * i386-reg.tbl: Add size for accumulator.
787 * i386-init.h: Regenerated.
788 * i386-tbl.h: Likewise.
790 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
792 * i386-opc.h (Byte): Fix a typo.
794 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
797 * i386-gen.c (operand_type_init): Add Dword to
798 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
799 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
801 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
802 Xmmword, Unspecified and Anysize.
803 (set_bitfield): Make Mmword an alias of Qword. Make Oword
806 * i386-opc.h (CheckSize): Removed.
814 (i386_opcode_modifier): Remove checksize, byte, word, dword,
818 (Unspecified): Likewise.
820 (i386_operand_type): Add byte, word, dword, fword, qword,
821 tbyte xmmword, unspecified and anysize.
823 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
824 Tbyte, Xmmword, Unspecified and Anysize.
826 * i386-reg.tbl: Add size for accumulator.
828 * i386-init.h: Regenerated.
829 * i386-tbl.h: Likewise.
831 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
833 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
835 (reg_table): Updated.
836 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
837 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
839 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
841 * i386-gen.c (set_bitfield): Use fail () on error.
843 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
845 * i386-gen.c (lineno): New.
846 (filename): Likewise.
847 (set_bitfield): Report filename and line numer on error.
848 (process_i386_opcodes): Set filename and update lineno.
849 (process_i386_registers): Likewise.
851 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
853 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
856 * i386-opc.h (IntelMnemonic): Renamed to ..
858 (Opcode_Modifier_Max): Updated.
859 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
862 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
863 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
864 * i386-tbl.h: Regenerated.
866 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
868 * i386-gen.c: Update copyright to 2008.
869 * i386-opc.h: Likewise.
870 * i386-opc.tbl: Likewise.
872 * i386-init.h: Regenerated.
873 * i386-tbl.h: Likewise.
875 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
877 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
878 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
879 * i386-tbl.h: Regenerated.
881 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
883 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
885 (cpu_flags): Likewise.
887 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
888 (CpuSSE4_2_Or_ABM): Likewise.
890 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
892 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
893 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
894 and CpuPadLock, respectively.
895 * i386-init.h: Regenerated.
896 * i386-tbl.h: Likewise.
898 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
900 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
902 * i386-opc.h (No_xSuf): Removed.
903 (CheckSize): Updated.
905 * i386-tbl.h: Regenerated.
907 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
909 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
910 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
912 (cpu_flags): Add CpuSSE4_2_Or_ABM.
914 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
916 (i386_cpu_flags): Add cpusse4_2_or_abm.
918 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
919 CpuABM|CpuSSE4_2 on popcnt.
920 * i386-init.h: Regenerated.
921 * i386-tbl.h: Likewise.
923 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
925 * i386-opc.h: Update comments.
927 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
929 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
930 * i386-opc.h: Likewise.
931 * i386-opc.tbl: Likewise.
933 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
936 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
937 Byte, Word, Dword, QWord and Xmmword.
939 * i386-opc.h (No_xSuf): New.
940 (CheckSize): Likewise.
947 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
948 Dword, QWord and Xmmword.
950 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
952 * i386-tbl.h: Regenerated.
954 2008-01-02 Mark Kettenis <kettenis@gnu.org>
956 * m88k-dis.c (instructions): Fix fcvt.* instructions.
959 For older changes see ChangeLog-2007
965 version-control: never