1 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
5 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
7 * i386-tbl.h: Regenerated.
9 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
11 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
12 PREFIX_MOD_1_0FAE_REG_6.
14 (OP_E_register): Use va_mode.
15 * i386-dis-evex.h (prefix_table):
16 New instructions (see prefixes above).
17 * i386-gen.c (cpu_flag_init): Add WAITPKG.
18 (cpu_flags): Likewise.
19 * i386-opc.h (enum): Likewise.
20 (i386_cpu_flags): Likewise.
21 * i386-opc.tbl: Add umonitor, umwait, tpause.
22 * i386-init.h: Regenerate.
23 * i386-tbl.h: Likewise.
25 2018-04-11 Alan Modra <amodra@gmail.com>
27 * opcodes/i860-dis.c: Delete.
28 * opcodes/i960-dis.c: Delete.
29 * Makefile.am: Remove i860 and i960 support.
30 * configure.ac: Likewise.
31 * disassemble.c: Likewise.
32 * disassemble.h: Likewise.
33 * Makefile.in: Regenerate.
34 * configure: Regenerate.
35 * po/POTFILES.in: Regenerate.
37 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
40 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
42 (print_insn): Clear vex instead of vex.evex.
44 2018-04-04 Nick Clifton <nickc@redhat.com>
46 * po/es.po: Updated Spanish translation.
48 2018-03-28 Jan Beulich <jbeulich@suse.com>
50 * i386-gen.c (opcode_modifiers): Delete VecESize.
51 * i386-opc.h (VecESize): Delete.
52 (struct i386_opcode_modifier): Delete vecesize.
53 * i386-opc.tbl: Drop VecESize.
54 * i386-tlb.h: Re-generate.
56 2018-03-28 Jan Beulich <jbeulich@suse.com>
58 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
59 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
60 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
61 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
62 * i386-tlb.h: Re-generate.
64 2018-03-28 Jan Beulich <jbeulich@suse.com>
66 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
68 * i386-tlb.h: Re-generate.
70 2018-03-28 Jan Beulich <jbeulich@suse.com>
72 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
73 (vex_len_table): Drop Y for vcvt*2si.
74 (putop): Replace plain 'Y' handling by abort().
76 2018-03-28 Nick Clifton <nickc@redhat.com>
79 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
80 instructions with only a base address register.
81 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
82 handle AARHC64_OPND_SVE_ADDR_R.
83 (aarch64_print_operand): Likewise.
84 * aarch64-asm-2.c: Regenerate.
85 * aarch64_dis-2.c: Regenerate.
86 * aarch64-opc-2.c: Regenerate.
88 2018-03-22 Jan Beulich <jbeulich@suse.com>
90 * i386-opc.tbl: Drop VecESize from register only insn forms and
91 memory forms not allowing broadcast.
92 * i386-tlb.h: Re-generate.
94 2018-03-22 Jan Beulich <jbeulich@suse.com>
96 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
97 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
98 sha256*): Drop Disp<N>.
100 2018-03-22 Jan Beulich <jbeulich@suse.com>
102 * i386-dis.c (EbndS, bnd_swap_mode): New.
103 (prefix_table): Use EbndS.
104 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
105 * i386-opc.tbl (bndmov): Move misplaced Load.
106 * i386-tlb.h: Re-generate.
108 2018-03-22 Jan Beulich <jbeulich@suse.com>
110 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
111 templates allowing memory operands and folded ones for register
113 * i386-tlb.h: Re-generate.
115 2018-03-22 Jan Beulich <jbeulich@suse.com>
117 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
118 256-bit templates. Drop redundant leftover Disp<N>.
119 * i386-tlb.h: Re-generate.
121 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
123 * riscv-opc.c (riscv_insn_types): New.
125 2018-03-13 Nick Clifton <nickc@redhat.com>
127 * po/pt_BR.po: Updated Brazilian Portuguese translation.
129 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
131 * i386-opc.tbl: Add Optimize to clr.
132 * i386-tbl.h: Regenerated.
134 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
136 * i386-gen.c (opcode_modifiers): Remove OldGcc.
137 * i386-opc.h (OldGcc): Removed.
138 (i386_opcode_modifier): Remove oldgcc.
139 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
140 instructions for old (<= 2.8.1) versions of gcc.
141 * i386-tbl.h: Regenerated.
143 2018-03-08 Jan Beulich <jbeulich@suse.com>
145 * i386-opc.h (EVEXDYN): New.
146 * i386-opc.tbl: Fold various AVX512VL templates.
147 * i386-tlb.h: Re-generate.
149 2018-03-08 Jan Beulich <jbeulich@suse.com>
151 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
152 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
153 vpexpandd, vpexpandq): Fold AFX512VF templates.
154 * i386-tlb.h: Re-generate.
156 2018-03-08 Jan Beulich <jbeulich@suse.com>
158 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
159 Fold 128- and 256-bit VEX-encoded templates.
160 * i386-tlb.h: Re-generate.
162 2018-03-08 Jan Beulich <jbeulich@suse.com>
164 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
165 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
166 vpexpandd, vpexpandq): Fold AVX512F templates.
167 * i386-tlb.h: Re-generate.
169 2018-03-08 Jan Beulich <jbeulich@suse.com>
171 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
172 64-bit templates. Drop Disp<N>.
173 * i386-tlb.h: Re-generate.
175 2018-03-08 Jan Beulich <jbeulich@suse.com>
177 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
178 and 256-bit templates.
179 * i386-tlb.h: Re-generate.
181 2018-03-08 Jan Beulich <jbeulich@suse.com>
183 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
184 * i386-tlb.h: Re-generate.
186 2018-03-08 Jan Beulich <jbeulich@suse.com>
188 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
190 * i386-tlb.h: Re-generate.
192 2018-03-08 Jan Beulich <jbeulich@suse.com>
194 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
195 * i386-tlb.h: Re-generate.
197 2018-03-08 Jan Beulich <jbeulich@suse.com>
199 * i386-gen.c (opcode_modifiers): Delete FloatD.
200 * i386-opc.h (FloatD): Delete.
201 (struct i386_opcode_modifier): Delete floatd.
202 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
204 * i386-tlb.h: Re-generate.
206 2018-03-08 Jan Beulich <jbeulich@suse.com>
208 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
210 2018-03-08 Jan Beulich <jbeulich@suse.com>
212 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
213 * i386-tlb.h: Re-generate.
215 2018-03-08 Jan Beulich <jbeulich@suse.com>
217 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
219 * i386-tlb.h: Re-generate.
221 2018-03-07 Alan Modra <amodra@gmail.com>
223 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
225 * disassemble.h (print_insn_rs6000): Delete.
226 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
227 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
228 (print_insn_rs6000): Delete.
230 2018-03-03 Alan Modra <amodra@gmail.com>
232 * sysdep.h (opcodes_error_handler): Define.
233 (_bfd_error_handler): Declare.
234 * Makefile.am: Remove stray #.
235 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
237 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
238 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
239 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
240 opcodes_error_handler to print errors. Standardize error messages.
241 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
242 and include opintl.h.
243 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
244 * i386-gen.c: Standardize error messages.
245 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
246 * Makefile.in: Regenerate.
247 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
248 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
249 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
250 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
251 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
252 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
253 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
254 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
255 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
256 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
257 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
258 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
259 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
261 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
263 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
264 vpsub[bwdq] instructions.
265 * i386-tbl.h: Regenerated.
267 2018-03-01 Alan Modra <amodra@gmail.com>
269 * configure.ac (ALL_LINGUAS): Sort.
270 * configure: Regenerate.
272 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
274 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
275 macro by assignements.
277 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
280 * i386-gen.c (opcode_modifiers): Add Optimize.
281 * i386-opc.h (Optimize): New enum.
282 (i386_opcode_modifier): Add optimize.
283 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
284 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
285 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
286 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
287 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
289 * i386-tbl.h: Regenerated.
291 2018-02-26 Alan Modra <amodra@gmail.com>
293 * crx-dis.c (getregliststring): Allocate a large enough buffer
294 to silence false positive gcc8 warning.
296 2018-02-22 Shea Levy <shea@shealevy.com>
298 * disassemble.c (ARCH_riscv): Define if ARCH_all.
300 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
302 * i386-opc.tbl: Add {rex},
303 * i386-tbl.h: Regenerated.
305 2018-02-20 Maciej W. Rozycki <macro@mips.com>
307 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
308 (mips16_opcodes): Replace `M' with `m' for "restore".
310 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
312 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
314 2018-02-13 Maciej W. Rozycki <macro@mips.com>
316 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
317 variable to `function_index'.
319 2018-02-13 Nick Clifton <nickc@redhat.com>
322 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
323 about truncation of printing.
325 2018-02-12 Henry Wong <henry@stuffedcow.net>
327 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
329 2018-02-05 Nick Clifton <nickc@redhat.com>
331 * po/pt_BR.po: Updated Brazilian Portuguese translation.
333 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
335 * i386-dis.c (enum): Add pconfig.
336 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
337 (cpu_flags): Add CpuPCONFIG.
338 * i386-opc.h (enum): Add CpuPCONFIG.
339 (i386_cpu_flags): Add cpupconfig.
340 * i386-opc.tbl: Add PCONFIG instruction.
341 * i386-init.h: Regenerate.
342 * i386-tbl.h: Likewise.
344 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
346 * i386-dis.c (enum): Add PREFIX_0F09.
347 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
348 (cpu_flags): Add CpuWBNOINVD.
349 * i386-opc.h (enum): Add CpuWBNOINVD.
350 (i386_cpu_flags): Add cpuwbnoinvd.
351 * i386-opc.tbl: Add WBNOINVD instruction.
352 * i386-init.h: Regenerate.
353 * i386-tbl.h: Likewise.
355 2018-01-17 Jim Wilson <jimw@sifive.com>
357 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
359 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
361 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
362 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
363 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
364 (cpu_flags): Add CpuIBT, CpuSHSTK.
365 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
366 (i386_cpu_flags): Add cpuibt, cpushstk.
367 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
368 * i386-init.h: Regenerate.
369 * i386-tbl.h: Likewise.
371 2018-01-16 Nick Clifton <nickc@redhat.com>
373 * po/pt_BR.po: Updated Brazilian Portugese translation.
374 * po/de.po: Updated German translation.
376 2018-01-15 Jim Wilson <jimw@sifive.com>
378 * riscv-opc.c (match_c_nop): New.
379 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
381 2018-01-15 Nick Clifton <nickc@redhat.com>
383 * po/uk.po: Updated Ukranian translation.
385 2018-01-13 Nick Clifton <nickc@redhat.com>
387 * po/opcodes.pot: Regenerated.
389 2018-01-13 Nick Clifton <nickc@redhat.com>
391 * configure: Regenerate.
393 2018-01-13 Nick Clifton <nickc@redhat.com>
397 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
399 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
400 * i386-tbl.h: Regenerate.
402 2018-01-10 Jan Beulich <jbeulich@suse.com>
404 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
405 * i386-tbl.h: Re-generate.
407 2018-01-10 Jan Beulich <jbeulich@suse.com>
409 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
410 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
411 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
412 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
413 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
414 Disp8MemShift of AVX512VL forms.
415 * i386-tbl.h: Re-generate.
417 2018-01-09 Jim Wilson <jimw@sifive.com>
419 * riscv-dis.c (maybe_print_address): If base_reg is zero,
420 then the hi_addr value is zero.
422 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
424 * arm-dis.c (arm_opcodes): Add csdb.
425 (thumb32_opcodes): Add csdb.
427 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
429 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
430 * aarch64-asm-2.c: Regenerate.
431 * aarch64-dis-2.c: Regenerate.
432 * aarch64-opc-2.c: Regenerate.
434 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
437 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
438 Remove AVX512 vmovd with 64-bit operands.
439 * i386-tbl.h: Regenerated.
441 2018-01-05 Jim Wilson <jimw@sifive.com>
443 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
446 2018-01-03 Alan Modra <amodra@gmail.com>
448 Update year range in copyright notice of all files.
450 2018-01-02 Jan Beulich <jbeulich@suse.com>
452 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
453 and OPERAND_TYPE_REGZMM entries.
455 For older changes see ChangeLog-2017
457 Copyright (C) 2018 Free Software Foundation, Inc.
459 Copying and distribution of this file, with or without modification,
460 are permitted in any medium without royalty provided the copyright
461 notice and this notice are preserved.
467 version-control: never