1 2014-08-14 Mike Frysinger <vapier@gentoo.org>
3 * bfin-dis.c (struct private): Add iw0.
4 (_print_insn_bfin): Assign iw0 to priv.iw0.
5 (print_insn_bfin): Drop ifetch and use priv.iw0.
7 2014-08-13 Mike Frysinger <vapier@gentoo.org>
9 * bfin-dis.c (comment, parallel): Move from global scope ...
10 (struct private): ... to this new struct.
11 (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
12 decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
13 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
14 decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
15 decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
16 decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
17 decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
18 print_insn_bfin): Declare private struct. Use priv's comment and
21 2014-08-13 Mike Frysinger <vapier@gentoo.org>
23 * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
24 (_print_insn_bfin): Add check for unaligned pc.
26 2014-08-13 Mike Frysinger <vapier@gentoo.org>
28 * bfin-dis.c (ifetch): New function.
29 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
32 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
34 * micromips-opc.c (COD): Rename throughout to...
35 (CM): New define, update to use INSN_COPROC_MOVE.
36 (LCD): Rename throughout to...
37 (LC): New define, update to use INSN_LOAD_COPROC.
38 * mips-opc.c: Likewise.
40 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
42 * micromips-opc.c (COD, LCD) New macros.
43 (cfc1, ctc1): Remove FP_S attribute.
44 (dmfc1, mfc1, mfhc1): Add LCD attribute.
45 (dmtc1, mtc1, mthc1): Add COD attribute.
46 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
48 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
49 Alexander Ivchenko <alexander.ivchenko@intel.com>
50 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
51 Sergey Lega <sergey.s.lega@intel.com>
52 Anna Tikhonova <anna.tikhonova@intel.com>
53 Ilya Tocar <ilya.tocar@intel.com>
54 Andrey Turetskiy <andrey.turetskiy@intel.com>
55 Ilya Verbin <ilya.verbin@intel.com>
56 Kirill Yukhin <kirill.yukhin@intel.com>
57 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
59 * i386-dis-evex.h: Updated.
60 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
61 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
62 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
63 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
65 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
66 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
67 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
68 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
69 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
70 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
71 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
72 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
73 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
74 (prefix_table): Add entries for new instructions.
75 (vex_len_table): Ditto.
77 (OP_E_memory): Update xmmq_mode handling.
78 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
79 (cpu_flags): Add CpuAVX512DQ.
80 * i386-init.h: Regenerared.
81 * i386-opc.h (CpuAVX512DQ): New.
82 (i386_cpu_flags): Add cpuavx512dq.
83 * i386-opc.tbl: Add AVX512DQ instructions.
84 * i386-tbl.h: Regenerate.
86 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
87 Alexander Ivchenko <alexander.ivchenko@intel.com>
88 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
89 Sergey Lega <sergey.s.lega@intel.com>
90 Anna Tikhonova <anna.tikhonova@intel.com>
91 Ilya Tocar <ilya.tocar@intel.com>
92 Andrey Turetskiy <andrey.turetskiy@intel.com>
93 Ilya Verbin <ilya.verbin@intel.com>
94 Kirill Yukhin <kirill.yukhin@intel.com>
95 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
97 * i386-dis-evex.h: Add new instructions (prefixes bellow).
98 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
99 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
100 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
101 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
102 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
103 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
104 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
105 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
106 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
107 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
108 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
109 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
110 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
111 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
112 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
113 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
114 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
115 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
116 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
117 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
118 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
119 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
120 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
121 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
122 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
123 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
124 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
125 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
126 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
127 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
128 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
129 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
130 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
131 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
132 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
133 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
134 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
135 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
136 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
137 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
138 (prefix_table): Add entries for new instructions.
140 (vex_len_table): Ditto.
141 (vex_w_table): Ditto.
142 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
143 mask_bd_mode handling.
144 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
146 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
148 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
149 (OP_EX): Add dqw_swap_mode handling.
150 (OP_VEX): Add mask_bd_mode handling.
151 (OP_Mask): Add mask_bd_mode handling.
152 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
153 (cpu_flags): Add CpuAVX512BW.
154 * i386-init.h: Regenerated.
155 * i386-opc.h (CpuAVX512BW): New.
156 (i386_cpu_flags): Add cpuavx512bw.
157 * i386-opc.tbl: Add AVX512BW instructions.
158 * i386-tbl.h: Regenerate.
160 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
161 Alexander Ivchenko <alexander.ivchenko@intel.com>
162 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
163 Sergey Lega <sergey.s.lega@intel.com>
164 Anna Tikhonova <anna.tikhonova@intel.com>
165 Ilya Tocar <ilya.tocar@intel.com>
166 Andrey Turetskiy <andrey.turetskiy@intel.com>
167 Ilya Verbin <ilya.verbin@intel.com>
168 Kirill Yukhin <kirill.yukhin@intel.com>
169 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
171 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
172 * i386-tbl.h: Regenerate.
174 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
175 Alexander Ivchenko <alexander.ivchenko@intel.com>
176 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
177 Sergey Lega <sergey.s.lega@intel.com>
178 Anna Tikhonova <anna.tikhonova@intel.com>
179 Ilya Tocar <ilya.tocar@intel.com>
180 Andrey Turetskiy <andrey.turetskiy@intel.com>
181 Ilya Verbin <ilya.verbin@intel.com>
182 Kirill Yukhin <kirill.yukhin@intel.com>
183 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
185 * i386-dis.c (intel_operand_size): Support 128/256 length in
186 vex_vsib_q_w_dq_mode.
187 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
188 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
189 (cpu_flags): Add CpuAVX512VL.
190 * i386-init.h: Regenerated.
191 * i386-opc.h (CpuAVX512VL): New.
192 (i386_cpu_flags): Add cpuavx512vl.
193 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
194 * i386-opc.tbl: Add AVX512VL instructions.
195 * i386-tbl.h: Regenerate.
197 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
199 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
200 * or1k-opinst.c: Regenerate.
202 2014-07-08 Ilya Tocar <ilya.tocar@intel.com>
204 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
205 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
207 2014-07-04 Alan Modra <amodra@gmail.com>
209 * configure.ac: Rename from configure.in.
210 * Makefile.in: Regenerate.
211 * config.in: Regenerate.
213 2014-07-04 Alan Modra <amodra@gmail.com>
215 * configure.in: Include bfd/version.m4.
216 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
217 (BFD_VERSION): Delete.
218 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
219 * configure: Regenerate.
220 * Makefile.in: Regenerate.
222 2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
223 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
224 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
225 Soundararajan <Sounderarajan.D@atmel.com>
227 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
228 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
229 machine is not avrtiny.
231 2014-06-26 Philippe De Muyter <phdm@macqel.be>
233 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
236 2014-06-12 Alan Modra <amodra@gmail.com>
238 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
239 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
241 2014-06-10 H.J. Lu <hongjiu.lu@intel.com>
243 * i386-dis.c (fwait_prefix): New.
244 (ckprefix): Set fwait_prefix.
245 (print_insn): Properly print prefixes before fwait.
247 2014-06-07 Alan Modra <amodra@gmail.com>
249 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
251 2014-06-05 Joel Brobecker <brobecker@adacore.com>
253 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
254 bfd's development.sh.
255 * Makefile.in, configure: Regenerate.
257 2014-06-03 Nick Clifton <nickc@redhat.com>
259 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
260 decide when extended addressing is being used.
262 2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
264 * sparc-opc.c (cas): Disable for LEON.
267 2014-05-20 Alan Modra <amodra@gmail.com>
269 * m68k-dis.c: Don't include setjmp.h.
271 2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
273 * i386-dis.c (ADDR16_PREFIX): Removed.
274 (ADDR32_PREFIX): Likewise.
275 (DATA16_PREFIX): Likewise.
276 (DATA32_PREFIX): Likewise.
277 (prefix_name): Updated.
278 (print_insn): Simplify data and address size prefixes processing.
280 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
282 * or1k-desc.c: Regenerated.
283 * or1k-desc.h: Likewise.
284 * or1k-opc.c: Likewise.
285 * or1k-opc.h: Likewise.
286 * or1k-opinst.c: Likewise.
288 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
290 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
295 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
297 (parse_mips_dis_option): Update MSA and virtualization support to
298 allow mips64r3 and mips64r5.
300 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
302 * mips-opc.c (G3): Remove I4.
304 2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
307 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
308 (end_codep): Likewise.
309 (mandatory_prefix): Likewise.
310 (active_seg_prefix): Likewise.
311 (ckprefix): Set active_seg_prefix to the active segment register
313 (seg_prefix): Removed.
314 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
315 for prefix index. Ignore the index if it is invalid and the
316 mandatory prefix isn't required.
317 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
318 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
319 in used_prefixes here. Don't print unused prefixes. Check
320 active_seg_prefix for the active segment register prefix.
321 Restore the DFLAG bit in sizeflag if the data size prefix is
322 unused. Check the unused mandatory PREFIX_XXX prefixes
323 (append_seg): Only print the segment register which gets used.
324 (OP_E_memory): Check active_seg_prefix for the segment register
327 (OP_OFF64): Likewise.
328 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
330 2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
333 * config.in: Regenerated.
334 * configure: Likewise.
335 * configure.in: Check if sigsetjmp is available.
336 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
337 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
338 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
339 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
340 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
341 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
342 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
343 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
344 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
345 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
346 (OPCODES_SIGSETJMP): Likewise.
347 (OPCODES_SIGLONGJMP): Likewise.
348 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
349 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
350 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
351 * xtensa-dis.c (dis_private): Replace jmp_buf with
353 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
354 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
355 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
356 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
357 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
359 2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
362 * i386-dis.c (print_insn): Handle prefixes before fwait.
364 2014-04-26 Alan Modra <amodra@gmail.com>
366 * po/POTFILES.in: Regenerate.
368 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
370 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
371 to allow the MIPS XPA ASE.
372 (parse_mips_dis_option): Process the -Mxpa option.
373 * mips-opc.c (XPA): New define.
374 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
375 locations of the ctc0 and cfc0 instructions.
377 2014-04-22 Christian Svensson <blue@cmd.nu>
379 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
380 * configure.in: Likewise.
381 * disassemble.c: Likewise.
382 * or1k-asm.c: New file.
383 * or1k-desc.c: New file.
384 * or1k-desc.h: New file.
385 * or1k-dis.c: New file.
386 * or1k-ibld.c: New file.
387 * or1k-opc.c: New file.
388 * or1k-opc.h: New file.
389 * or1k-opinst.c: New file.
390 * Makefile.in: Regenerate.
391 * configure: Regenerate.
392 * openrisc-asm.c: Delete.
393 * openrisc-desc.c: Delete.
394 * openrisc-desc.h: Delete.
395 * openrisc-dis.c: Delete.
396 * openrisc-ibld.c: Delete.
397 * openrisc-opc.c: Delete.
398 * openrisc-opc.h: Delete.
399 * or32-dis.c: Delete.
400 * or32-opc.c: Delete.
402 2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
404 * i386-dis.c (rm_table): Add encls, enclu.
405 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
406 (cpu_flags): Add CpuSE1.
407 * i386-opc.h (enum): Add CpuSE1.
408 (i386_cpu_flags): Add cpuse1.
409 * i386-opc.tbl: Add encls, enclu.
410 * i386-init.h: Regenerated.
411 * i386-tbl.h: Likewise.
413 2014-04-02 Anthony Green <green@moxielogic.com>
415 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
416 instructions, sex.b and sex.s.
418 2014-03-26 Jiong Wang <jiong.wang@arm.com>
420 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
423 2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
425 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
426 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
428 * i386-tbl.h: Regenerate.
430 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
432 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
433 %hstick_enable added.
435 2014-03-19 Nick Clifton <nickc@redhat.com>
437 * rx-decode.opc (bwl): Allow for bogus instructions with a size
439 (sbwl, ubwl, SCALE): Likewise.
440 * rx-decode.c: Regenerate.
442 2014-03-12 Alan Modra <amodra@gmail.com>
444 * Makefile.in: Regenerate.
446 2014-03-05 Alan Modra <amodra@gmail.com>
448 Update copyright years.
450 2014-03-04 Heiher <r@hev.cc>
452 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
454 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
456 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
457 so that they come after the Loongson extensions.
459 2014-03-03 Alan Modra <amodra@gmail.com>
461 * i386-gen.c (process_copyright): Emit copyright notice on one line.
463 2014-02-28 Alan Modra <amodra@gmail.com>
465 * msp430-decode.c: Regenerate.
467 2014-02-27 Jiong Wang <jiong.wang@arm.com>
469 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
470 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
472 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
474 * aarch64-opc.c (print_register_offset_address): Call
475 get_int_reg_name to prepare the register name.
477 2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
479 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
480 * i386-tbl.h: Regenerate.
482 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
484 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
485 (cpu_flags): Add CpuPREFETCHWT1.
486 * i386-init.h: Regenerate.
487 * i386-opc.h (CpuPREFETCHWT1): New.
488 (i386_cpu_flags): Add cpuprefetchwt1.
489 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
490 * i386-tbl.h: Regenerate.
492 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
494 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
496 * i386-tbl.h: Regenerate.
498 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
500 * i386-gen.c (output_cpu_flags): Don't output trailing space.
501 (output_opcode_modifier): Likewise.
502 (output_operand_type): Likewise.
503 * i386-init.h: Regenerated.
504 * i386-tbl.h: Likewise.
506 2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
508 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
510 (PREFIX enum): Add PREFIX_0FAE_REG_7.
511 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
512 (prefix_table): Add clflusopt.
513 (mod_table): Add xrstors, xsavec, xsaves.
514 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
515 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
516 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
517 * i386-init.h: Regenerate.
518 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
519 xsaves64, xsavec, xsavec64.
520 * i386-tbl.h: Regenerate.
522 2014-02-10 Alan Modra <amodra@gmail.com>
524 * po/POTFILES.in: Regenerate.
525 * po/opcodes.pot: Regenerate.
527 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
528 Jan Beulich <jbeulich@suse.com>
531 * i386-dis.c (OP_E_memory): Fix shift computation for
532 vex_vsib_q_w_dq_mode.
534 2014-01-09 Bradley Nelson <bradnelson@google.com>
535 Roland McGrath <mcgrathr@google.com>
537 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
538 last_rex_prefix is -1.
540 2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
542 * i386-gen.c (process_copyright): Update copyright year to 2014.
544 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
546 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
548 For older changes see ChangeLog-2013
550 Copyright (C) 2014 Free Software Foundation, Inc.
552 Copying and distribution of this file, with or without modification,
553 are permitted in any medium without royalty provided the copyright
554 notice and this notice are preserved.
560 version-control: never