1 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
3 * arm-dis.c (arm_opcodes): Add HLT.
4 (thumb_opcodes): Likewise.
6 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
8 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
10 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
12 * arm-dis.c (arm_opcodes): Add SEVL.
13 (thumb_opcodes): Likewise.
14 (thumb32_opcodes): Likewise.
16 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
18 * arm-dis.c (data_barrier_option): New function.
19 (print_insn_arm): Use data_barrier_option.
20 (print_insn_thumb32): Use data_barrier_option.
22 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
24 * arm-dis.c (COND_UNCOND): New constant.
25 (print_insn_coprocessor): Add support for %u format specifier.
26 (print_insn_neon): Likewise.
28 2012-08-21 David S. Miller <davem@davemloft.net>
30 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
33 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
35 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
36 vabsduh, vabsduw, mviwsplt.
38 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
40 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
43 * i386-opc.h: Update CpuPRFCHW comment.
45 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
46 * i386-init.h: Regenerated.
47 * i386-tbl.h: Likewise.
49 2012-08-17 Nick Clifton <nickc@redhat.com>
51 * po/uk.po: New Ukranian translation.
52 * configure.in (ALL_LINGUAS): Add uk.
53 * configure: Regenerate.
55 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
57 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
58 RBX for the third operand.
59 <"lswi">: Use RAX for second and NBI for the third operand.
61 2012-08-15 DJ Delorie <dj@redhat.com>
63 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
64 operands, so that data addresses can be corrected when not
66 * rl78-decode.c: Regenerate.
67 * rl78-dis.c (print_insn_rl78): Make order of modifiers
68 irrelevent. When the 'e' specifier is used on an operand and no
69 ES prefix is provided, adjust address to make it absolute.
71 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
73 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
75 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
77 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
79 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
81 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
82 macros, use local variables for info struct member accesses,
83 update the type of the variable used to hold the instruction
85 (print_insn_mips, print_mips16_insn_arg): Likewise.
86 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
87 local variables for info struct member accesses.
88 (print_insn_micromips): Add GET_OP_S local macro.
89 (_print_insn_mips): Update the type of the variable used to hold
92 2012-08-13 Ian Bolton <ian.bolton@arm.com>
93 Laurent Desnogues <laurent.desnogues@arm.com>
94 Jim MacArthur <jim.macarthur@arm.com>
95 Marcus Shawcroft <marcus.shawcroft@arm.com>
96 Nigel Stephens <nigel.stephens@arm.com>
97 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
98 Richard Earnshaw <rearnsha@arm.com>
99 Sofiane Naci <sofiane.naci@arm.com>
100 Tejas Belagod <tejas.belagod@arm.com>
101 Yufeng Zhang <yufeng.zhang@arm.com>
103 * Makefile.am: Add AArch64.
104 * Makefile.in: Regenerate.
105 * aarch64-asm.c: New file.
106 * aarch64-asm.h: New file.
107 * aarch64-dis.c: New file.
108 * aarch64-dis.h: New file.
109 * aarch64-gen.c: New file.
110 * aarch64-opc.c: New file.
111 * aarch64-opc.h: New file.
112 * aarch64-tbl.h: New file.
113 * configure.in: Add AArch64.
114 * configure: Regenerate.
115 * disassemble.c: Add AArch64.
116 * aarch64-asm-2.c: New file (automatically generated).
117 * aarch64-dis-2.c: New file (automatically generated).
118 * aarch64-opc-2.c: New file (automatically generated).
119 * po/POTFILES.in: Regenerate.
121 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
123 * micromips-opc.c (micromips_opcodes): Update comment.
124 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
125 instructions for IOCT as appropriate.
126 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
128 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
129 the result of a check for the -Wno-missing-field-initializers
131 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
132 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
134 (mips16-opc.lo): Likewise.
135 (micromips-opc.lo): Likewise.
136 * aclocal.m4: Regenerate.
137 * configure: Regenerate.
138 * Makefile.in: Regenerate.
140 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
143 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
144 * i386-init.h: Regenerated.
146 2012-08-09 Nick Clifton <nickc@redhat.com>
148 * po/vi.po: Updated Vietnamese translation.
150 2012-08-07 Roland McGrath <mcgrathr@google.com>
152 * i386-dis.c (reg_table): Fill out REG_0F0D table with
153 AMD-reserved cases as "prefetch".
154 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
155 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
156 (reg_table): Use those under REG_0F18.
157 (mod_table): Add those cases as "nop/reserved".
159 2012-08-07 Jan Beulich <jbeulich@suse.com>
161 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
163 2012-08-06 Roland McGrath <mcgrathr@google.com>
165 * i386-dis.c (print_insn): Print spaces between multiple excess
166 prefixes. Return actual number of excess prefixes consumed,
169 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
171 2012-08-06 Roland McGrath <mcgrathr@google.com>
172 Victor Khimenko <khim@google.com>
173 H.J. Lu <hongjiu.lu@intel.com>
175 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
176 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
177 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
178 (OP_E_register): Likewise.
179 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
181 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
183 * configure.in: Formatting.
184 * configure: Regenerate.
186 2012-08-01 Alan Modra <amodra@gmail.com>
188 * h8300-dis.c: Fix printf arg warnings.
189 * i960-dis.c: Likewise.
190 * mips-dis.c: Likewise.
191 * pdp11-dis.c: Likewise.
192 * sh-dis.c: Likewise.
193 * v850-dis.c: Likewise.
194 * configure.in: Formatting.
195 * configure: Regenerate.
196 * rl78-decode.c: Regenerate.
197 * po/POTFILES.in: Regenerate.
199 2012-07-31 Chao-Ying Fu <fu@mips.com>
200 Catherine Moore <clm@codesourcery.com>
201 Maciej W. Rozycki <macro@codesourcery.com>
203 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
204 (DSP_VOLA): Likewise.
205 (D32, D33): Likewise.
206 (micromips_opcodes): Add DSP ASE instructions.
207 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
208 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
210 2012-07-31 Jan Beulich <jbeulich@suse.com>
212 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
213 instruction group. Mark as requiring AVX2.
214 * i386-tbl.h: Re-generate.
216 2012-07-30 Nick Clifton <nickc@redhat.com>
218 * po/opcodes.pot: Updated template.
219 * po/es.po: Updated Spanish translation.
220 * po/fi.po: Updated Finnish translation.
222 2012-07-27 Mike Frysinger <vapier@gentoo.org>
224 * configure.in (BFD_VERSION): Run bfd/configure --version and
225 parse the output of that.
226 * configure: Regenerate.
228 2012-07-25 James Lemke <jwlemke@codesourcery.com>
230 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
232 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
233 Dr David Alan Gilbert <dave@treblig.org>
236 * arm-dis.c: Add necessary casts for printing integer values.
237 Use %s when printing string values.
238 * hppa-dis.c: Likewise.
239 * m68k-dis.c: Likewise.
240 * microblaze-dis.c: Likewise.
241 * mips-dis.c: Likewise.
242 * sparc-dis.c: Likewise.
244 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
247 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
248 (VEX_LEN_0FXOP_08_CD): Likewise.
249 (VEX_LEN_0FXOP_08_CE): Likewise.
250 (VEX_LEN_0FXOP_08_CF): Likewise.
251 (VEX_LEN_0FXOP_08_EC): Likewise.
252 (VEX_LEN_0FXOP_08_ED): Likewise.
253 (VEX_LEN_0FXOP_08_EE): Likewise.
254 (VEX_LEN_0FXOP_08_EF): Likewise.
255 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
256 vpcomub, vpcomuw, vpcomud, vpcomuq.
257 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
258 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
259 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
262 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
264 * i386-dis.c (PREFIX_0F38F6): New.
265 (prefix_table): Add adcx, adox instructions.
266 (three_byte_table): Use PREFIX_0F38F6.
267 (mod_table): Add rdseed instruction.
268 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
269 (cpu_flags): Likewise.
270 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
271 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
272 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
274 * i386-tbl.h: Regenerate.
275 * i386-init.h: Likewise.
277 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
279 * mips-dis.c: Remove gratuitous newline.
281 2012-07-05 Sean Keys <skeys@ipdatasys.com>
283 * xgate-dis.c: Removed an IF statement that will
284 always be false due to overlapping operand masks.
285 * xgate-opc.c: Corrected 'com' opcode entry and
288 2012-07-02 Roland McGrath <mcgrathr@google.com>
290 * i386-opc.tbl: Add RepPrefixOk to nop.
291 * i386-tbl.h: Regenerate.
293 2012-06-28 Nick Clifton <nickc@redhat.com>
295 * po/vi.po: Updated Vietnamese translation.
297 2012-06-22 Roland McGrath <mcgrathr@google.com>
299 * i386-opc.tbl: Add RepPrefixOk to ret.
300 * i386-tbl.h: Regenerate.
302 * i386-opc.h (RepPrefixOk): New enum constant.
303 (i386_opcode_modifier): New bitfield 'repprefixok'.
304 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
305 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
306 instructions that have IsString.
307 * i386-tbl.h: Regenerate.
309 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
311 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
312 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
313 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
314 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
315 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
316 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
317 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
318 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
319 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
321 2012-05-19 Alan Modra <amodra@gmail.com>
323 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
324 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
326 2012-05-18 Alan Modra <amodra@gmail.com>
328 * ia64-opc.c: Remove #include "ansidecl.h".
329 * z8kgen.c: Include sysdep.h first.
331 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
332 * bfin-dis.c: Likewise.
333 * i860-dis.c: Likewise.
334 * ia64-dis.c: Likewise.
335 * ia64-gen.c: Likewise.
336 * m68hc11-dis.c: Likewise.
337 * mmix-dis.c: Likewise.
338 * msp430-dis.c: Likewise.
339 * or32-dis.c: Likewise.
340 * rl78-dis.c: Likewise.
341 * rx-dis.c: Likewise.
342 * tic4x-dis.c: Likewise.
343 * tilegx-opc.c: Likewise.
344 * tilepro-opc.c: Likewise.
345 * rx-decode.c: Regenerate.
347 2012-05-17 James Lemke <jwlemke@codesourcery.com>
349 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
351 2012-05-17 James Lemke <jwlemke@codesourcery.com>
353 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
355 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
356 Nick Clifton <nickc@redhat.com>
359 * configure.in: Add check that sysdep.h has been included before
360 any system header files.
361 * configure: Regenerate.
362 * config.in: Regenerate.
363 * sysdep.h: Generate an error if included before config.h.
364 * alpha-opc.c: Include sysdep.h before any other header file.
365 * alpha-dis.c: Likewise.
366 * avr-dis.c: Likewise.
367 * cgen-opc.c: Likewise.
368 * cr16-dis.c: Likewise.
369 * cris-dis.c: Likewise.
370 * crx-dis.c: Likewise.
371 * d10v-dis.c: Likewise.
372 * d10v-opc.c: Likewise.
373 * d30v-dis.c: Likewise.
374 * d30v-opc.c: Likewise.
375 * h8500-dis.c: Likewise.
376 * i370-dis.c: Likewise.
377 * i370-opc.c: Likewise.
378 * m10200-dis.c: Likewise.
379 * m10300-dis.c: Likewise.
380 * micromips-opc.c: Likewise.
381 * mips-opc.c: Likewise.
382 * mips61-opc.c: Likewise.
383 * moxie-dis.c: Likewise.
384 * or32-opc.c: Likewise.
385 * pj-dis.c: Likewise.
386 * ppc-dis.c: Likewise.
387 * ppc-opc.c: Likewise.
388 * s390-dis.c: Likewise.
389 * sh-dis.c: Likewise.
390 * sh64-dis.c: Likewise.
391 * sparc-dis.c: Likewise.
392 * sparc-opc.c: Likewise.
393 * spu-dis.c: Likewise.
394 * tic30-dis.c: Likewise.
395 * tic54x-dis.c: Likewise.
396 * tic80-dis.c: Likewise.
397 * tic80-opc.c: Likewise.
398 * tilegx-dis.c: Likewise.
399 * tilepro-dis.c: Likewise.
400 * v850-dis.c: Likewise.
401 * v850-opc.c: Likewise.
402 * vax-dis.c: Likewise.
403 * w65-dis.c: Likewise.
404 * xgate-dis.c: Likewise.
405 * xtensa-dis.c: Likewise.
406 * rl78-decode.opc: Likewise.
407 * rl78-decode.c: Regenerate.
408 * rx-decode.opc: Likewise.
409 * rx-decode.c: Regenerate.
411 2012-05-17 Alan Modra <amodra@gmail.com>
413 * ppc_dis.c: Don't include elf/ppc.h.
415 2012-05-16 Meador Inge <meadori@codesourcery.com>
417 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
420 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
421 Stephane Carrez <stcarrez@nerim.fr>
423 * configure.in: Add S12X and XGATE co-processor support to m68hc11
425 * disassemble.c: Likewise.
426 * configure: Regenerate.
427 * m68hc11-dis.c: Make objdump output more consistent, use hex
428 instead of decimal and use 0x prefix for hex.
429 * m68hc11-opc.c: Add S12X and XGATE opcodes.
431 2012-05-14 James Lemke <jwlemke@codesourcery.com>
433 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
434 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
435 (vle_opcd_indices): New array.
436 (lookup_vle): New function.
437 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
438 (print_insn_powerpc): Likewise.
439 * ppc-opc.c: Likewise.
441 2012-05-14 Catherine Moore <clm@codesourcery.com>
442 Maciej W. Rozycki <macro@codesourcery.com>
443 Rhonda Wittels <rhonda@codesourcery.com>
444 Nathan Froyd <froydnj@codesourcery.com>
446 * ppc-opc.c (insert_arx, extract_arx): New functions.
447 (insert_ary, extract_ary): New functions.
448 (insert_li20, extract_li20): New functions.
449 (insert_rx, extract_rx): New functions.
450 (insert_ry, extract_ry): New functions.
451 (insert_sci8, extract_sci8): New functions.
452 (insert_sci8n, extract_sci8n): New functions.
453 (insert_sd4h, extract_sd4h): New functions.
454 (insert_sd4w, extract_sd4w): New functions.
455 (insert_vlesi, extract_vlesi): New functions.
456 (insert_vlensi, extract_vlensi): New functions.
457 (insert_vleui, extract_vleui): New functions.
458 (insert_vleil, extract_vleil): New functions.
459 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
460 (BI16, BI32, BO32, B8): New.
461 (B15, B24, CRD32, CRS): New.
462 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
463 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
464 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
465 (SH6_MASK): Use PPC_OPSHIFT_INV.
466 (SI8, UI5, OIMM5, UI7, BO16): New.
467 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
468 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
470 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
471 (OPVUP, OPVUP_MASK OPVUP): New
472 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
473 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
474 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
475 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
476 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
477 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
478 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
479 (SE_IM5, SE_IM5_MASK): New.
480 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
481 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
482 (BO32DNZ, BO32DZ): New.
483 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
485 (powerpc_opcodes): Add new VLE instructions. Update existing
486 instruction to include PPCVLE if supported.
487 * ppc-dis.c (ppc_opts): Add vle entry.
488 (get_powerpc_dialect): New function.
489 (powerpc_init_dialect): VLE support.
490 (print_insn_big_powerpc): Call get_powerpc_dialect.
491 (print_insn_little_powerpc): Likewise.
492 (operand_value_powerpc): Handle negative shift counts.
493 (print_insn_powerpc): Handle 2-byte instruction lengths.
495 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
498 * configure.in: Invoke ACX_HEADER_STRING.
499 * configure: Regenerate.
500 * config.in: Regenerate.
501 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
502 string.h and strings.h.
504 2012-05-11 Nick Clifton <nickc@redhat.com>
507 * arm-dis.c (print_insn): Fix detection of instruction mode in
508 files containing multiple executable sections.
510 2012-05-03 Sean Keys <skeys@ipdatasys.com>
512 * Makefile.in, configure: regenerate
513 * disassemble.c (disassembler): Recognize ARCH_XGATE.
514 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
516 * configure.in: Recognize xgate.
517 * xgate-dis.c, xgate-opc.c: New files for support of xgate
518 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
519 and opcode generation for xgate.
521 2012-04-30 DJ Delorie <dj@redhat.com>
523 * rx-decode.opc (MOV): Do not sign-extend immediates which are
524 already the maximum bit size.
525 * rx-decode.c: Regenerate.
527 2012-04-27 David S. Miller <davem@davemloft.net>
529 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
530 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
532 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
533 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
535 * sparc-opc.c (CBCOND): New define.
536 (CBCOND_XCC): Likewise.
537 (cbcond): New helper macro.
538 (sparc_opcodes): Add compare-and-branch instructions.
540 * sparc-dis.c (print_insn_sparc): Handle ')'.
541 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
543 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
544 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
546 2012-04-12 David S. Miller <davem@davemloft.net>
548 * sparc-dis.c (X_DISP10): Define.
549 (print_insn_sparc): Handle '='.
551 2012-04-01 Mike Frysinger <vapier@gentoo.org>
553 * bfin-dis.c (fmtconst): Replace decimal handling with a single
554 sprintf call and the '*' field width.
556 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
558 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
560 2012-03-16 Alan Modra <amodra@gmail.com>
562 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
563 (powerpc_opcd_indices): Bump array size.
564 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
565 corresponding to unused opcodes to following entry.
566 (lookup_powerpc): New function, extracted and optimised from..
567 (print_insn_powerpc): ..here.
569 2012-03-15 Alan Modra <amodra@gmail.com>
570 James Lemke <jwlemke@codesourcery.com>
572 * disassemble.c (disassemble_init_for_target): Handle ppc init.
573 * ppc-dis.c (private): New var.
574 (powerpc_init_dialect): Don't return calloc failure, instead use
576 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
577 (powerpc_opcd_indices): New array.
578 (disassemble_init_powerpc): New function.
579 (print_insn_big_powerpc): Don't init dialect here.
580 (print_insn_little_powerpc): Likewise.
581 (print_insn_powerpc): Start search using powerpc_opcd_indices.
583 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
585 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
586 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
587 (PPCVEC2, PPCTMR, E6500): New short names.
588 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
589 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
590 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
591 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
592 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
593 optional operands on sync instruction for E6500 target.
595 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
597 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
599 2012-02-27 Alan Modra <amodra@gmail.com>
601 * mt-dis.c: Regenerate.
603 2012-02-27 Alan Modra <amodra@gmail.com>
605 * v850-opc.c (extract_v8): Rearrange to make it obvious this
606 is the inverse of corresponding insert function.
607 (extract_d22, extract_u9, extract_r4): Likewise.
608 (extract_d9): Correct sign extension.
609 (extract_d16_15): Don't assume "long" is 32 bits, and don't
610 rely on implementation defined behaviour for shift right of
612 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
613 (extract_d23): Likewise, and correct mask.
615 2012-02-27 Alan Modra <amodra@gmail.com>
617 * crx-dis.c (print_arg): Mask constant to 32 bits.
618 * crx-opc.c (cst4_map): Use int array.
620 2012-02-27 Alan Modra <amodra@gmail.com>
622 * arc-dis.c (BITS): Don't use shifts to mask off bits.
623 (FIELDD): Sign extend with xor,sub.
625 2012-02-25 Walter Lee <walt@tilera.com>
627 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
628 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
629 TILEPRO_OPC_LW_TLS_SN.
631 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
633 * i386-opc.h (HLEPrefixNone): New.
634 (HLEPrefixLock): Likewise.
635 (HLEPrefixAny): Likewise.
636 (HLEPrefixRelease): Likewise.
638 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
640 * i386-dis.c (HLE_Fixup1): New.
641 (HLE_Fixup2): Likewise.
642 (HLE_Fixup3): Likewise.
649 (MOD_C6_REG_7): Likewise.
650 (MOD_C7_REG_7): Likewise.
651 (RM_C6_REG_7): Likewise.
652 (RM_C7_REG_7): Likewise.
653 (XACQUIRE_PREFIX): Likewise.
654 (XRELEASE_PREFIX): Likewise.
655 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
656 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
657 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
658 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
659 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
660 MOD_C6_REG_7 and MOD_C7_REG_7.
661 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
662 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
664 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
665 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
667 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
669 (cpu_flags): Add CpuHLE and CpuRTM.
670 (opcode_modifiers): Add HLEPrefixOk.
672 * i386-opc.h (CpuHLE): New.
674 (HLEPrefixOk): Likewise.
675 (i386_cpu_flags): Add cpuhle and cpurtm.
676 (i386_opcode_modifier): Add hleprefixok.
678 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
679 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
680 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
681 operand. Add xacquire, xrelease, xabort, xbegin, xend and
683 * i386-init.h: Regenerated.
684 * i386-tbl.h: Likewise.
686 2012-01-24 DJ Delorie <dj@redhat.com>
688 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
689 * rl78-decode.c: Regenerate.
691 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
694 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
696 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
698 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
699 register and move them after pmove with PSR/PCSR register.
701 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
703 * i386-dis.c (mod_table): Add vmfunc.
705 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
706 (cpu_flags): CpuVMFUNC.
708 * i386-opc.h (CpuVMFUNC): New.
709 (i386_cpu_flags): Add cpuvmfunc.
711 * i386-opc.tbl: Add vmfunc.
712 * i386-init.h: Regenerated.
713 * i386-tbl.h: Likewise.
715 For older changes see ChangeLog-2011
721 version-control: never