1 2006-11-16 Nathan Sidwell <nathan@codesourcery.com>
3 * m68k-opc.c (m68k_opcodes): Place trap instructions before set
4 conditionals. Add tpf coldfire instruction as alias for trapf.
6 2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
8 * i386-dis.c (print_insn): Check PREFIX_REPNZ before
9 PREFIX_DATA when prefix user table is used.
11 2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
13 * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
14 (twobyte_uses_DATA_prefix): This.
15 (twobyte_uses_REPNZ_prefix): New.
16 (twobyte_uses_REPZ_prefix): Likewise.
17 (threebyte_0x38_uses_DATA_prefix): Likewise.
18 (threebyte_0x38_uses_REPNZ_prefix): Likewise.
19 (threebyte_0x38_uses_REPZ_prefix): Likewise.
20 (threebyte_0x3a_uses_DATA_prefix): Likewise.
21 (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
22 (threebyte_0x3a_uses_REPZ_prefix): Likewise.
23 (print_insn): Updated checking usages of DATA/REPNZ/REPZ
26 2006-11-06 Troy Rollo <troy@corvu.com.au>
28 * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
30 2006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
32 * score-opc.h (score_opcodes): Delete modifier '0x'.
34 2006-10-30 Paul Brook <paul@codesourcery.com>
36 * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
37 (get_sym_code_type): New function.
38 (print_insn): Search for mapping symbols.
40 2006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
42 * score-dis.c (print_insn): Correct the error code to print
43 correct PCE instruction disassembly.
45 2006-10-26 Ben Elliston <bje@au.ibm.com>
46 Anton Blanchard <anton@samba.org>
47 Peter Bergner <bergner@vnet.ibm.com>
49 * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
50 AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
52 (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
53 "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
54 Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
55 "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
56 "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
57 "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
58 "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
59 "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
60 "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
61 "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
62 "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
63 "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
64 "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
65 "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
66 "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
67 "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
68 "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
69 "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
70 "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
71 "diexq" and "diexq." opcodes.
73 2006-10-26 Daniel Jacobowitz <dan@codesourcery.com>
75 * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
77 2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
78 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
79 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
80 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
81 Alan Modra <amodra@bigpond.net.au>
83 * spu-dis.c: New file.
84 * spu-opc.c: New file.
85 * configure.in: Add SPU support.
86 * disassemble.c: Likewise.
87 * Makefile.am: Likewise. Run "make dep-am".
88 * Makefile.in: Regenerate.
89 * configure: Regenerate.
90 * po/POTFILES.in: Regenerate.
92 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
94 * ppc-opc.c (CELL): New define.
95 (powerpc_opcodes): Enable hrfid for Cell. Add ldbrx and stdbrx,
96 cell specific instructions. Add {st,l}x{r,l}{,l} cell specific
98 * ppc-dis.c (powerpc_dialect): Handle cell.
100 2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
102 * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
103 amdfam10 architecture.
105 (print_insn): Disallow REP prefix for POPCNT.
107 2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
109 * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
112 2006-10-18 Dave Brolley <brolley@redhat.com>
114 * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
115 * configure: Regenerated.
117 2006-09-29 Alan Modra <amodra@bigpond.net.au>
119 * po/POTFILES.in: Regenerate.
121 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
122 Joseph Myers <joseph@codesourcery.com>
123 Ian Lance Taylor <ian@wasabisystems.com>
124 Ben Elliston <bje@wasabisystems.com>
126 * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
127 only be used with the default multiply-add operation, so if N is
128 set, don't bother printing X. Add new iwmmxt instructions.
129 (IWMMXT_INSN_COUNT): Update.
130 (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
132 (print_insn_coprocessor): Check for iWMMXt2. Handle format
135 2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
138 * i386-dis.c (prefix_user_table): Fix the second operand of
139 maskmovdqu instruction to allow only %xmm register instead of
140 both %xmm register and memory.
142 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
145 * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
148 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
150 * score-dis.c: New file.
151 * score-opc.h: New file.
152 * Makefile.am: Add Score files.
153 * Makefile.in: Regenerate.
154 * configure.in: Add support for Score target.
155 * configure: Regenerate.
156 * disassemble.c: Add support for Score target.
158 2006-09-16 Nick Clifton <nickc@redhat.com>
159 Pedro Alves <pedro_alves@portugalmail.pt>
161 * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
162 macros defined in bfd.h.
163 * cris-dis.c: Likewise.
164 * h8300-dis.c: Likewise.
165 * i386-dis.c: Likewise.
166 * ia64-gen.c: Likewise.
167 * mips-dis: Likewise.
169 2006-09-04 Paul Brook <paul@codesourcery.com>
171 * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
173 2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
175 * i386-dis.c (three_byte_table): Expand to 256 elements.
177 2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
180 * i386-dis.c (MXC,EMC): Define.
181 (OP_MXC): New function to handle cvt* (convert instructions) between
182 %xmm and %mm register correctly.
184 (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
185 instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
188 2006-07-29 Richard Sandiford <richard@codesourcery.com>
190 * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
193 2006-07-19 Paul Brook <paul@codesourcery.com>
195 * armd-dis.c (arm_opcodes): Fix rbit opcode.
197 2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
199 * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
200 "sldt", "str" and "smsw".
202 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
205 * i386-dis.c (GRP11_C6): NEW.
206 (GRP11_C7): Likewise.
213 (GRPPADLCK1): Likewise.
214 (GRPPADLCK2): Likewise.
215 (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
217 (grps): Add entries for GRP11_C6 and GRP11_C7.
219 2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
220 Michael Meissner <michael.meissner@amd.com>
222 * i386-dis.c (dis386): Add support for 4 operand instructions. Add
223 support for amdfam10 SSE4a/ABM instructions. Modify all
224 initializer macros to have additional arguments. Disallow REP
225 prefix for non-string instructions.
228 2006-07-05 Julian Brown <julian@codesourcery.com>
230 * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
232 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
234 * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
235 (twobyte_has_modrm): Set 1 for 0x1f.
237 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
239 * i386-dis.c (NOP_Fixup): Removed.
241 (NOP_Fixup2): Likewise.
242 (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
244 2006-06-12 Julian Brown <julian@codesourcery.com>
246 * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
249 2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
251 * i386.c (GRP10): Renamed to ...
253 (GRP11): Renamed to ...
255 (GRP12): Renamed to ...
257 (GRP13): Renamed to ...
259 (GRP14): Renamed to ...
261 (dis386_twobyte): Updated.
264 2006-06-09 Nick Clifton <nickc@redhat.com>
266 * po/fi.po: Updated Finnish translation.
268 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
270 * po/Make-in (pdf, ps): New dummy targets.
272 2006-06-06 Paul Brook <paul@codesourcery.com>
274 * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
276 (neon_opcodes): Add conditional execution specifiers.
277 (thumb_opcodes): Ditto.
278 (thumb32_opcodes): Ditto.
279 (arm_conditional): Change 0xe to "al" and add "" to end.
280 (ifthen_state, ifthen_next_state, ifthen_address): New.
281 (IFTHEN_COND): Define.
282 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
283 (print_insn_arm): Change %c to use new values of arm_conditional.
284 (print_insn_thumb16): Print thumb conditions. Add %I.
285 (print_insn_thumb32): Print thumb conditions.
286 (find_ifthen_state): New function.
287 (print_insn): Track IT block state.
289 2006-06-06 Ben Elliston <bje@au.ibm.com>
290 Anton Blanchard <anton@samba.org>
291 Peter Bergner <bergner@vnet.ibm.com>
293 * ppc-dis.c (powerpc_dialect): Handle power6 option.
294 (print_ppc_disassembler_options): Mention power6.
296 2006-06-06 Thiemo Seufer <ths@mips.com>
297 Chao-ying Fu <fu@mips.com>
299 * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
300 * mips-opc.c: Add DSP64 instructions.
302 2006-06-06 Alan Modra <amodra@bigpond.net.au>
304 * m68hc11-dis.c (print_insn): Warning fix.
306 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
308 * po/Make-in (top_builddir): Define.
310 2006-06-05 Alan Modra <amodra@bigpond.net.au>
312 * Makefile.am: Run "make dep-am".
313 * Makefile.in: Regenerate.
314 * config.in: Regenerate.
316 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
318 * Makefile.am (INCLUDES): Use @INCINTL@.
319 * acinclude.m4: Include new gettext macros.
320 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
321 Remove local code for po/Makefile.
322 * Makefile.in, aclocal.m4, configure: Regenerated.
324 2006-05-30 Nick Clifton <nickc@redhat.com>
326 * po/es.po: Updated Spanish translation.
328 2006-05-25 Richard Sandiford <richard@codesourcery.com>
330 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
331 and fmovem entries. Put register list entries before immediate
332 mask entries. Use "l" rather than "L" in the fmovem entries.
333 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
335 (m68k_scan_mask): New function, split out from...
336 (print_insn_m68k): ...here. If no architecture has been set,
337 first try printing an m680x0 instruction, then try a Coldfire one.
339 2006-05-24 Nick Clifton <nickc@redhat.com>
341 * po/ga.po: Updated Irish translation.
343 2006-05-22 Nick Clifton <nickc@redhat.com>
345 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
347 2006-05-22 Nick Clifton <nickc@redhat.com>
349 * po/nl.po: Updated translation.
351 2006-05-18 Alan Modra <amodra@bigpond.net.au>
353 * avr-dis.c: Formatting fix.
355 2006-05-14 Thiemo Seufer <ths@mips.com>
357 * mips16-opc.c (I1, I32, I64): New shortcut defines.
358 (mips16_opcodes): Change membership of instructions to their
361 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
363 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
365 2006-05-05 Julian Brown <julian@codesourcery.com>
367 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
370 2006-05-05 Thiemo Seufer <ths@mips.com>
371 David Ung <davidu@mips.com>
373 * mips-opc.c: Add macro for cache instruction.
375 2006-05-04 Thiemo Seufer <ths@mips.com>
376 Nigel Stephens <nigel@mips.com>
377 David Ung <davidu@mips.com>
379 * mips-dis.c (mips_arch_choices): Add smartmips instruction
380 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
381 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
383 * mips-opc.c: fix random typos in comments.
384 (INSN_SMARTMIPS): New defines.
385 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
386 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
387 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
388 FP_S and FP_D flags to denote single and double register
389 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
390 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
391 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
392 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
394 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
396 2006-05-03 Thiemo Seufer <ths@mips.com>
398 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
400 2006-05-02 Thiemo Seufer <ths@mips.com>
401 Nigel Stephens <nigel@mips.com>
402 David Ung <davidu@mips.com>
404 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
405 (print_mips16_insn_arg): Force mips16 to odd addresses.
407 2006-04-30 Thiemo Seufer <ths@mips.com>
408 David Ung <davidu@mips.com>
410 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
412 * mips-dis.c (print_insn_args): Adds udi argument handling.
414 2006-04-28 James E Wilson <wilson@specifix.com>
416 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
419 2006-04-28 Thiemo Seufer <ths@mips.com>
420 David Ung <davidu@mips.com>
421 Nigel Stephens <nigel@mips.com>
423 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
426 2006-04-28 Thiemo Seufer <ths@mips.com>
427 Nigel Stephens <nigel@mips.com>
428 David Ung <davidu@mips.com>
430 * mips-dis.c (print_insn_args): Add mips_opcode argument.
431 (print_insn_mips): Adjust print_insn_args call.
433 2006-04-28 Thiemo Seufer <ths@mips.com>
434 Nigel Stephens <nigel@mips.com>
436 * mips-dis.c (print_insn_args): Print $fcc only for FP
437 instructions, use $cc elsewise.
439 2006-04-28 Thiemo Seufer <ths@mips.com>
440 Nigel Stephens <nigel@mips.com>
442 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
443 Map MIPS16 registers to O32 names.
444 (print_mips16_insn_arg): Use mips16_reg_names.
446 2006-04-26 Julian Brown <julian@codesourcery.com>
448 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
451 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
452 Julian Brown <julian@codesourcery.com>
454 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
455 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
456 Add unified load/store instruction names.
457 (neon_opcode_table): New.
458 (arm_opcodes): Expand meaning of %<bitfield>['`?].
459 (arm_decode_bitfield): New.
460 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
461 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
462 (print_insn_neon): New.
463 (print_insn_arm): Adjust print_insn_coprocessor call. Call
464 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
465 (print_insn_thumb32): Likewise.
467 2006-04-19 Alan Modra <amodra@bigpond.net.au>
469 * Makefile.am: Run "make dep-am".
470 * Makefile.in: Regenerate.
472 2006-04-19 Alan Modra <amodra@bigpond.net.au>
474 * avr-dis.c (avr_operand): Warning fix.
476 * configure: Regenerate.
478 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
480 * po/POTFILES.in: Regenerated.
482 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
485 * avr-dis.c (avr_operand): Arrange for a comment to appear before
486 the symolic form of an address, so that the output of objdump -d
489 2006-04-10 DJ Delorie <dj@redhat.com>
491 * m32c-asm.c: Regenerate.
493 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
495 * Makefile.am: Add install-html target.
496 * Makefile.in: Regenerate.
498 2006-04-06 Nick Clifton <nickc@redhat.com>
500 * po/vi/po: Updated Vietnamese translation.
502 2006-03-31 Paul Koning <ni1d@arrl.net>
504 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
506 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
508 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
509 logic to identify halfword shifts.
511 2006-03-16 Paul Brook <paul@codesourcery.com>
513 * arm-dis.c (arm_opcodes): Rename swi to svc.
514 (thumb_opcodes): Ditto.
516 2006-03-13 DJ Delorie <dj@redhat.com>
518 * m32c-asm.c: Regenerate.
519 * m32c-desc.c: Likewise.
520 * m32c-desc.h: Likewise.
521 * m32c-dis.c: Likewise.
522 * m32c-ibld.c: Likewise.
523 * m32c-opc.c: Likewise.
524 * m32c-opc.h: Likewise.
526 2006-03-10 DJ Delorie <dj@redhat.com>
528 * m32c-desc.c: Regenerate with mul.l, mulu.l.
529 * m32c-opc.c: Likewise.
530 * m32c-opc.h: Likewise.
533 2006-03-09 Nick Clifton <nickc@redhat.com>
535 * po/sv.po: Updated Swedish translation.
537 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
540 * i386-dis.c (REP_Fixup): New function.
541 (AL): Remove duplicate.
546 (indirDXr): Likewise.
549 (dis386): Updated entries of ins, outs, movs, lods and stos.
551 2006-03-05 Nick Clifton <nickc@redhat.com>
553 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
554 signed 32-bit value into an unsigned 32-bit field when the host is
556 * fr30-ibld.c: Regenerate.
557 * frv-ibld.c: Regenerate.
558 * ip2k-ibld.c: Regenerate.
559 * iq2000-asm.c: Regenerate.
560 * iq2000-ibld.c: Regenerate.
561 * m32c-ibld.c: Regenerate.
562 * m32r-ibld.c: Regenerate.
563 * openrisc-ibld.c: Regenerate.
564 * xc16x-ibld.c: Regenerate.
565 * xstormy16-ibld.c: Regenerate.
567 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
569 * xc16x-asm.c: Regenerate.
570 * xc16x-dis.c: Regenerate.
572 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
574 * po/Make-in: Add html target.
576 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
578 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
579 Intel Merom New Instructions.
580 (THREE_BYTE_0): Likewise.
581 (THREE_BYTE_1): Likewise.
582 (three_byte_table): Likewise.
583 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
584 THREE_BYTE_1 for entry 0x3a.
585 (twobyte_has_modrm): Updated.
586 (twobyte_uses_SSE_prefix): Likewise.
587 (print_insn): Handle 3-byte opcodes used by Intel Merom New
590 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
592 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
593 (v9_hpriv_reg_names): New table.
594 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
595 New cases '$' and '%' for read/write hyperprivileged register.
596 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
597 window handling and rdhpr/wrhpr instructions.
599 2006-02-24 DJ Delorie <dj@redhat.com>
601 * m32c-desc.c: Regenerate with linker relaxation attributes.
602 * m32c-desc.h: Likewise.
603 * m32c-dis.c: Likewise.
604 * m32c-opc.c: Likewise.
606 2006-02-24 Paul Brook <paul@codesourcery.com>
608 * arm-dis.c (arm_opcodes): Add V7 instructions.
609 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
610 (print_arm_address): New function.
611 (print_insn_arm): Use it. Add 'P' and 'U' cases.
612 (psr_name): New function.
613 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
615 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
617 * ia64-opc-i.c (bXc): New.
619 (OpX2TaTbYaXcC): Likewise.
622 (ia64_opcodes_i): Add instructions for tf.
624 * ia64-opc.h (IMMU5b): New.
626 * ia64-asmtab.c: Regenerated.
628 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
630 * ia64-gen.c: Update copyright years.
631 * ia64-opc-b.c: Likewise.
633 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
635 * ia64-gen.c (lookup_regindex): Handle ".vm".
636 (print_dependency_table): Handle '\"'.
638 * ia64-ic.tbl: Updated from SDM 2.2.
639 * ia64-raw.tbl: Likewise.
640 * ia64-waw.tbl: Likewise.
641 * ia64-asmtab.c: Regenerated.
643 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
645 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
646 Anil Paranjape <anilp1@kpitcummins.com>
647 Shilin Shakti <shilins@kpitcummins.com>
649 * xc16x-desc.h: New file
650 * xc16x-desc.c: New file
651 * xc16x-opc.h: New file
652 * xc16x-opc.c: New file
653 * xc16x-ibld.c: New file
654 * xc16x-asm.c: New file
655 * xc16x-dis.c: New file
656 * Makefile.am: Entries for xc16x
657 * Makefile.in: Regenerate
658 * cofigure.in: Add xc16x target information.
659 * configure: Regenerate.
660 * disassemble.c: Add xc16x target information.
662 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
664 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
667 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
669 * i386-dis.c ('Z'): Add a new macro.
670 (dis386_twobyte): Use "movZ" for control register moves.
672 2006-02-10 Nick Clifton <nickc@redhat.com>
674 * iq2000-asm.c: Regenerate.
676 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
678 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
680 2006-01-26 David Ung <davidu@mips.com>
682 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
683 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
684 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
685 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
686 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
688 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
690 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
691 ld_d_r, pref_xd_cb): Use signed char to hold data to be
693 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
694 buffer overflows when disassembling instructions like
696 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
697 operand, if the offset is negative.
699 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
701 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
702 unsigned char to hold data to be disassembled.
704 2006-01-17 Andreas Schwab <schwab@suse.de>
707 * disassemble.c (disassemble_init_for_target): Set
708 disassembler_needs_relocs for bfd_arch_arm.
710 2006-01-16 Paul Brook <paul@codesourcery.com>
712 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
713 f?add?, and f?sub? instructions.
715 2006-01-16 Nick Clifton <nickc@redhat.com>
717 * po/zh_CN.po: New Chinese (simplified) translation.
718 * configure.in (ALL_LINGUAS): Add "zh_CH".
719 * configure: Regenerate.
721 2006-01-05 Paul Brook <paul@codesourcery.com>
723 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
725 2006-01-06 DJ Delorie <dj@redhat.com>
727 * m32c-desc.c: Regenerate.
728 * m32c-opc.c: Regenerate.
729 * m32c-opc.h: Regenerate.
731 2006-01-03 DJ Delorie <dj@redhat.com>
733 * cgen-ibld.in (extract_normal): Avoid memory range errors.
734 * m32c-ibld.c: Regenerated.
736 For older changes see ChangeLog-2005
742 version-control: never