1 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-gen.c (opcode_modifiers): Add NoAVX.
5 * i386-opc.h (NoAVX): New.
7 (i386_opcode_modifier): Add noavx.
9 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
10 instructions which don't have AVX equivalent.
11 * i386-tbl.h: Regenerated.
13 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
15 * i386-dis.c (OP_VEX_FMA): New.
16 (OP_EX_VexImmW): Likewise.
18 (Vex128FMA): Likewise.
19 (EXVexImmW): Likewise.
20 (get_vex_imm8): Likewise.
21 (OP_EX_VexReg): Likewise.
22 (vex_i4_done): Renamed to ...
24 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
25 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
27 (print_insn): Updated.
28 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
29 (OP_REG_VexI4): Check invalid high registers.
31 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
32 Michael Meissner <michael.meissner@amd.com>
34 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
35 * i386-tbl.h: Regenerate from i386-opc.tbl.
37 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
39 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
40 accept Power E500MC instructions.
41 (print_ppc_disassembler_options): Document -Me500mc.
42 * ppc-opc.c (DUIS, DUI, T): New.
43 (XRT, XRTRA): Likewise.
45 (powerpc_opcodes): Add new Power E500MC instructions.
47 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
49 * s390-dis.c (init_disasm): Evaluate disassembler_options.
50 (print_s390_disassembler_options): New function.
51 * disassemble.c (disassembler_usage): Invoke
52 print_s390_disassembler_options.
54 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
56 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
57 of local variables used for mnemonic parsing: prefix, suffix and
60 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
62 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
63 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
64 (s390_crb_extensions): New extensions table.
65 (insertExpandedMnemonic): Handle '$' tag.
66 * s390-opc.txt: Remove conditional jump variants which can now
67 be expanded automatically.
68 Replace '*' tag with '$' in the compare and branch instructions.
70 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
72 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
73 (PREFIX_VEX_3AXX): Likewis.
75 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
77 * i386-opc.tbl: Remove 4 extra blank lines.
79 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
81 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
82 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
83 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
84 * i386-opc.tbl: Likewise.
86 * i386-opc.h (CpuCLMUL): Renamed to ...
89 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
91 * i386-init.h: Regenerated.
93 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
95 * i386-dis.c (OP_E_register): New.
96 (OP_E_memory): Likewise.
98 (OP_EX_Vex): Likewise.
99 (OP_EX_VexW): Likewise.
100 (OP_XMM_Vex): Likewise.
101 (OP_XMM_VexW): Likewise.
102 (OP_REG_VexI4): Likewise.
103 (PCLMUL_Fixup): Likewise.
104 (VEXI4_Fixup): Likewise.
105 (VZERO_Fixup): Likewise.
106 (VCMP_Fixup): Likewise.
107 (VPERMIL2_Fixup): Likewise.
108 (rex_original): Likewise.
109 (rex_ignored): Likewise.
130 (VPERMIL2): Likewise.
131 (xmm_mode): Likewise.
132 (xmmq_mode): Likewise.
133 (ymmq_mode): Likewise.
134 (vex_mode): Likewise.
135 (vex128_mode): Likewise.
136 (vex256_mode): Likewise.
137 (USE_VEX_C4_TABLE): Likewise.
138 (USE_VEX_C5_TABLE): Likewise.
139 (USE_VEX_LEN_TABLE): Likewise.
140 (VEX_C4_TABLE): Likewise.
141 (VEX_C5_TABLE): Likewise.
142 (VEX_LEN_TABLE): Likewise.
143 (REG_VEX_XX): Likewise.
144 (MOD_VEX_XXX): Likewise.
145 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
146 (PREFIX_0F3A44): Likewise.
147 (PREFIX_0F3ADF): Likewise.
148 (PREFIX_VEX_XXX): Likewise.
150 (VEX_OF38): Likewise.
151 (VEX_OF3A): Likewise.
152 (VEX_LEN_XXX): Likewise.
154 (need_vex): Likewise.
155 (need_vex_reg): Likewise.
156 (vex_i4_done): Likewise.
157 (vex_table): Likewise.
158 (vex_len_table): Likewise.
159 (OP_REG_VexI4): Likewise.
160 (vex_cmp_op): Likewise.
161 (pclmul_op): Likewise.
162 (vpermil2_op): Likewise.
165 (PREFIX_0F38F0): Likewise.
166 (PREFIX_0F3A60): Likewise.
167 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
168 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
169 and PREFIX_VEX_XXX entries.
170 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
171 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
173 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
174 Add MOD_VEX_XXX entries.
175 (ckprefix): Initialize rex_original and rex_ignored. Store the
176 REX byte in rex_original.
177 (get_valid_dis386): Handle the implicit prefix in VEX prefix
178 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
179 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
180 calling get_valid_dis386. Use rex_original and rex_ignored when
182 (putop): Handle "XY".
183 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
185 (OP_E_extended): Updated to use OP_E_register and
187 (OP_XMM): Handle VEX.
189 (XMM_Fixup): Likewise.
190 (CMP_Fixup): Use ARRAY_SIZE.
192 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
193 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
194 (operand_type_init): Add OPERAND_TYPE_REGYMM and
195 OPERAND_TYPE_VEX_IMM4.
196 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
197 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
198 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
199 VexImmExt and SSE2AVX.
200 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
202 * i386-opc.h (CpuAVX): New.
204 (CpuCLMUL): Likewise.
215 (Vex3Sources): Likewise.
216 (VexImmExt): Likewise.
220 (Vex_Imm4): Likewise.
221 (Implicit1stXmm0): Likewise.
224 (ByteOkIntel): Likewise.
227 (Unspecified): Likewise.
229 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
230 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
231 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
232 vex3sources, veximmext and sse2avx.
233 (i386_operand_type): Add regymm, ymmword and vex_imm4.
235 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
237 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
239 * i386-init.h: Regenerated.
240 * i386-tbl.h: Likewise.
242 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
244 From Robin Getz <robin.getz@analog.com>
245 * bfin-dis.c (bu32): Typedef.
246 (enum const_forms_t): Add c_uimm32 and c_huimm32.
247 (constant_formats[]): Add uimm32 and huimm16.
252 (luimm16_val): Define.
253 (struct saved_state): Define.
254 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
255 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
256 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
258 (decode_LDIMMhalf_0): Print out the whole register value.
260 From Jie Zhang <jie.zhang@analog.com>
261 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
262 multiply and multiply-accumulate to data register instruction.
264 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
265 c_imm32, c_huimm32e): Define.
266 (constant_formats): Add flags for printing decimal, leading spaces, and
268 (comment, parallel): Add global flags in all disassembly.
269 (fmtconst): Take advantage of new flags, and print default in hex.
270 (fmtconst_val): Likewise.
271 (decode_macfunc): Be consistant with spaces, tabs, comments,
272 capitalization in disassembly, fix minor coding style issues.
273 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
274 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
275 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
276 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
277 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
278 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
279 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
280 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
281 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
282 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
283 _print_insn_bfin, print_insn_bfin): Likewise.
285 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
287 * aclocal.m4: Regenerate.
288 * configure: Likewise.
289 * Makefile.in: Likewise.
291 2008-03-13 Alan Modra <amodra@bigpond.net.au>
293 * Makefile.am: Run "make dep-am".
294 * Makefile.in: Regenerate.
295 * configure: Regenerate.
297 2008-03-07 Alan Modra <amodra@bigpond.net.au>
299 * ppc-opc.c (powerpc_opcodes): Order and format.
301 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
303 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
304 * i386-tbl.h: Regenerated.
306 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
308 * i386-opc.tbl: Disallow 16-bit near indirect branches for
310 * i386-tbl.h: Regenerated.
312 2008-02-21 Jan Beulich <jbeulich@novell.com>
314 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
315 and Fword for far indirect jmp. Allow Reg16 and Word for near
316 indirect jmp on x86-64. Disallow Fword for lcall.
317 * i386-tbl.h: Re-generate.
319 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
321 * cr16-opc.c (cr16_num_optab): Defined
323 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
325 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
326 * i386-init.h: Regenerated.
328 2008-02-14 Nick Clifton <nickc@redhat.com>
331 * configure.in (SHARED_LIBADD): Select the correct host specific
332 file extension for shared libraries.
333 * configure: Regenerate.
335 2008-02-13 Jan Beulich <jbeulich@novell.com>
337 * i386-opc.h (RegFlat): New.
338 * i386-reg.tbl (flat): Add.
339 * i386-tbl.h: Re-generate.
341 2008-02-13 Jan Beulich <jbeulich@novell.com>
343 * i386-dis.c (a_mode): New.
344 (cond_jump_mode): Adjust.
345 (Ma): Change to a_mode.
346 (intel_operand_size): Handle a_mode.
347 * i386-opc.tbl: Allow Dword and Qword for bound.
348 * i386-tbl.h: Re-generate.
350 2008-02-13 Jan Beulich <jbeulich@novell.com>
352 * i386-gen.c (process_i386_registers): Process new fields.
353 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
354 unsigned char. Add dw2_regnum and Dw2Inval.
355 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
357 * i386-tbl.h: Re-generate.
359 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
361 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
362 * i386-init.h: Updated.
364 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
366 * i386-gen.c (cpu_flags): Add CpuXsave.
368 * i386-opc.h (CpuXsave): New.
370 (i386_cpu_flags): Add cpuxsave.
372 * i386-dis.c (MOD_0FAE_REG_4): New.
373 (RM_0F01_REG_2): Likewise.
374 (MOD_0FAE_REG_5): Updated.
375 (RM_0F01_REG_3): Likewise.
376 (reg_table): Use MOD_0FAE_REG_4.
377 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
379 (rm_table): Add RM_0F01_REG_2.
381 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
382 * i386-init.h: Regenerated.
383 * i386-tbl.h: Likewise.
385 2008-02-11 Jan Beulich <jbeulich@novell.com>
387 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
388 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
389 * i386-tbl.h: Re-generate.
391 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
394 * configure: Regenerated.
396 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
398 * mips-dis.c: Update copyright.
399 (mips_arch_choices): Add Octeon.
400 * mips-opc.c: Update copyright.
402 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
404 2008-01-29 Alan Modra <amodra@bigpond.net.au>
406 * ppc-opc.c: Support optional L form mtmsr.
408 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
410 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
412 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
414 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
415 * i386-init.h: Regenerated.
417 2008-01-23 Tristan Gingold <gingold@adacore.com>
419 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
420 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
422 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
424 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
425 (cpu_flags): Likewise.
427 * i386-opc.h (CpuMMX2): Removed.
430 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
431 * i386-init.h: Regenerated.
432 * i386-tbl.h: Likewise.
434 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
436 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
438 * i386-init.h: Regenerated.
440 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
442 * i386-opc.tbl: Use Qword on movddup.
443 * i386-tbl.h: Regenerated.
445 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
447 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
448 * i386-tbl.h: Regenerated.
450 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
452 * i386-dis.c (Mx): New.
453 (PREFIX_0FC3): Likewise.
454 (PREFIX_0FC7_REG_6): Updated.
455 (dis386_twobyte): Use PREFIX_0FC3.
456 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
457 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
460 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
462 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
463 (operand_types): Add Mem.
465 * i386-opc.h (IntelSyntax): New.
466 * i386-opc.h (Mem): New.
468 (Opcode_Modifier_Max): Updated.
469 (i386_opcode_modifier): Add intelsyntax.
470 (i386_operand_type): Add mem.
472 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
475 * i386-reg.tbl: Add size for accumulator.
477 * i386-init.h: Regenerated.
478 * i386-tbl.h: Likewise.
480 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
482 * i386-opc.h (Byte): Fix a typo.
484 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
487 * i386-gen.c (operand_type_init): Add Dword to
488 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
489 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
491 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
492 Xmmword, Unspecified and Anysize.
493 (set_bitfield): Make Mmword an alias of Qword. Make Oword
496 * i386-opc.h (CheckSize): Removed.
504 (i386_opcode_modifier): Remove checksize, byte, word, dword,
508 (Unspecified): Likewise.
510 (i386_operand_type): Add byte, word, dword, fword, qword,
511 tbyte xmmword, unspecified and anysize.
513 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
514 Tbyte, Xmmword, Unspecified and Anysize.
516 * i386-reg.tbl: Add size for accumulator.
518 * i386-init.h: Regenerated.
519 * i386-tbl.h: Likewise.
521 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
523 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
525 (reg_table): Updated.
526 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
527 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
529 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
531 * i386-gen.c (set_bitfield): Use fail () on error.
533 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
535 * i386-gen.c (lineno): New.
536 (filename): Likewise.
537 (set_bitfield): Report filename and line numer on error.
538 (process_i386_opcodes): Set filename and update lineno.
539 (process_i386_registers): Likewise.
541 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
543 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
546 * i386-opc.h (IntelMnemonic): Renamed to ..
548 (Opcode_Modifier_Max): Updated.
549 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
552 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
553 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
554 * i386-tbl.h: Regenerated.
556 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
558 * i386-gen.c: Update copyright to 2008.
559 * i386-opc.h: Likewise.
560 * i386-opc.tbl: Likewise.
562 * i386-init.h: Regenerated.
563 * i386-tbl.h: Likewise.
565 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
567 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
568 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
569 * i386-tbl.h: Regenerated.
571 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
573 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
575 (cpu_flags): Likewise.
577 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
578 (CpuSSE4_2_Or_ABM): Likewise.
580 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
582 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
583 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
584 and CpuPadLock, respectively.
585 * i386-init.h: Regenerated.
586 * i386-tbl.h: Likewise.
588 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
590 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
592 * i386-opc.h (No_xSuf): Removed.
593 (CheckSize): Updated.
595 * i386-tbl.h: Regenerated.
597 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
599 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
600 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
602 (cpu_flags): Add CpuSSE4_2_Or_ABM.
604 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
606 (i386_cpu_flags): Add cpusse4_2_or_abm.
608 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
609 CpuABM|CpuSSE4_2 on popcnt.
610 * i386-init.h: Regenerated.
611 * i386-tbl.h: Likewise.
613 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
615 * i386-opc.h: Update comments.
617 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
619 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
620 * i386-opc.h: Likewise.
621 * i386-opc.tbl: Likewise.
623 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
626 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
627 Byte, Word, Dword, QWord and Xmmword.
629 * i386-opc.h (No_xSuf): New.
630 (CheckSize): Likewise.
637 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
638 Dword, QWord and Xmmword.
640 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
642 * i386-tbl.h: Regenerated.
644 2008-01-02 Mark Kettenis <kettenis@gnu.org>
646 * m88k-dis.c (instructions): Fix fcvt.* instructions.
649 For older changes see ChangeLog-2007
655 version-control: never