1 2018-04-16 Alan Modra <amodra@gmail.com>
3 * Makefile.am: Remove i370 support.
4 * configure.ac: Likewise.
5 * disassemble.c: Likewise.
6 * disassemble.h: Likewise.
9 * Makefile.in: Regenerate.
10 * configure: Regenerate.
11 * po/POTFILES.in: Regenerate.
13 2018-04-16 Alan Modra <amodra@gmail.com>
15 * Makefile.am: Remove h8500 support.
16 * configure.ac: Likewise.
17 * disassemble.c: Likewise.
18 * disassemble.h: Likewise.
19 * h8500-dis.c: Delete.
20 * h8500-opc.h: Delete.
21 * Makefile.in: Regenerate.
22 * configure: Regenerate.
23 * po/POTFILES.in: Regenerate.
25 2018-04-16 Alan Modra <amodra@gmail.com>
27 * configure.ac: Remove tahoe support.
28 * configure: Regenerate.
30 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
32 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
34 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
36 * i386-tbl.h: Regenerated.
38 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
40 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
41 PREFIX_MOD_1_0FAE_REG_6.
43 (OP_E_register): Use va_mode.
44 * i386-dis-evex.h (prefix_table):
45 New instructions (see prefixes above).
46 * i386-gen.c (cpu_flag_init): Add WAITPKG.
47 (cpu_flags): Likewise.
48 * i386-opc.h (enum): Likewise.
49 (i386_cpu_flags): Likewise.
50 * i386-opc.tbl: Add umonitor, umwait, tpause.
51 * i386-init.h: Regenerate.
52 * i386-tbl.h: Likewise.
54 2018-04-11 Alan Modra <amodra@gmail.com>
56 * opcodes/i860-dis.c: Delete.
57 * opcodes/i960-dis.c: Delete.
58 * Makefile.am: Remove i860 and i960 support.
59 * configure.ac: Likewise.
60 * disassemble.c: Likewise.
61 * disassemble.h: Likewise.
62 * Makefile.in: Regenerate.
63 * configure: Regenerate.
64 * po/POTFILES.in: Regenerate.
66 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
69 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
71 (print_insn): Clear vex instead of vex.evex.
73 2018-04-04 Nick Clifton <nickc@redhat.com>
75 * po/es.po: Updated Spanish translation.
77 2018-03-28 Jan Beulich <jbeulich@suse.com>
79 * i386-gen.c (opcode_modifiers): Delete VecESize.
80 * i386-opc.h (VecESize): Delete.
81 (struct i386_opcode_modifier): Delete vecesize.
82 * i386-opc.tbl: Drop VecESize.
83 * i386-tlb.h: Re-generate.
85 2018-03-28 Jan Beulich <jbeulich@suse.com>
87 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
88 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
89 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
90 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
91 * i386-tlb.h: Re-generate.
93 2018-03-28 Jan Beulich <jbeulich@suse.com>
95 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
97 * i386-tlb.h: Re-generate.
99 2018-03-28 Jan Beulich <jbeulich@suse.com>
101 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
102 (vex_len_table): Drop Y for vcvt*2si.
103 (putop): Replace plain 'Y' handling by abort().
105 2018-03-28 Nick Clifton <nickc@redhat.com>
108 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
109 instructions with only a base address register.
110 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
111 handle AARHC64_OPND_SVE_ADDR_R.
112 (aarch64_print_operand): Likewise.
113 * aarch64-asm-2.c: Regenerate.
114 * aarch64_dis-2.c: Regenerate.
115 * aarch64-opc-2.c: Regenerate.
117 2018-03-22 Jan Beulich <jbeulich@suse.com>
119 * i386-opc.tbl: Drop VecESize from register only insn forms and
120 memory forms not allowing broadcast.
121 * i386-tlb.h: Re-generate.
123 2018-03-22 Jan Beulich <jbeulich@suse.com>
125 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
126 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
127 sha256*): Drop Disp<N>.
129 2018-03-22 Jan Beulich <jbeulich@suse.com>
131 * i386-dis.c (EbndS, bnd_swap_mode): New.
132 (prefix_table): Use EbndS.
133 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
134 * i386-opc.tbl (bndmov): Move misplaced Load.
135 * i386-tlb.h: Re-generate.
137 2018-03-22 Jan Beulich <jbeulich@suse.com>
139 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
140 templates allowing memory operands and folded ones for register
142 * i386-tlb.h: Re-generate.
144 2018-03-22 Jan Beulich <jbeulich@suse.com>
146 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
147 256-bit templates. Drop redundant leftover Disp<N>.
148 * i386-tlb.h: Re-generate.
150 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
152 * riscv-opc.c (riscv_insn_types): New.
154 2018-03-13 Nick Clifton <nickc@redhat.com>
156 * po/pt_BR.po: Updated Brazilian Portuguese translation.
158 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
160 * i386-opc.tbl: Add Optimize to clr.
161 * i386-tbl.h: Regenerated.
163 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
165 * i386-gen.c (opcode_modifiers): Remove OldGcc.
166 * i386-opc.h (OldGcc): Removed.
167 (i386_opcode_modifier): Remove oldgcc.
168 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
169 instructions for old (<= 2.8.1) versions of gcc.
170 * i386-tbl.h: Regenerated.
172 2018-03-08 Jan Beulich <jbeulich@suse.com>
174 * i386-opc.h (EVEXDYN): New.
175 * i386-opc.tbl: Fold various AVX512VL templates.
176 * i386-tlb.h: Re-generate.
178 2018-03-08 Jan Beulich <jbeulich@suse.com>
180 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
181 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
182 vpexpandd, vpexpandq): Fold AFX512VF templates.
183 * i386-tlb.h: Re-generate.
185 2018-03-08 Jan Beulich <jbeulich@suse.com>
187 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
188 Fold 128- and 256-bit VEX-encoded templates.
189 * i386-tlb.h: Re-generate.
191 2018-03-08 Jan Beulich <jbeulich@suse.com>
193 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
194 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
195 vpexpandd, vpexpandq): Fold AVX512F templates.
196 * i386-tlb.h: Re-generate.
198 2018-03-08 Jan Beulich <jbeulich@suse.com>
200 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
201 64-bit templates. Drop Disp<N>.
202 * i386-tlb.h: Re-generate.
204 2018-03-08 Jan Beulich <jbeulich@suse.com>
206 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
207 and 256-bit templates.
208 * i386-tlb.h: Re-generate.
210 2018-03-08 Jan Beulich <jbeulich@suse.com>
212 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
213 * i386-tlb.h: Re-generate.
215 2018-03-08 Jan Beulich <jbeulich@suse.com>
217 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
219 * i386-tlb.h: Re-generate.
221 2018-03-08 Jan Beulich <jbeulich@suse.com>
223 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
224 * i386-tlb.h: Re-generate.
226 2018-03-08 Jan Beulich <jbeulich@suse.com>
228 * i386-gen.c (opcode_modifiers): Delete FloatD.
229 * i386-opc.h (FloatD): Delete.
230 (struct i386_opcode_modifier): Delete floatd.
231 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
233 * i386-tlb.h: Re-generate.
235 2018-03-08 Jan Beulich <jbeulich@suse.com>
237 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
239 2018-03-08 Jan Beulich <jbeulich@suse.com>
241 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
242 * i386-tlb.h: Re-generate.
244 2018-03-08 Jan Beulich <jbeulich@suse.com>
246 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
248 * i386-tlb.h: Re-generate.
250 2018-03-07 Alan Modra <amodra@gmail.com>
252 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
254 * disassemble.h (print_insn_rs6000): Delete.
255 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
256 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
257 (print_insn_rs6000): Delete.
259 2018-03-03 Alan Modra <amodra@gmail.com>
261 * sysdep.h (opcodes_error_handler): Define.
262 (_bfd_error_handler): Declare.
263 * Makefile.am: Remove stray #.
264 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
266 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
267 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
268 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
269 opcodes_error_handler to print errors. Standardize error messages.
270 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
271 and include opintl.h.
272 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
273 * i386-gen.c: Standardize error messages.
274 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
275 * Makefile.in: Regenerate.
276 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
277 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
278 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
279 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
280 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
281 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
282 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
283 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
284 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
285 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
286 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
287 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
288 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
290 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
292 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
293 vpsub[bwdq] instructions.
294 * i386-tbl.h: Regenerated.
296 2018-03-01 Alan Modra <amodra@gmail.com>
298 * configure.ac (ALL_LINGUAS): Sort.
299 * configure: Regenerate.
301 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
303 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
304 macro by assignements.
306 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
309 * i386-gen.c (opcode_modifiers): Add Optimize.
310 * i386-opc.h (Optimize): New enum.
311 (i386_opcode_modifier): Add optimize.
312 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
313 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
314 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
315 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
316 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
318 * i386-tbl.h: Regenerated.
320 2018-02-26 Alan Modra <amodra@gmail.com>
322 * crx-dis.c (getregliststring): Allocate a large enough buffer
323 to silence false positive gcc8 warning.
325 2018-02-22 Shea Levy <shea@shealevy.com>
327 * disassemble.c (ARCH_riscv): Define if ARCH_all.
329 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
331 * i386-opc.tbl: Add {rex},
332 * i386-tbl.h: Regenerated.
334 2018-02-20 Maciej W. Rozycki <macro@mips.com>
336 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
337 (mips16_opcodes): Replace `M' with `m' for "restore".
339 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
341 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
343 2018-02-13 Maciej W. Rozycki <macro@mips.com>
345 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
346 variable to `function_index'.
348 2018-02-13 Nick Clifton <nickc@redhat.com>
351 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
352 about truncation of printing.
354 2018-02-12 Henry Wong <henry@stuffedcow.net>
356 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
358 2018-02-05 Nick Clifton <nickc@redhat.com>
360 * po/pt_BR.po: Updated Brazilian Portuguese translation.
362 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
364 * i386-dis.c (enum): Add pconfig.
365 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
366 (cpu_flags): Add CpuPCONFIG.
367 * i386-opc.h (enum): Add CpuPCONFIG.
368 (i386_cpu_flags): Add cpupconfig.
369 * i386-opc.tbl: Add PCONFIG instruction.
370 * i386-init.h: Regenerate.
371 * i386-tbl.h: Likewise.
373 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
375 * i386-dis.c (enum): Add PREFIX_0F09.
376 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
377 (cpu_flags): Add CpuWBNOINVD.
378 * i386-opc.h (enum): Add CpuWBNOINVD.
379 (i386_cpu_flags): Add cpuwbnoinvd.
380 * i386-opc.tbl: Add WBNOINVD instruction.
381 * i386-init.h: Regenerate.
382 * i386-tbl.h: Likewise.
384 2018-01-17 Jim Wilson <jimw@sifive.com>
386 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
388 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
390 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
391 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
392 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
393 (cpu_flags): Add CpuIBT, CpuSHSTK.
394 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
395 (i386_cpu_flags): Add cpuibt, cpushstk.
396 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
397 * i386-init.h: Regenerate.
398 * i386-tbl.h: Likewise.
400 2018-01-16 Nick Clifton <nickc@redhat.com>
402 * po/pt_BR.po: Updated Brazilian Portugese translation.
403 * po/de.po: Updated German translation.
405 2018-01-15 Jim Wilson <jimw@sifive.com>
407 * riscv-opc.c (match_c_nop): New.
408 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
410 2018-01-15 Nick Clifton <nickc@redhat.com>
412 * po/uk.po: Updated Ukranian translation.
414 2018-01-13 Nick Clifton <nickc@redhat.com>
416 * po/opcodes.pot: Regenerated.
418 2018-01-13 Nick Clifton <nickc@redhat.com>
420 * configure: Regenerate.
422 2018-01-13 Nick Clifton <nickc@redhat.com>
426 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
428 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
429 * i386-tbl.h: Regenerate.
431 2018-01-10 Jan Beulich <jbeulich@suse.com>
433 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
434 * i386-tbl.h: Re-generate.
436 2018-01-10 Jan Beulich <jbeulich@suse.com>
438 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
439 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
440 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
441 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
442 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
443 Disp8MemShift of AVX512VL forms.
444 * i386-tbl.h: Re-generate.
446 2018-01-09 Jim Wilson <jimw@sifive.com>
448 * riscv-dis.c (maybe_print_address): If base_reg is zero,
449 then the hi_addr value is zero.
451 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
453 * arm-dis.c (arm_opcodes): Add csdb.
454 (thumb32_opcodes): Add csdb.
456 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
458 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
459 * aarch64-asm-2.c: Regenerate.
460 * aarch64-dis-2.c: Regenerate.
461 * aarch64-opc-2.c: Regenerate.
463 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
466 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
467 Remove AVX512 vmovd with 64-bit operands.
468 * i386-tbl.h: Regenerated.
470 2018-01-05 Jim Wilson <jimw@sifive.com>
472 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
475 2018-01-03 Alan Modra <amodra@gmail.com>
477 Update year range in copyright notice of all files.
479 2018-01-02 Jan Beulich <jbeulich@suse.com>
481 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
482 and OPERAND_TYPE_REGZMM entries.
484 For older changes see ChangeLog-2017
486 Copyright (C) 2018 Free Software Foundation, Inc.
488 Copying and distribution of this file, with or without modification,
489 are permitted in any medium without royalty provided the copyright
490 notice and this notice are preserved.
496 version-control: never